1 #include <system_def.h>
11 #include <hal_machperiph.h>
19 #include <ul_logreg.h>
21 #include "appl_defs.h"
22 #include "appl_fpga.h"
23 #include "pxmcc_types.h"
25 int cmd_do_test_memusage(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
32 snprintf(str, sizeof(str), "memusage maxaddr 0x%08lx\n", (unsigned long)maxaddr);
33 cmd_io_write(cmd_io, str, strlen(str));
38 int cmd_do_test_adc(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
40 printf("ADC: %ld %ld %ld %ld %ld\n", (LPC_ADC->DR[0] & 0xFFF0) >> 4,
41 (LPC_ADC->DR[1] & 0xFFF0) >> 4,
42 (LPC_ADC->DR[2] & 0xFFF0) >> 4,
43 (LPC_ADC->DR[3] & 0xFFF0) >> 4,
44 (LPC_ADC->DR[7] & 0xFFF0) >> 4);
48 #ifdef APPL_WITH_DISTORE_EEPROM_USER
49 int cmd_do_test_distore(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
51 appl_distore_user_set_check4change();
55 int cmd_do_test_diload(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
57 appl_distore_user_restore();
60 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
62 int cmd_do_test_loglevel_cb(ul_log_domain_t *domain, void *context)
65 cmd_io_t *cmd_io = (cmd_io_t *)context;
68 snprintf(s, sizeof(s) - 1, "%s (%d)\n\r", domain->name, domain->level);
69 cmd_io_puts(cmd_io, s);
73 int cmd_do_test_loglevel(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
79 if (!line || (si_skspace(&line), !*line))
81 ul_logreg_for_each_domain(cmd_do_test_loglevel_cb, cmd_io);
85 res = ul_log_domain_arg2levels(line);
88 return res >= 0 ? 0 : CMDERR_BADPAR;
91 int cmd_do_spimst_blocking(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
96 int spi_chan = (int)(intptr_t)des->info[0];
97 uint8_t *tx_buff = NULL;
98 uint8_t *rx_buff = NULL;
103 if ((opchar = cmd_opchar_check(cmd_io, des, param)) < 0)
107 return -CMDERR_OPCHAR;
110 spi_chan = *param[1] - '0';
112 spi_drv = spi_find_drv(NULL, spi_chan);
115 return -CMDERR_BADSUF;
121 if (isdigit((int)*p))
123 if (si_long(&p, &addr, 16) < 0)
124 return -CMDERR_BADPAR;
127 if (si_fndsep(&p, "({") < 0)
128 return -CMDERR_BADSEP;
130 if ((res = si_add_to_arr(&p, (void **)&tx_buff, &len, 16, 1, "})")) < 0)
131 return -CMDERR_BADPAR;
133 rx_buff = malloc(len);
138 res = spi_transfer(spi_drv, addr, len, tx_buff, rx_buff);
142 printf("SPI! %02lX ERROR\n", addr);
147 printf("SPI! %02lX ", addr);
150 for (i = 0; i < len; i++)
151 printf("%s%02X", i ? "," : "", tx_buff[i]);
155 for (i = 0; i < len; i++)
156 printf("%s%02X", i ? "," : "", rx_buff[i]);
173 int sdram_access_test(void)
176 unsigned int pattern;
177 size_t ramsz = SDRAM_SIZE;
185 pattern = 0x12abcdef;
187 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
190 pattern = pattern + 0x87654321;
194 printf("SDRAM write %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
199 pattern = 0x12abcdef;
201 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
205 printf("SDRAM error modify at %p (%08x)\n", ptr, *ptr ^ pattern);
210 pattern = pattern + 0x87654321;
214 printf("SDRAM modify %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
219 pattern = 0x12abcdef;
221 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
223 if (*(ptr++) != ~pattern)
225 printf("SDRAM error read at %p (%08x)\n", ptr, *ptr ^ pattern);
229 pattern = pattern + 0x87654321;
233 printf("SDRAM read %d ms\n", (int)(lt_msdiff_t)(actual_msec - tic));
240 for (cnt = ramsz / sizeof(*ptr), ptr = (typeof(ptr))SDRAM_BASE; cnt--;)
246 printf("SDRAM sum %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), pattern);
248 for (blksz = 1; blksz < 256 ; blksz *= 2)
255 for (cnt = ramsz / sizeof(*ptr); cnt; cnt -= blksz)
257 ptr = (typeof(ptr))SDRAM_BASE;
259 //ptr = (typeof(ptr))cmd_do_test_memusage;
260 //ptr = (typeof(ptr))&ptr;
261 for (i = blksz; i--;)
266 printf("SDRAM sum %d blksz %d ms res 0x%08x\n", (int)(lt_msdiff_t)(actual_msec - tic), (int)blksz, pattern);
272 int cmd_do_testsdram(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
277 #endif /*SDRAM_BASE*/
279 int cmd_do_testlxpwrrx(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
288 if (si_ulong(&ps, &mode, 0) < 0)
289 return -CMDERR_BADPAR;
292 pxmc_rocon_rx_data_hist_buff = NULL;
293 pxmc_rocon_rx_data_hist_mode = mode;
295 #ifndef PXMC_ROCON_TIMED_BY_RX_DONE
296 pxmc_rocon_rx_done_isr_setup(pxmc_rocon_rx_done_isr);
297 #endif /*PXMC_ROCON_TIMED_BY_RX_DONE*/
298 pxmc_rocon_rx_data_hist_buff_end = (void *)(FPGA_CONFIGURATION_FILE_ADDRESS +
300 ptr = (void *)FPGA_CONFIGURATION_FILE_ADDRESS;
305 pxmc_rocon_rx_data_hist_buff = (void *)ptr;
309 int cmd_do_testlxpwrstat(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
311 printf("lxpwrrx period %ld latency %ld max %ld\n",
312 (long)pxmc_rocon_rx_cycle_time, (long)pxmc_rocon_rx_irq_latency,
313 (long)pxmc_rocon_rx_irq_latency_max);
319 int cmd_do_testfncapprox(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
333 long step = 1 << (30-7-18+1 +4);
336 if (si_ulong(&ps, &fnc, 0) < 0)
337 return -CMDERR_BADPAR;
340 if (!strcmp(ps, "all")) {
342 count = 0x80000000UL / step;
347 if (si_ulong(&ps, &val, 0) < 0)
348 return -CMDERR_BADPAR;
351 for (; count--; val += step) {
355 xb = __builtin_clz(x);
361 fpga_fncapprox_base[fnc] = xl;
363 /* dummy read to provide time to function aproximator to proceed computation */
364 res = fpga_fncapprox_base[fnc];
365 res = fpga_fncapprox_base[fnc];
371 yl = (1LL << 62) / xl;
374 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
375 yl = round(sin(xf) * (1UL << 16));
378 xf = (double)xl * M_PI / 2.0 / (1UL << 30);
379 yl = round(cos(xf) * (1UL << 16));
387 if ((diff > 0) && (diff > diff_max))
389 else if ((diff < 0) && (-diff > diff_max))
396 printf("fnc=%ld val=0x%08lx res=0x%08lx ref=0x%08lx diff=%ld max %ld\n",
397 fnc, val, res, (unsigned long)yl, diff, diff_max);
402 int cmd_do_testtumblefw(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
413 pxmc_state_t *mcs = pxmc_main_list.pxml_arr[0];
414 volatile pxmcc_data_t *mcc_data = (pxmcc_data_t *)fpga_tumbl_dmem;
415 volatile pxmcc_axis_data_t *mcc_axis = mcc_data->axis + 0;
420 if (si_long(&ps, &pwm_d, 0) < 0)
421 return -CMDERR_BADPAR;
424 if (si_ulong(&ps, &pwm_q, 0) < 0)
425 return -CMDERR_BADPAR;
427 irc = fpga_irc[0]->count;
428 ptofs = (int16_t)(mcs->pxms_ptofs - irc) + irc;
430 ptirc = mcs->pxms_ptirc;
431 ull = (1ULL << 32) * mcs->pxms_ptper;
432 ptreci = (ull + ptirc / 2) / ptirc;
434 pwmtx_info = (9 << 0) | (10 << 8) | (11 << 16);
438 mcc_axis->inp_info = mcs->pxms_inp_info;
439 mcc_axis->out_info = mcs->pxms_out_info;
440 mcc_axis->pwmtx_info = pwmtx_info;
442 mcc_axis->ptirc = ptirc;
443 mcc_axis->ptreci = ptreci;
444 mcc_axis->ptofs = ptofs;
447 mcc_axis->pwm_dq = (pwm_d << 16) | (pwm_q & 0xffff);
449 pxmc_clear_flags(mcs,PXMS_ENO_m|PXMS_ENG_m|PXMS_ENR_m|PXMS_BSY_m);
454 mcc_data->axis[1].inp_info = 1;
455 mcc_data->axis[1].out_info = 3;
456 mcc_data->axis[1].pwmtx_info = (12 << 0) | (13 << 8) | (14 << 16);
457 mcc_data->axis[1].mode = 0;
458 mcc_data->axis[1].ccflg = 1;
459 mcc_data->axis[2].inp_info = 2;
460 mcc_data->axis[2].out_info = 6;
461 mcc_data->axis[2].pwmtx_info = (15 << 0) | (16 << 8) | (18 << 16);
462 mcc_data->axis[2].mode = 0;
463 mcc_data->axis[2].ccflg = 1;
464 mcc_data->axis[3].inp_info = 3;
465 mcc_data->axis[3].out_info = 9;
466 mcc_data->axis[3].pwmtx_info = (19 << 0) | (20 << 8) | (21 << 16);
467 mcc_data->axis[3].mode = 0;
468 mcc_data->axis[3].ccflg = 1;
471 printf("spd %ld act_idle %"PRIu32" min_idle %"PRIu32" avail %lu pwm_cycle %"PRIu32"\n",
472 mcs->pxms_as, mcc_data->common.act_idle, mcc_data->common.min_idle,
473 (mcc_data->common.pwm_cycle + 6) / 6, mcc_data->common.pwm_cycle);
474 mcc_data->common.min_idle = 0x7fff;
479 #define CK_IRC_WORDS 16
480 #define CK_TX_WORDS 16
481 #define CK_RX_WORDS 16
483 #define CK_IRC_START ((uint32_t*)fpga_irc[0])
484 #define CK_TX_START (fpga_lx_master_transmitter_base+9)
485 #define CK_RX_START (fpga_lx_master_receiver_base+44)
487 typedef struct ck_state_t {
488 uint32_t ck_irc_base[CK_IRC_WORDS];
489 uint32_t ck_irc_read[CK_IRC_WORDS];
490 uint32_t ck_tx_base[CK_TX_WORDS];
491 uint32_t ck_tx_read[CK_TX_WORDS];
492 uint32_t ck_rx_base[CK_RX_WORDS];
493 uint32_t ck_rx_read[CK_RX_WORDS];
500 int cmd_do_testtumblebus(cmd_io_t *cmd_io, const struct cmd_des *des, char *param[])
504 static ck_state_t *ckst = NULL;
506 ckst = malloc(sizeof(*ckst));
510 ckst->ck_irc_err = 0;
514 for (i = 0; i < CK_IRC_WORDS; i++)
515 ckst->ck_irc_base[i] = CK_IRC_START[i];
517 for (i = 0; i < CK_TX_WORDS; i++)
518 ckst->ck_tx_base[i] = CK_TX_START[i];
520 for (i = 0; i < CK_RX_WORDS; i++)
521 ckst->ck_rx_base[i] = CK_RX_START[i];
524 if (!ckst->ck_irc_err) {
525 for (i = 0; i < CK_IRC_WORDS; i++)
526 ckst->ck_irc_read[i] = CK_IRC_START[i];
527 for (i = 0; i < CK_IRC_WORDS; i++)
528 if (ckst->ck_irc_read[i] != ckst->ck_irc_base[i]) {
530 printf("irc+%x %08"PRIx32" != %08"PRIx32"\n",
531 i, ckst->ck_irc_read[i], ckst->ck_irc_base[i]);
535 if (!ckst->ck_tx_err) {
536 for (i = 0; i < CK_TX_WORDS; i++)
537 ckst->ck_tx_read[i] = CK_TX_START[i];
538 for (i = 0; i < CK_TX_WORDS; i++)
539 if (ckst->ck_tx_read[i] != ckst->ck_tx_base[i]) {
541 printf("tx+%x %08"PRIx32" != %08"PRIx32"\n",
542 i, ckst->ck_tx_read[i], ckst->ck_tx_base[i]);
546 if (!ckst->ck_rx_err) {
547 for (i = 0; i < CK_RX_WORDS; i++)
548 ckst->ck_rx_read[i] = CK_RX_START[i];
549 for (i = 0; i < CK_RX_WORDS; i++)
550 if (ckst->ck_rx_read[i] != ckst->ck_rx_base[i]) {
552 printf("rx+%x %08"PRIx32" != %08"PRIx32"\n",
553 i, ckst->ck_rx_read[i], ckst->ck_rx_base[i]);
561 cmd_des_t const cmd_des_test_memusage = {0, 0,
562 "memusage", "report memory usage", cmd_do_test_memusage,
569 cmd_des_t const cmd_des_test_adc = {0, 0,
570 "testadc", "adc test", cmd_do_test_adc,
577 #ifdef APPL_WITH_DISTORE_EEPROM_USER
578 cmd_des_t const cmd_des_test_distore = {0, 0,
579 "testdistore", "test DINFO store", cmd_do_test_distore,
586 cmd_des_t const cmd_des_test_diload = {0, 0,
587 "testdiload", "test DINFO load", cmd_do_test_diload,
593 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
595 cmd_des_t const cmd_des_test_loglevel = {0, 0,
596 "loglevel", "select logging level",
597 cmd_do_test_loglevel, {}
600 cmd_des_t const cmd_des_spimst = {0, CDESM_OPCHR | CDESM_WR,
601 "SPIMST", "SPI master communication request",
602 cmd_do_spimst_blocking, {(void *)0}
605 cmd_des_t const cmd_des_spimstx = {0, CDESM_OPCHR | CDESM_WR,
606 "SPIMST#", "SPI# master communication request",
607 cmd_do_spimst_blocking, {(void *) - 1}
611 cmd_des_t const cmd_des_testsdram = {0, 0,
612 "testsdram", "test SDRAM",
613 cmd_do_testsdram, {(void *)0}
615 #endif /*SDRAM_BASE*/
618 cmd_des_t const cmd_des_testlxpwrrx = {0, 0,
619 "testlxpwrrx", "capture data stream from lxpwr",
620 cmd_do_testlxpwrrx, {(void *)0}
623 cmd_des_t const cmd_des_testlxpwrstat = {0, 0,
624 "testlxpwrstat", "lxpwr interrupt statistic",
625 cmd_do_testlxpwrstat, {(void *)0}
628 cmd_des_t const cmd_des_testfncapprox = {0, 0,
629 "testfncapprox", "test of function approximator",
630 cmd_do_testfncapprox, {(void *)0}
633 cmd_des_t const cmd_des_testtumblefw = {0, 0,
634 "testtumblefw", "test Tumble coprocesor firmware",
635 cmd_do_testtumblefw, {(void *)0}
638 cmd_des_t const cmd_des_testtumblebus = {0, 0,
639 "testtumblebus", "test Tumble coprocesor bus",
640 cmd_do_testtumblebus, {(void *)0}
644 cmd_des_t const *const cmd_appl_tests[] =
646 &cmd_des_test_memusage,
648 #ifdef APPL_WITH_DISTORE_EEPROM_USER
649 &cmd_des_test_distore,
650 &cmd_des_test_diload,
651 #endif /*APPL_WITH_DISTORE_EEPROM_USER*/
652 &cmd_des_test_loglevel,
657 #endif /*SDRAM_BASE*/
658 &cmd_des_testlxpwrrx,
659 &cmd_des_testlxpwrstat,
660 &cmd_des_testfncapprox,
661 &cmd_des_testtumblefw,
662 &cmd_des_testtumblebus,