modified project files to support new features

[fpga/lx-cpu1/lx-dad.git] / hw / lx-dad.ucf

diff --git a/hw/lx-dad.ucf b/hw/lx-dad.ucf
index a7baf9a7e622073ba22ed9c1df90d5924c8e3f85..2dbcd3cfe99c70cb80ef90800c48fc5a9d2148f2 100644 (file)
--- a/hw/lx-dad.ucf
+++ b/hw/lx-dad.ucf
@@ -14,9 +14,27 @@ NET CLK_50M             LOC = P14  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
 # Reset (active LOW)
 NET INIT                LOC = P39  | IOSTANDARD = LVCMOS33 | SLEW = SLOW;
 
+#vlastni vstupy vystupy
+
+NET LED_1               LOC = P1   | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+
+NET phi1                       LOC = P74  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+NET phi2               LOC = P75  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+NET phi_rst            LOC = P78  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+NET phist                      LOC = P79  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+NET sck_o              LOC = P80  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+NET sck_i CLOCK_DEDICATED_ROUTE = FALSE;
+NET sck_i                      LOC = P81  | IOSTANDARD = LVCMOS33 | SLEW = FAST | PULLUP;
+NET SDI                        LOC = P83  | IOSTANDARD = LVCMOS33 | SLEW = FAST | PULLUP;
+NET cnv_o              LOC = P82  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+
+
+
+#konec vlastniho
+
 # Memory peripheral
 NET CS0_XC              LOC = P64  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
-#NET CS1_XC              LOC = P1   | IOSTANDARD = LVCMOS33 | SLEW = FAST;
+
 
 NET RD                  LOC = P60  | IOSTANDARD = LVCMOS33 | SLEW = FAST;
 NET BLS<0>              LOC = P70  | IOSTANDARD = LVCMOS33 | SLEW = FAST;