* -------------------------------- Arctic Core ------------------------------*/\r
\r
#include "internal.h"\r
-#include "stack.h"\r
+#include "Cpu.h"\r
+#include "sys.h"\r
+#include "arch_stack.h"\r
#include "stm32f10x.h"\r
\r
\r
{\r
// TODO: make switch here... for now just call func.\r
Irq_Enable();\r
- Os_Sys.currTaskPtr->entry();\r
+ Os_Sys.currTaskPtr->constPtr->entry();\r
}\r
\r
void *Os_ArchGetStackPtr( void ) {\r
context[C_CONTEXT_OFFS/4] = SC_PATTERN;\r
\r
/* Set LR to start function */\r
- if( pcbPtr->proc_type == PROC_EXTENDED ) {\r
+ if( pcbPtr->constPtr->proc_type == PROC_EXTENDED ) {\r
context[VGPR_LR_OFF/4] = (uint32_t)Os_TaskStartExtended;\r
- } else if( pcbPtr->proc_type == PROC_BASIC ) {\r
+ } else if( pcbPtr->constPtr->proc_type == PROC_BASIC ) {\r
context[VGPR_LR_OFF/4] = (uint32_t)Os_TaskStartBasic;\r
}\r
\r
*/\r
\r
#define _ASSEMBLER_\r
-#include "kernel_offset.h"\r
+#include "asm_offset.h"\r
#include "arch_offset.h"\r
-#include "stack.h"\r
+#include "arch_stack.h"\r
\r
.extern Os_Sys\r
.extern TailChaining\r
#define IRQ_ENABLE() cpsie i\r
#define IRQ_DISABLE() cpsid i\r
\r
+#define SCB_ICSR 0xE000ED04\r
+#define ICSR_VECTACTIVE 0x1ff\r
+\r
\r
// lr\r
#define REG_SAVE r4-r8,r10,r11\r
sub.w sp,sp,#C_SIZE\r
mov.w r4,#LC_PATTERN\r
str r4,[sp,#C_CONTEXT_OFFS] \r
- mov r0,sp // stack as first arg\r
+ mov r6,sp // save stack for later..\r
\r
// When at interrupt nest count = 0, load interrupt stack \r
ldr r4,=Os_Sys\r
bgt arggg \r
ldr sp,[r4,#SYS_INT_STACK] \r
arggg: \r
- bl Irq_Entry\r
- mov sp, r0 // pop from returned stack\r
+\r
+ IRQ_DISABLE()\r
+ ldr r4,=SCB_ICSR\r
+ ldr r3, [r4, #0]\r
+ ldr r4,=ICSR_VECTACTIVE\r
+ and.w r0,r3,r4 /* Pass vector as arg */\r
+ bl Os_Isr_cm3\r
+ IRQ_ENABLE()\r
+\r
+/* bl Irq_Entry */\r
+ mov sp, r6 // pop from returned stack\r
\r
/* Do a normal exception return */\r
add.w sp,sp,#C_SIZE\r
__asm("#define " #_sym " %0 ": : "i" (_val))\r
\r
\r
-#include "stack.h"\r
+#include "arch_stack.h"\r
\r
void arch_foo(void) {\r
/* StackNvgprType */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+/*\r
+ * context.h\r
+ *\r
+ * Created on: 7 jul 2009\r
+ * Author: mahi\r
+ *\r
+ * DESCRIPTION\r
+ * ARM Cortex-M3 (architecture ARMv7-M).\r
+ *\r
+ * REFERENCES\r
+ * - Procedure Call Standard for the ARM Architecture, release 2.07\r
+ *\r
+ * REGISTER USE\r
+ * Args\r
+ * r0-r3\r
+ *\r
+ * RETURN\r
+ * ?? r0?\r
+ *\r
+ * Non-volatile regs (saved by function call)\r
+ * r4-r8,r10,r11 and SP\r
+ *\r
+ * Misc\r
+ * r9 - Platform specific ???\r
+ * r12 - IP (Intra Procedure call)\r
+ * r13 - SP\r
+ * r14 - LR\r
+ * r15 - PC\r
+ *\r
+ * See "Procedure Call Standard for the ARM® Architecture" for more information.\r
+ *\r
+ * Other:\r
+ * PSR\r
+ * PRIMASK[0] 0 - No effect,\r
+ * 1 - Prevents the activation of all exceptions with\r
+ * configurable priority.\r
+ * FAULTMASK\r
+ * BASEPRI[7:4] 0x0 - No effect\r
+ * !=0 - When BASEPRI is set to a nonzero value, it prevents\r
+ * the activation of all exceptions with same or lower\r
+ * priority level as the BASEPRI value.\r
+ * CONTOROL\r
+ *\r
+ *\r
+ * EXCEPTION FRAME\r
+ *\r
+ * The following registers are auto-magically pushed by the CPU\r
+ * Pushes:\r
+ * <previous>\r
+ * xPSR\r
+ * PC (r15)\r
+ * LR (r14)\r
+ * r12,r3,r2,r1,r0\r
+ *\r
+ * EXCEPTION/IRQ TABLE\r
+ * The table is a combined exception and irq table. The first 16 (0 to 15) entries\r
+ * are exceptions and the rest are irq's.\r
+ * The table just lists the addresses of the handlers (offset of 4 bytes)\r
+ *\r
+ * EXCEPTIONS\r
+ * There are fixed negative priority values for Reset, Hard fault and NMI.\r
+ * For the rest of the exceptions prio's can be set to 0-15. Priority 0 have higher\r
+ * priority than 1. Access through SHPRx.\r
+ *\r
+ * IRQ\r
+ * The IRQ's also have 4-bits of priority. All IRQ prio's are squeezed into\r
+ * 17 registers (4 in each) -> 68 IRQ's. Of the 8 bits accesssible to the\r
+ * priority only 4 bits are used, the least significant nibble is 0.\r
+ * Access through NVIC_IPR0 to IVPR_IPR16.\r
+ *\r
+ * EXCEPTION/IRQ FLOW\r
+ * MODES\r
+ * - Thread mode (normal execution). The privilige level can be set.\r
+ * - Handler mode (exception mode). The privilige level is always "priviliged"\r
+ *\r
+ * STACKS\r
+ * Two stacks, process and main.\r
+ *\r
+ *\r
+ * ENTRY\r
+ * - The exception hits\r
+ * - Irq_Handler() is called.\r
+ * - The processor now enters "handler" mode and saves\r
+ * - r0--r3,r12,LR,PC, xPSR on the current stack (MSR) (Don't use PSP)\r
+ * - Sets LR to EXC_RETURN (0xFFFF_FFFx)\r
+ *\r
+ * EXIT\r
+ * - Exception return instructions are bx,poppc or ldr, ldm\r
+ * - When the interrupt return instruction is excuted, the registers\r
+ * - will be pop:ed back\r
+ * - The active bit in the NVIC controller will be clear\r
+ * - The ICSR register will ?????\r
+ *\r
+ *\r
+ * STRATEGY\r
+ * - _estack and\r
+ *\r
+ *\r
+ *\r
+ */\r
+\r
+#ifndef CONTEXT_H_\r
+#define CONTEXT_H_\r
+\r
+\r
+#define SC_PATTERN 0xde\r
+#define LC_PATTERN 0xad\r
+\r
+/* Minimum alignment req */\r
+#define ARCH_ALIGN 4\r
+\r
+/* Small context (task swap==function call) */\r
+#define SAVE_NVGPR(_x,_y)\r
+#define RESTORE_NVGPR(_x,_y)\r
+\r
+/* Save volatile regs, NOT preserved by function calls */\r
+#define SAVE_VGPR(_x,_y)\r
+#define RESTORE_VGPR(_x,_y)\r
+\r
+/* Large context (interrupt) */\r
+#define SAVE_ALL_GPR(_x,_y)\r
+#define RESTORE_ALL_GPR(_x,_y)\r
+\r
+#if 0\r
+#define C_SIZE 16\r
+#define C_SP_OFF 0\r
+#define C_CONTEXT_OFF 4\r
+#define C_LR_OFF 8\r
+#define C_CR_OFF 12\r
+\r
+#define C_CONTEXT_OFFS 10\r
+#endif\r
+\r
+// NVREGS: r4+r5+r6+r7+r8++r10+r11+lr = 9*4 = 36\r
+#define NVGPR_SIZE 32\r
+// VGPR: 9*4 = 36\r
+#define VGPR_SIZE 36\r
+// SP + context\r
+#define C_SIZE 8\r
+\r
+//...\r
+#define VGPR_LR_OFF (C_SIZE+NVGPR_SIZE-4)\r
+#define C_CONTEXT_OFFS 4\r
+#define C_SP_OFF 0\r
+\r
+\r
+#define SC_SIZE (NVGPR_SIZE+C_SIZE)\r
+\r
+#if !defined(_ASSEMBLER_)\r
+#include <stdint.h>\r
+\r
+/* These are auto-magically pushed by the hardware */\r
+typedef struct StackException {\r
+ uint32_t backChain;\r
+ uint32_t psr;\r
+ uint32_t pc;\r
+ uint32_t lr;\r
+ uint32_t r12;\r
+ uint32_t r3;\r
+ uint32_t r2;\r
+ uint32_t r1;\r
+} StackExceptionType;\r
+\r
+typedef struct StackNvgpr {\r
+ uint32_t r4;\r
+ uint32_t r5;\r
+ uint32_t r6;\r
+ uint32_t r7;\r
+ uint32_t r8;\r
+ uint32_t r10;\r
+ uint32_t r11;\r
+ uint32_t va;\r
+} StackNvgprType;\r
+\r
+struct StackVGpr {\r
+ uint32_t i_have_no_idea;\r
+};\r
+\r
+\r
+typedef struct StackCallAndContext {\r
+ uint32_t context;\r
+ // possibly some backchains and other stuff here..\r
+} StackCallAndContextType;\r
+\r
+#endif /* _ASSEMBLER_ */\r
+\r
+\r
+#endif /* CONTEXT_H_ */\r
#include "hooks.h"
#include "stm32f10x.h"
#include "isr.h"
+#include "irq_types.h"
extern void *Irq_VectorTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];
}
+#if 0
/**
*
* @param stack_p Ptr to the current stack.
return stack_p;
}
+#endif
-/**
- * Attach an ISR type 1 to the interrupt controller.
- *
- * @param entry
- * @param int_ctrl
- * @param vector
- * @param prio
- */
-void Irq_AttachIsr1( void (*entry)(void), void *int_ctrl, uint32_t vector, uint8_t prio) {
-
- // TODO: Use NVIC_InitVector(vector, osPrioToCpuPio(pcb->prio)); here
-}
/**
* NVIC prio have priority 0-31, 0-highest priority.
return prio;
}
+#if 0
/**
* Attach a ISR type 2 to the interrupt controller.
*
NVIC_InitVector(vector, osPrioToCpuPio(pcb->prio));
}
+#endif
+void Irq_EnableVector( int16_t vector, int priority, int core ) {
+ (void)core;
+ NVIC_InitVector(vector, priority);
+}
+
/**
* Generates a soft interrupt, ie sets pending bit.
* This could also be implemented using ISPR regs.
#define SC_SIZE (NVGPR_SIZE+C_SIZE)\r
\r
#if !defined(_ASSEMBLER_)\r
+#include <stdint.h>\r
\r
/* These are auto-magically pushed by the hardware */\r
typedef struct StackException {\r
#include "stm32f10x.h"\r
#include "isr.h"\r
#include "arc.h"\r
+#include "counter_i.h"\r
\r
\r
/**\r
* Init of free running timer.\r
*/\r
void Os_SysTickInit( void ) {\r
+ ISR_INSTALL_ISR2("OsTick",OsTick,SysTick_IRQn,6,0);\r
+#if 0\r
TaskType tid;\r
tid = Os_Arc_CreateIsr(OsTick,6/*prio*/,"OsTick");\r
Irq_AttachIsr2(tid,NULL, SysTick_IRQn);\r
+#endif\r
}\r
\r
/**\r
#endif\r
}\r
\r
-#if 0\r
-/**\r
- *\r
- * @param stack_p Ptr to the current stack.\r
- *\r
- * The stack holds C, NVGPR, VGPR and the EXC frame.\r
- *\r
- */\r
-void *Irq_Entry( void *stack_p )\r
-{\r
- uint32_t vector;\r
- uint32_t *stack = (uint32_t *)stack_p;\r
- uint32_t exc_vector = (EXC_OFF_FROM_BOTTOM+EXC_VECTOR_OFF) / sizeof(uint32_t);\r
- const OsIsrConstType *isr;\r
-\r
- // Check for exception\r
- if( stack[exc_vector]>=CRITICAL_INPUT_EXCEPTION )\r
- {\r
- vector = stack[exc_vector];\r
- }\r
- else\r
- {\r
-#if defined(CFG_MPC5516)\r
- struct INTC_tag *intc = &INTC;\r
- vector = (intc->IACKR_PRC0.B.INTVEC_PRC0);\r
-#elif defined(CFG_MPC5554)||defined(CFG_MPC5567)\r
- volatile struct INTC_tag *intc = &INTC;\r
- vector = (intc->IACKR.B.INTVEC);\r
-#endif\r
- // save the vector for later\r
- stack[exc_vector] = vector;\r
-\r
- // Check for software interrupt\r
- if((uint32_t)vector<=INTC_SSCIR0_CLR7)\r
- {\r
- // Clear soft int\r
- intc->SSCIR[vector].B.CLR = 1;\r
- asm("mbar 0");\r
- }\r
- }\r
-\r
- isr = Os_IsrGet(exc_vector);\r
- if( isr->type == ISR_TYPE_1 ) {\r
- isr->entry();\r
- return stack;\r
- } else {\r
- return Os_Isr(stack, vector);\r
- }\r
-}\r
-#endif\r
-\r
-\r
static inline int osPrioToCpuPio( uint8_t prio ) {\r
assert(prio<32);\r
return prio>>1; // Os have 32 -> 16\r
\r
\r
\r
-#if 0\r
-/**\r
- * Attach an ISR type 1 to the interrupt controller.\r
- *\r
- * @param entry\r
- * @param int_ctrl\r
- * @param vector\r
- * @param prio\r
- */\r
-void Irq_AttachIsr1( void (*entry)(void), void *int_ctrl, uint32_t vector,uint8_t prio) {\r
- Irq_VectorTable[vector] = (void *)entry;\r
- Irq_SetIsrType(vector, ISR_TYPE_1);\r
-\r
- if (vector < INTC_NUMBER_OF_INTERRUPTS) {\r
- Irq_SetPriority(CPU_CORE0,vector + IRQ_INTERRUPT_OFFSET, osPrioToCpuPio(prio));\r
- } else if ((vector >= CRITICAL_INPUT_EXCEPTION) && (vector\r
- <= DEBUG_EXCEPTION)) {\r
- } else {\r
- /* Invalid vector! */\r
- assert(0);\r
- }\r
-\r
-}\r
-#endif\r
-\r
\r
void Irq_EnableVector( int16_t vector, int priority, int core ) {\r
\r
\r
\r
\r
-#if 0\r
-\r
-/**\r
- *\r
- * @param isrPtr\r
- * @param type\r
- * @param int_ctrl\r
- */\r
-ISRType Irq_Attach( int vector ) {\r
-// Os_Sys.isrCnt\r
-// uint32_t vector = isrPtr->vector;\r
-\r
- //Irq_VectorTable[vector] = (uintptr_t)isrPtr;\r
-// Irq_IsrTypeTable[vector] = type;\r
-// Irq_VectorTable[vector] = isrPtr;\r
-\r
-\r
- if (vector < INTC_NUMBER_OF_INTERRUPTS) {\r
- Irq_SetPriority(Irq_Map[vector]->core ,vector + IRQ_INTERRUPT_OFFSET, osPrioToCpuPio(Irq_Map[vector]->priority));\r
- } else if ((vector >= CRITICAL_INPUT_EXCEPTION)\r
- && (vector<= DEBUG_EXCEPTION)) {\r
- } else {\r
- /* Invalid vector! */\r
- assert(0);\r
- }\r
-\r
-\r
- return;\r
-}\r
-#endif\r
-\r
-#if 0\r
-/**\r
- * Attach a ISR type 2 to the interrupt controller.\r
- *\r
- * @param tid\r
- * @param int_ctrl\r
- * @param vector\r
- */\r
-void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {\r
- OsTaskVarType *pcb;\r
-\r
- pcb = Os_TaskGet(tid);\r
- Irq_VectorTable[vector] = (void *)pcb;\r
- Irq_IsrTypeTable[vector] = PROC_ISR2;\r
-\r
- if (vector < INTC_NUMBER_OF_INTERRUPTS) {\r
- Irq_SetPriority(CPU_CORE0,vector + IRQ_INTERRUPT_OFFSET, osPrioToCpuPio(pcb->prio));\r
- } else if ((vector >= CRITICAL_INPUT_EXCEPTION) && (vector\r
- <= DEBUG_EXCEPTION)) {\r
- } else {\r
- /* Invalid vector! */\r
- assert(0);\r
- }\r
-}\r
-#endif\r
-\r
\r
/**\r
* Generates a soft interrupt\r
return prio;\r
}\r
\r
-#if 0\r
-\r
-void dummy (void);\r
-\r
-// Critical Input Interrupt\r
-void IVOR0Exception (uint32_t *regs)\r
-{\r
-// srr0 = get_spr(SPR_SRR0);\r
-// srr1 = get_spr(SPR_SRR0);\r
-// ExceptionSave(srr0,srr1,esr,mcsr,dear;)\r
- // CSRR0, CSSR1\r
- // Nothing more\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Machine check\r
-void IVOR1Exception (uint32_t *regs)\r
-{\r
- // CSRR0, CSSR1\r
- // MCSR - Source of machine check\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-// Data Storage Interrupt\r
-void IVOR2Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- // ESR - lots of stuff\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Instruction Storage Interrupt\r
-void IVOR3Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- // ESR - lots of stuff\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Alignment Interrupt\r
-void IVOR5Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- // ESR - lots of stuff\r
- // DEAR - Address of load store that caused the exception\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Program Interrupt\r
-void IVOR6Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- // ESR - lots of stuff\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Floating point unavailable\r
-void IVOR7Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// System call\r
-void IVOR8Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- // ESR\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Aux processor Unavailable\r
-void IVOR9Exception (uint32_t *regs)\r
-{\r
- // Does not happen on e200\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-#if 0\r
-// Decrementer\r
-void IVOR10Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- while (1);\r
-}\r
-#endif\r
-\r
-// FIT\r
-void IVOR11Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Watchdog Timer\r
-void IVOR12Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-// Data TLB Error Interrupt\r
-void IVOR13Exception (uint32_t *regs)\r
-{\r
-\r
- // SRR0, SRR1\r
- // ESR - lots\r
- // DEAR -\r
- while (1);\r
-}\r
-\r
-// Instruction TLB Error Interupt\r
-void IVOR14Exception (uint32_t *regs)\r
-{\r
- // SRR0, SRR1\r
- // ESR - MIF set, All others cleared\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-void IVOR15Exception (uint32_t *regs)\r
-{\r
- // Debug\r
- dumpExceptionRegs(regs);\r
- while (1);\r
-}\r
-\r
-#if defined(CFG_CONSOLE_T32) || defined(CFG_CONSOLE_WINIDEA)\r
-\r
-typedef struct {\r
- uint32_t sp;\r
- uint32_t bc; // backchain\r
- uint32_t pad;\r
- uint32_t srr0;\r
- uint32_t srr1;\r
- uint32_t lr;\r
- uint32_t ctr;\r
- uint32_t xer;\r
- uint32_t cr;\r
- uint32_t esr;\r
- uint32_t mcsr;\r
- uint32_t dear;\r
- uint32_t vector;\r
- uint32_t r3;\r
- uint32_t r4;\r
-} exc_stack_t;\r
-\r
-\r
-\r
-static void dumpExceptionRegs( uint32_t *regs ) {\r
- exc_stack_t *r = (exc_stack_t *)regs;\r
-\r
- LDEBUG_PRINTF("sp %08x srr0 %08x srr1 %08x\n",r->sp,r->srr0,r->srr1);\r
- LDEBUG_PRINTF("lr %08x ctr %08x xer %08x\n",r->lr,r->ctr,r->xer);\r
- LDEBUG_PRINTF("cr %08x esr %08x mcsr %08x\n",r->cr,r->esr,r->mcsr);\r
- LDEBUG_PRINTF("dear %08x vec %08x r3 %08x\n",r->dear,r->vector,r->r3);\r
- LDEBUG_PRINTF("r4 %08x\n",r->r4);\r
-}\r
-\r
-#else\r
-static void dumpExceptionRegs( uint32_t *regs ) {\r
-}\r
-#endif\r
-\r
-#endif\r
\r
OUTPUT_ARCH(powerpc)\r
ENTRY(_start)\r
\r
+#include "board_cfg.h"\r
+\r
/*\r
* _idata - Start of .data in flash \r
* _data - start address of .data in RAM\r
\r
MEMORY\r
{\r
-#include "memory.ldf"\r
+ LINKERFILE_MEMORY_1\r
+ LINKERFILE_MEMORY_2\r
+ LINKERFILE_MEMORY_3\r
+ LINKERFILE_MEMORY_4\r
}\r
\r
SECTIONS\r
\r
obj-y += xtoa.o\r
\r
+ifeq ($(COMPILER),cw)\r
+SELECT_CLIB?=CLIB_CW\r
+endif\r
+\r
SELECT_CLIB?=CLIB_NEWLIB\r
\r
ifeq ($(SELECT_CLIB),CLIB_CW)\r
--- /dev/null
+/*\r
+* Configuration of module: Os (Os_Cfg.c)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC551x\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.29\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+* on Fri Apr 15 17:18:06 CEST 2011\r
+*/\r
+\r
+ \r
+\r
+#include "kernel.h"\r
+\r
+\r
+// ############################### EXTERNAL REFERENCES #############################\r
+\r
+/* Application externals */\r
+\r
+/* Interrupt externals */\r
+\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 100;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+// ############################### APPLICATIONS #############################\r
+GEN_APPLICATION_HEAD = {\r
+ GEN_APPLICATION(\r
+ /* id */ APPLICATION_ID_OsApplication1,\r
+ /* name */ "OsApplication1",\r
+ /* trusted */ true, /* NOT CONFIGURABLE IN TOOLS */\r
+ /* core */ 0, /* Default value, multicore not enabled.*/\r
+ /* StartupHook */ NULL,\r
+ /* ShutdownHook */ NULL,\r
+ /* ErrorHook */ NULL,\r
+ /* rstrtTaskId */ 0 /* NOT CONFIGURABLE IN TOOLS */\r
+ ), \r
+};\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD = {\r
+ GEN_COUNTER( COUNTER_ID_Counter1,\r
+ "Counter1",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0,\r
+ APPLICATION_ID_OsApplication1, /* Application owner */\r
+ 0 /* Accessing application mask */\r
+ ),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_Counter1;\r
+\r
+// ################################## ALARMS ################################\r
+\r
+// ################################ RESOURCES ###############################\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(bTask3,2048);\r
+DECLARE_STACK(eTask1,2048);\r
+DECLARE_STACK(eTask2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD = {\r
+ GEN_BTASK( /* */OsIdle,\r
+ /* name */"OsIdle",\r
+ /* priority */0,\r
+ /* schedule */FULL,\r
+ /* autostart */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* activation lim. */1,\r
+ /* App owner */0,\r
+ /* Accessing apps */0 \r
+ ),\r
+ GEN_BTASK(\r
+ /* */bTask3,\r
+ /* name */"bTask3",\r
+ /* priority */1,\r
+ /* schedule */FULL,\r
+ /* autostart */FALSE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* activation lim. */1,\r
+ /* App owner */APPLICATION_ID_OsApplication1,\r
+ /* Accessing apps */0\r
+ ), \r
+ GEN_ETASK(\r
+ /* */eTask1,\r
+ /* name */"eTask1",\r
+ /* priority */1,\r
+ /* schedule */FULL,\r
+ /* name */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* event mask */1,\r
+ /* App owner */APPLICATION_ID_OsApplication1,\r
+ /* Accessing apps */0\r
+ ), \r
+ GEN_ETASK(\r
+ /* */eTask2,\r
+ /* name */"eTask2",\r
+ /* priority */1,\r
+ /* schedule */FULL,\r
+ /* name */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* event mask */1,\r
+ /* App owner */APPLICATION_ID_OsApplication1,\r
+ /* Accessing apps */0\r
+ ), \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+GEN_ISR_MAP = {\r
+ 0\r
+};\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table data ScheduleTable_1\r
+\r
+GEN_SCHTBL_TASK_LIST_HEAD( 0, 2 ) { \r
+ \r
+ TASK_ID_bTask3,\r
+ \r
+};\r
+\r
+\r
+\r
+\r
+GEN_SCHTBL_EVENT_LIST_HEAD( 0, 4 ) {\r
+ \r
+ { \r
+ EVENT_MASK_Event1, \r
+ TASK_ID_eTask1 \r
+ },\r
+ \r
+};\r
+\r
+\r
+\r
+GEN_SCHTBL_EVENT_LIST_HEAD( 0, 8 ) {\r
+ \r
+ { \r
+ EVENT_MASK_Event2, \r
+ TASK_ID_eTask2 \r
+ },\r
+ \r
+};\r
+\r
+\r
+GEN_SCHTBL_EXPIRY_POINT_HEAD( 0 ) {\r
+ GEN_SCHTBL_EXPIRY_POINT_W_TASK(0, 2),
+ GEN_SCHTBL_EXPIRY_POINT_W_EVENT(0, 4),
+ GEN_SCHTBL_EXPIRY_POINT_W_EVENT(0, 8),
+ \r
+};\r
+\r
+GEN_SCHTBL_AUTOSTART(\r
+ 0,\r
+ SCHTBL_AUTOSTART_ABSOLUTE,\r
+ 10, \r
+ OSDEFAULTAPPMODE\r
+);\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD = {\r
+ GEN_SCHEDULETABLE(\r
+ 0,\r
+ "ScheduleTable_1",\r
+ COUNTER_ID_Counter1,\r
+ REPEATING,\r
+ 10,\r
+ GEN_SCHTBL_AUTOSTART_NAME(0),\r
+ APPLICATION_ID_OsApplication1, /* Application owner */\r
+ 0 /* Accessing application mask */\r
+ ),\r
+};\r
+\r
--- /dev/null
+/*\r
+* Configuration of module: Os (Os_Cfg.h)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC551x\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.29\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+* on Fri Apr 15 17:18:06 CEST 2011\r
+*/\r
+\r
+
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
+#error Os: Configuration file expected BSW module version to be 2.0.*
+#endif
+
+\r
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+// Application Id's\r
+#define APPLICATION_ID_OsApplication1 0\r
+\r
+// Alarm Id's\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_Counter1 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_Counter1 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_Event1 1\r
+#define EVENT_MASK_Event2 1\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_bTask3 1\r
+#define TASK_ID_eTask1 2\r
+#define TASK_ID_eTask2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void bTask3( void );\r
+void eTask1( void );\r
+void eTask2( void );\r
+\r
+// Schedule table id's\r
+#define SCHTBL_ID_ScheduleTable_1 0\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512\r
+\r
+#define OS_ALARM_CNT 0 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 1\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 2\r
+//#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+#define OS_APPLICATION_CNT 1\r
+#define OS_SERVICE_CNT 0 /* ARCTICSTUDIO_GENERATOR_TODO */\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_USE_APPLICATIONS STD_ON\r
+#define OS_USE_MEMORY_PROT STD_OFF /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_USE_TASK_TIMING_PROT STD_OFF /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_USE_ISR_TIMING_PROT STD_OFF /* NOT CONFIGURABLE IN TOOLS */\r
+//#define OS_SC3 STD_ON /* NOT CONFIGURABLE IN TOOLS */ \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON /* NOT CONFIGURABLE IN TOOLS */\r
+\r
+#define OS_ISR_CNT 0\r
+#define OS_ISR2_CNT 0\r
+#define OS_ISR1_CNT 0\r
+\r
+#define OS_ISR_MAX_CNT 10\r
+\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+\r
+\r
+MOD_USE+= DET ECUM MCU KERNEL RAMLOG
\ No newline at end of file
--- /dev/null
+\r
+\r
+EXAMPLENAME=schedule_table\r
+ROOTDIR?=../../../..\r
+include $(ROOTDIR)/examples/build_example.mk\r
+\r
+ifneq (${MAKELEVEL},0) \r
+\r
+# object files\r
+obj-y += schedule_table.o\r
+obj-y += system_hooks.o\r
+\r
+endif\r
+\r
+\r
+\r
+\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.5" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://autosar.org/3.1.5 autosar_3-1-5.xsd">\r
+ <TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>schedule_table</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="b5dea5b2-7475-418d-90d7-4d4ee691bde0">\r
+ <SHORT-NAME>schedule_table</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION />\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC551x</SD>\r
+ <SD GID="GENDIR">/arc_isr/boards/mpc551xsim/examples/schedule_table</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/schedule_table/SwComposition_schedule_table</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/schedule_table/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="af0a4b5b-1ddb-4877-95c4-e2a62f76642b">\r
+ <SHORT-NAME>SwComposition_schedule_table</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="08723799-e8e9-4bb4-826b-5c1946d1d04d">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG />\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.24</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="48901c47-651e-4fd0-b4b1-842807948498">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/ArcOsIsrMaxCount</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="18d4afc6-04f9-4c18-885c-1cac6957ff93">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="94ae56d6-e7d8-40ff-bffe-520331007519">\r
+ <SHORT-NAME>OsApplication1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsApplication</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsApplication/ArcOsAppCoreId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsApplication/OsTrusted</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsApplication/OsAppCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/Counter1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsApplication/OsAppScheduleTableRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/ScheduleTable_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsApplication/OsAppTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/eTask1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsApplication/OsAppTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/eTask2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsApplication/OsAppTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/bTask3</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="bea4af47-e2a1-4ba0-af78-e507061c7c4b">\r
+ <SHORT-NAME>OsApplicationHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsApplication/OsApplicationHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsApplication/OsApplicationHooks/OsAppErrorHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsApplication/OsApplicationHooks/OsAppShutdownHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsApplication/OsApplicationHooks/OsAppStartupHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="1aeb0f46-758b-4b17-9e43-b72a88afdca1">\r
+ <SHORT-NAME>Counter1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="6da128db-015f-4fa8-aab6-5c4288f81c47">\r
+ <SHORT-NAME>Event1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventAutoMask</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="219753e7-7105-4526-be60-0cb90873be3d">\r
+ <SHORT-NAME>Event2</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventAutoMask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="999fb7b6-e7fd-4b4e-83fa-94541929818a">\r
+ <SHORT-NAME>ScheduleTable_1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableDuration</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableRepeating</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/Counter1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b0740d2f-7b83-4a17-9ab3-b3397b3494f8">\r
+ <SHORT-NAME>ExpiryPoint</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTblExpPointOffset</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9c9cb27f-a57c-4782-bbab-da7b5f44dc6e">\r
+ <SHORT-NAME>TaskActivation1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableTaskActivation</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableTaskActivation/OsScheduleTableActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/bTask3</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b22719bc-73f7-40ed-a308-c7ce7d55c96a">\r
+ <SHORT-NAME>ExpiryPoint1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTblExpPointOffset</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9336824c-5d36-45ae-9f5d-9c67fb061892">\r
+ <SHORT-NAME>EventSetting1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableEventSetting</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableEventSetting/OsScheduleTableSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/Event1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableEventSetting/OsScheduleTableSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/eTask1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="206e6636-760d-474c-9e73-c4b02073c964">\r
+ <SHORT-NAME>ExpiryPoint2</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTblExpPointOffset</DEFINITION-REF>\r
+ <VALUE>8</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="71529c4b-83fd-4e48-ac1e-65699495dc3f">\r
+ <SHORT-NAME>EventSetting1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableEventSetting</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableEventSetting/OsScheduleTableSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/Event2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableExpiryPoint/OsScheduleTableEventSetting/OsScheduleTableSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/eTask2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="9fae1341-7889-4904-ab6a-c0a5ae725739">\r
+ <SHORT-NAME>OsScheduleTableAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableAutostart/OsScheduleTableAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsScheduleTable/OsScheduleTableAutostart/ArcCoreOsScheduleTableOffset</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e9b2de76-5e7f-4c07-86fe-a4385118fb55">\r
+ <SHORT-NAME>eTask1</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/Event1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="28af1990-4727-43f6-bd08-3f53cf6a8aef">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ecd029cb-d031-4ffb-9ab2-1064125d1f91">\r
+ <SHORT-NAME>eTask2</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/schedule_table/Os/Event2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="84207479-9a45-4f4a-8111-dc57bcae4cd3">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="278840e2-5964-4bef-9f52-334cfeb33e1b">\r
+ <SHORT-NAME>bTask3</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions" />\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES>\r
+</AUTOSAR>\r
+\r
--- /dev/null
+/*\r
+* Configuration of module: Os (Tasks.c)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC551x\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.24\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+* on Mon Mar 28 20:46:34 CEST 2011\r
+*/\r
+\r
+#include "Os.h"\r
+\r
+#define USE_LDEBUG_PRINTF // Uncomment this to turn debug statements on.\r
+#include "debug.h"\r
+\r
+\r
+// Tasks\r
+void bTask3( void ) {\r
+\r
+ LDEBUG_FPUTS("btask3");\r
+ TerminateTask();\r
+}\r
+\r
+void eTask1( void ) {\r
+\r
+ for(;;) {\r
+ WaitEvent(EVENT_MASK_Event1);\r
+ LDEBUG_FPUTS("eTask1");\r
+ ClearEvent(EVENT_MASK_Event1);\r
+ }\r
+}\r
+\r
+void eTask2( void ) {\r
+\r
+ for(;;) {\r
+ WaitEvent(EVENT_MASK_Event2);\r
+ LDEBUG_FPUTS("eTask2");\r
+ ClearEvent(EVENT_MASK_Event2);\r
+ }\r
+}\r
+\r
+void OsIdle( void ) {\r
+ while(1);\r
+}\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.29\r
+* Generator version: 2.0.33\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
-* on Fri Apr 15 17:17:57 CEST 2011\r
+* on Mon May 02 17:03:25 CEST 2011\r
*/\r
\r
\r
1,\r
0,\r
APPLICATION_ID_OsApplication1, /* Application owner */\r
- 0 /* Accessing application mask */\r
+ 1 /* Accessing application mask */\r
),\r
};\r
\r
-CounterType Os_Arc_OsTickCounter = COUNTER_ID_Counter1;\r
+ CounterType Os_Arc_OsTickCounter = COUNTER_ID_Counter1;\r
+\r
\r
// ################################## ALARMS ################################\r
GEN_ALARM_AUTOSTART(ALARM_ID_Alarm1, ALARM_AUTOSTART_RELATIVE, 100, 100, OSDEFAULTAPPMODE );\r
EVENT_MASK_Event2,\r
0,\r
APPLICATION_ID_OsApplication1, /* Application owner */\r
- 0 /* Accessing application mask */\r
+ 1 /* Accessing application mask */\r
),\r
};\r
\r
\r
// ############################## STACKS (TASKS) ############################\r
DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+\r
DECLARE_STACK(bTask3,2048);\r
DECLARE_STACK(eTask1,2048);\r
DECLARE_STACK(eTask2,2048);\r
/* resource mask */0,\r
/* activation lim. */1,\r
/* App owner */0,\r
- /* Accessing apps */0 \r
+ /* Accessing apps */1 \r
),\r
GEN_BTASK(\r
/* */bTask3,\r
/* resource mask */0,\r
/* activation lim. */1,\r
/* App owner */APPLICATION_ID_OsApplication1,\r
- /* Accessing apps */0\r
+ /* Accessing apps */1\r
), \r
GEN_ETASK(\r
/* */eTask1,\r
/* resource mask */0,\r
/* event mask */1,\r
/* App owner */APPLICATION_ID_OsApplication1,\r
- /* Accessing apps */0\r
+ /* Accessing apps */1\r
), \r
GEN_ETASK(\r
/* */eTask2,\r
/* resource mask */0,\r
/* event mask */1,\r
/* App owner */APPLICATION_ID_OsApplication1,\r
- /* Accessing apps */0\r
+ /* Accessing apps */1\r
), \r
};\r
\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.29\r
+* Generator version: 2.0.33\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
-* on Fri Apr 15 17:17:57 CEST 2011\r
+* on Mon May 02 17:03:25 CEST 2011\r
*/\r
\r
\r
#define OS_ISR_MAX_CNT 10\r
\r
+#define OS_NUM_CORES 1\r
+\r
\r
#endif /*OS_CFG_H_*/\r
<DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/ArcOsIsrMaxCount</DEFINITION-REF>\r
<VALUE>10</VALUE>\r
</INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsNumberOfCores</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
</PARAMETER-VALUES>\r
<SUB-CONTAINERS>\r
<CONTAINER UUID="e3564f08-19f7-49f1-830b-cf36426e3737">\r
--- /dev/null
+/*\r
+* Configuration of module: Os (Os_Cfg.c)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): STM32_F107\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.33\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+* on Tue May 03 11:20:11 CEST 2011\r
+*/\r
+\r
+ \r
+\r
+#include "kernel.h"\r
+\r
+\r
+// ############################### EXTERNAL REFERENCES #############################\r
+\r
+/* Application externals */\r
+\r
+/* Interrupt externals */\r
+\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+// ############################### APPLICATIONS #############################\r
+GEN_APPLICATION_HEAD = {\r
+ GEN_APPLICATION(\r
+ /* id */ APPLICATION_ID_OsApplication1,\r
+ /* name */ "OsApplication1",\r
+ /* trusted */ true, /* NOT CONFIGURABLE IN TOOLS */\r
+ /* core */ 0, /* Default value, multicore not enabled.*/\r
+ /* StartupHook */ NULL,\r
+ /* ShutdownHook */ NULL,\r
+ /* ErrorHook */ NULL,\r
+ /* rstrtTaskId */ 0 /* NOT CONFIGURABLE IN TOOLS */\r
+ ), \r
+};\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD = {\r
+ GEN_COUNTER( COUNTER_ID_Counter1,\r
+ "Counter1",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0,\r
+ APPLICATION_ID_OsApplication1, /* Application owner */\r
+ 1 /* Accessing application mask */\r
+ ),\r
+};\r
+\r
+ CounterType Os_Arc_OsTickCounter = COUNTER_ID_Counter1;\r
+\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm1, ALARM_AUTOSTART_RELATIVE, 100, 100, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD = {\r
+ GEN_ALARM( ALARM_ID_Alarm1,\r
+ "Alarm1",\r
+ COUNTER_ID_Counter1,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm1),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_eTask1,\r
+ EVENT_MASK_Event2,\r
+ 0,\r
+ APPLICATION_ID_OsApplication1, /* Application owner */\r
+ 1 /* Accessing application mask */\r
+ ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+\r
+DECLARE_STACK(bTask3,2048);\r
+DECLARE_STACK(eTask1,2048);\r
+DECLARE_STACK(eTask2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD = {\r
+ GEN_BTASK( /* */OsIdle,\r
+ /* name */"OsIdle",\r
+ /* priority */0,\r
+ /* schedule */FULL,\r
+ /* autostart */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* activation lim. */1,\r
+ /* App owner */0,\r
+ /* Accessing apps */1 \r
+ ),\r
+ GEN_BTASK(\r
+ /* */bTask3,\r
+ /* name */"bTask3",\r
+ /* priority */1,\r
+ /* schedule */FULL,\r
+ /* autostart */FALSE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* activation lim. */1,\r
+ /* App owner */APPLICATION_ID_OsApplication1,\r
+ /* Accessing apps */1\r
+ ), \r
+ GEN_ETASK(\r
+ /* */eTask1,\r
+ /* name */"eTask1",\r
+ /* priority */1,\r
+ /* schedule */FULL,\r
+ /* name */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* event mask */1,\r
+ /* App owner */APPLICATION_ID_OsApplication1,\r
+ /* Accessing apps */1\r
+ ), \r
+ GEN_ETASK(\r
+ /* */eTask2,\r
+ /* name */"eTask2",\r
+ /* priority */1,\r
+ /* schedule */FULL,\r
+ /* name */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* event mask */1,\r
+ /* App owner */APPLICATION_ID_OsApplication1,\r
+ /* Accessing apps */1\r
+ ), \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+GEN_ISR_MAP = {\r
+ 0\r
+};\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+\r
--- /dev/null
+/*\r
+* Configuration of module: Os (Os_Cfg.h)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): STM32_F107\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.33\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+* on Tue May 03 11:20:11 CEST 2011\r
+*/\r
+\r
+
+#if !(((OS_SW_MAJOR_VERSION == 2) && (OS_SW_MINOR_VERSION == 0)) )
+#error Os: Configuration file expected BSW module version to be 2.0.*
+#endif
+
+\r
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+// Application Id's\r
+#define APPLICATION_ID_OsApplication1 0\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm1 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_Counter1 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_Counter1 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_Event1 1\r
+#define EVENT_MASK_Event2 1\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_bTask3 1\r
+#define TASK_ID_eTask1 2\r
+#define TASK_ID_eTask2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void bTask3( void );\r
+void eTask1( void );\r
+void eTask2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512\r
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 2\r
+//#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+#define OS_APPLICATION_CNT 1\r
+#define OS_SERVICE_CNT 0 /* ARCTICSTUDIO_GENERATOR_TODO */\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_USE_APPLICATIONS STD_ON\r
+#define OS_USE_MEMORY_PROT STD_OFF /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_USE_TASK_TIMING_PROT STD_OFF /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_USE_ISR_TIMING_PROT STD_OFF /* NOT CONFIGURABLE IN TOOLS */\r
+//#define OS_SC3 STD_ON /* NOT CONFIGURABLE IN TOOLS */ \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON /* NOT CONFIGURABLE IN TOOLS */\r
+\r
+#define OS_ISR_CNT 0\r
+#define OS_ISR2_CNT 0\r
+#define OS_ISR1_CNT 0\r
+\r
+#define OS_ISR_MAX_CNT 10\r
+\r
+#define OS_NUM_CORES 1\r
+\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+\r
+\r
+#CFG+=VLE\r
+MOD_USE+= DET ECUM MCU KERNEL RAMLOG
\ No newline at end of file
--- /dev/null
+\r
+\r
+EXAMPLENAME=simple\r
+ROOTDIR?=../../../..\r
+include $(ROOTDIR)/examples/build_example.mk\r
+\r
+ifneq (${MAKELEVEL},0) \r
+\r
+# object files\r
+obj-y += simple_main.o\r
+obj-y += system_hooks.o\r
+\r
+endif\r
+\r
+\r
+\r
+\r
+\r
-\r
-\r
-ifeq ($(EXAMPLENAME),)\r
-$(error whyyyyyy)\r
+#\r
+# This makefile helps to build the examples. It tries to figure out if \r
+# it is an in-tree-build or if it is a seperate project (it's then invoked \r
+# from the top makefile) \r
+#\r
+\r
+ifndef EXAMPLENAME\r
+$(error EXAMPLENAME is not set. . This makefile is invoked the wrong way))\r
endif\r
\r
ifndef ROOTDIR\r
$(error ROOTDIR is not set. This makefile is invoked the wrong way)\r
endif\r
\r
-#export EXAMPLENAME\r
-\r
-ifndef BOARDDIR\r
-# Assume in-tree-build \r
-boardpath=$(realpath $(CURDIR)/../..)\r
-boarddir=$(subst $(realpath $(ROOTDIR)/boards)/,,$(boardpath))\r
-ugh=1\r
-else\r
- # BOARDIR is defined\r
- ifndef BDIR\r
- # Assume that we want to build current directory\r
- BDIR=$(CURDIR)\r
- ugh=1\r
- else\r
- # BOARDIR and BDIR are defined \r
- # out-of-tree build\r
- endif\r
+ifeq (${MAKELEVEL},0)\r
+ BUILD_IN_TREE=y\r
+\r
+ ifneq ($(BOARDDIR),)\r
+ $(warning BOARDDIR defined in an in-tree-build)\r
+ endif\r
+ \r
+ boardpath=$(realpath $(CURDIR)/../..)\r
+ boarddir=$(subst $(realpath $(ROOTDIR)/boards)/,,$(boardpath))\r
+ \r
endif\r
\r
-ifeq ($(ugh),1) \r
+ifeq (${BUILD_IN_TREE},y) \r
\r
export example:=$(subst $(abspath $(CURDIR)/..)/,,$(CURDIR))\r
\r
#define SECTION_BALIGN(_align ) __attribute__ ((aligned (_align)))\r
#endif\r
\r
+#define DECLARE_WEAK __attribute__ ((weak))\r
\r
/* REQ:COMPILER005 */\r
/* TODO: skip the memclass for now */\r
OSServiceId_PostTaskHook,\r
OSServiceId_StartupHook,\r
OSServiceId_ShutdownHook,\r
- OSServiceId_GetTaskState\r
+ OSServiceId_GetTaskState,\r
+ OSServiceId_GetApplicationID,\r
+ OSServiceId_GetISRID,\r
+ OSServiceId_CallTrustedFunction,\r
+ OSServiceId_CheckISRMemoryAccess,\r
+ OSServiceId_TaskMemoryAccess,\r
+ OSServiceId_CheckObjectAccess,\r
+ OSServiceId_CheckObjectOwnership,\r
+ OSServiceId_StartScheduleTableRel,\r
+ OSServiceId_StartScheduleTableAbs,\r
+ OSServiceId_StopScheduleTable,\r
+ OSServiceId_NextScheduleTable,\r
+ OSServiceId_StartScheduleTableSynchron,\r
+ OSServiceId_SyncScheduleTable,\r
+ OSServiceId_GetScheduleTable,\r
+ OSServiceId_SetScheduleTableAsync,\r
+ OSServiceId_IncrementCounter,\r
+ OSServiceId_GetCounterValue,\r
+ OSServiceId_GetElapsedValue,\r
+ OSServiceId_TerminateApplication,\r
+ OSServiceId_AllowAccess,\r
+ OSServiceId_GetApplicationState\r
} OsServiceIdType;\r
\r
typedef struct OsError {\r
#endif\r
\r
struct OsIsrConst;\r
-\r
-ISRType Irq_Attach( int vector );\r
-ISRType Irq_Attach2( const struct OsIsrConst * );\r
-\r
-/**\r
- * Attach an ISR type 1 to the interrupt controller.\r
- *\r
- * @param entry\r
- * @param int_ctrl\r
- * @param vector\r
- * @param prio\r
- */\r
-void Irq_AttachIsr1( void (*entry)(void), void *int_ctrl, uint32_t vector, uint8_t prio);\r
-\r
-/**\r
- * Attach a ISR type 2 to the interrupt controller.\r
- *\r
- * @param tid The task id\r
- * @param int_ctrl The interrupt controller, The is NULL for now.\r
- * @param vector The vector to attach to\r
- */\r
-void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector );\r
-\r
/**\r
* Generates a soft interrupt\r
* @param vector\r
\r
/* ----------------------------[macro]---------------------------------------*/\r
#define ISR_DECLARE_ISR2(_name, _entry, _unique, _vector,_priority,_app ) \\r
- const OsIsrConstType _entry ## _unique = { \\r
+ static const OsIsrConstType _entry ## _unique = { \\r
.vector = _vector, \\r
.type = ISR_TYPE_2, \\r
.priority = _priority, \\r
\r
#define __ISR_INSTALL_ISR2(_name, _entry, _unique, _vector,_priority,_app ) \\r
do { \\r
- const OsIsrConstType _entry ## _unique = { \\r
+ static const OsIsrConstType _entry ## _unique = { \\r
.vector = _vector, \\r
.type = ISR_TYPE_2, \\r
.priority = _priority, \\r
\r
\r
#define ISR_DECLARE_ISR1(_name, _entry, _unique, _vector,_priority,_app ) \\r
- const OsIsrConstType _entry ## _unique = { \\r
+ static const OsIsrConstType _entry ## _unique = { \\r
.vector = _vector, \\r
.type = ISR_TYPE_1, \\r
.priority = _priority, \\r
\r
#define __ISR_INSTALL_ISR1(_name, _entry, _unique, _vector,_priority,_app ) \\r
do { \\r
- const OsIsrConstType _entry ## _unique = { \\r
+ static const OsIsrConstType _entry ## _unique = { \\r
.vector = _vector, \\r
.type = ISR_TYPE_2, \\r
.priority = _priority, \\r
void Os_IsrGetStackInfo( OsIsrStackType *stack );\r
void *Os_Isr( void *stack, int16_t vector);\r
#if defined(CFG_ARM_CM3)\r
-void Os_Isr_cm3( void *isr_p );\r
+void Os_Isr_cm3( int16_t vector );\r
void TailChaining(void *stack);\r
#endif\r
\r
# libs: PowerPC_EABI_Support/Runtime/Lib/Runtime.XXXX\r
# PowerPC_EABI_Support/MSL/MSL_C/PPC_EABI/Lib\r
\r
-CW_COMPILE=/c/devtools/cw_55xx\r
+#CW_COMPILE=/c/devtools/cw_55xx\r
CW_BIN=$(CW_COMPILE)/PowerPC_EABI_Tools/Command_Line_Tools\r
CW_LIB=$(CW_COMPILE)/PowerPC_EABI_Support/Runtime/Lib\r
\r
#include <assert.h>\r
#include <stdlib.h>\r
#include "Os.h"\r
+#include "application.h"\r
#include "internal.h"\r
#include "alarm_i.h"\r
#include "sys.h"\r
(unsigned)Increment,\r
(unsigned)Cycle);\r
\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( Os_AlarmGet(AlarmId)->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
+ }\r
+\r
+#endif\r
\r
if( (Increment == 0) || (Increment > COUNTER_MAX(aPtr)) ) {\r
/** @req OS304 */\r
\r
aPtr = Os_AlarmGet(AlarmId);\r
\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( aPtr->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
+ }\r
+\r
+#endif\r
+\r
if( Start > COUNTER_MAX(aPtr) ) {\r
/** @req OS304 */\r
rv = E_OS_VALUE;\r
\r
/* ----------------------------[private define]------------------------------*/\r
/* ----------------------------[private macro]-------------------------------*/\r
-#define APPL_ID_TO_MASK(_x) (1<<(_x))\r
-\r
/* ----------------------------[private typedef]-----------------------------*/\r
/* ----------------------------[private function prototypes]-----------------*/\r
/* ----------------------------[private variables]---------------------------*/\r
*/\r
\r
ApplicationType GetApplicationID( void ) {\r
+\r
+ /* TODO: Still missing the case when no application is running */\r
return Os_Sys.currApplId;\r
}\r
\r
uint32_t objectId )\r
{\r
uint32 appMask = APPL_ID_TO_MASK(ApplId);\r
- ObjectAccessType orv;\r
- _Bool rv = 0;\r
-\r
+ ObjectAccessType rv = NO_ACCESS;\r
+ _Bool rvMask = 0;\r
\r
/* @req OS423\r
* If in a call of CheckObjectAccess() the object to be examined\r
* invalid THEN CheckObjectAccess() shall return NO_ACCESS.\r
*/\r
if( ApplId > OS_APPLICATION_CNT ) {\r
- return NO_ACCESS;\r
+ goto err;\r
}\r
\r
/* @req OS272\r
* TODO: Could be that OS450 comes into play here....and then this is wrong.\r
*/\r
if( Os_AppVar[ApplId].state != APPLICATION_ACCESSIBLE ) {\r
- return NO_ACCESS;\r
+ goto err;\r
}\r
\r
\r
switch( ObjectType ) {\r
case OBJECT_ALARM:\r
if( objectId < OS_ALARM_CNT ) {\r
- rv = ((OsAlarmType *)objectId)->accessingApplMask & (appMask);\r
+ rvMask = Os_AlarmGet((AlarmType)objectId)->accessingApplMask & (appMask);\r
}\r
break;\r
case OBJECT_COUNTER:\r
if( objectId < OS_COUNTER_CNT ) {\r
- rv = ((OsCounterType *)objectId)->accessingApplMask & (appMask);\r
+ rvMask = Os_CounterGet((CounterType)objectId)->accessingApplMask & (appMask);\r
}\r
break;\r
case OBJECT_ISR:\r
- /* TODO: Add more things here for missing objects */\r
+ /* An ISR do not have accessingApplicationMask, just check if owner */\r
+ if( objectId < OS_ISR_CNT ) {\r
+ rvMask = (Os_IsrGet((ISRType)objectId)->constPtr->appOwner == ApplId);\r
+ }\r
break;\r
case OBJECT_MESSAGE:\r
break;\r
case OBJECT_RESOURCE:\r
if( objectId < OS_RESOURCE_CNT ) {\r
- rv = ((OsResourceType *)objectId)->accessingApplMask & (appMask);\r
+ rvMask = Os_ResourceGet((ResourceType)objectId)->accessingApplMask & (appMask);\r
}\r
case OBJECT_SCHEDULETABLE:\r
if( objectId < OS_SCHTBL_CNT ) {\r
- rv = ((OsSchTblType *)objectId)->accessingApplMask & (appMask);\r
+ rvMask = Os_SchTblGet((ScheduleTableType)objectId)->accessingApplMask & (appMask);\r
}\r
break;\r
case OBJECT_TASK:\r
- if( objectId < OS_COUNTER_CNT ) {\r
- rv = ((OsTaskVarType *)objectId)->constPtr->accessingApplMask & (appMask);\r
+ if( objectId < OS_TASK_CNT ) {\r
+ rvMask = Os_TaskGet((TaskType)objectId)->constPtr->accessingApplMask & (appMask);\r
}\r
break;\r
default:\r
/* @req OS423 */\r
- rv = NO_ACCESS;\r
+ // rvMask = NO_ACCESS;\r
break;\r
}\r
\r
- orv = rv ? ACCESS : NO_ACCESS;\r
+ rv = rvMask ? ACCESS : NO_ACCESS;\r
\r
- return orv;\r
+ OS_STD_END_3(OSServiceId_CheckObjectAccess,ApplId,ObjectType,objectId);\r
}\r
\r
/**\r
break;\r
}\r
\r
- return rv;\r
+ if( rv == INVALID_OSAPPLICATION ) {\r
+ goto err;\r
+ }\r
+\r
+ OS_STD_END_2(OSServiceId_CheckObjectOwnership,ObjectType,objectId);\r
}\r
\r
\r
* E_OS_STATE: The state of <Application> does not allow terminating <Application>
*/\r
StatusType TerminateApplication( ApplicationType applId, RestartType restartOption ) {\r
+ StatusType rv = E_OK;\r
+\r
(void)applId;\r
(void)restartOption;\r
- return E_OK;\r
+\r
+ /* @req OS493 */\r
+ if( applId > OS_APPLICATION_CNT) {\r
+ rv = E_OS_ID;\r
+ goto err;\r
+ }\r
+\r
+ /* @req OS459 */\r
+ if( restartOption > NO_RESTART ) {\r
+ rv = E_OS_VALUE;\r
+ goto err;\r
+ }\r
+\r
+ /* @req OS507 */\r
+ if( Os_ApplGet(applId)->state == APPLICATION_TERMINATED ) {\r
+ rv = E_OS_STATE;\r
+ goto err;\r
+ }\r
+\r
+ /* @req OS508 */\r
+ if( (Os_ApplGet(applId)->state == APPLICATION_RESTARTING ) &&\r
+ ( applId != Os_Sys.currApplId ) ) {\r
+ rv = E_OS_STATE;\r
+ goto err;\r
+ }\r
+\r
+ /* @req OS508 */\r
+ if( (Os_ApplGet(applId)->state == APPLICATION_RESTARTING ) &&\r
+ ( applId != Os_Sys.currApplId ) ) {\r
+ rv = E_OS_STATE;\r
+ goto err;\r
+ }\r
+\r
+ /* @req OS548 */\r
+ if( (Os_ApplGet(applId)->state == APPLICATION_RESTARTING ) &&\r
+ ( applId == Os_Sys.currApplId ) &&\r
+ ( restartOption == RESTART ) ) {\r
+ rv = E_OS_STATE;\r
+ goto err;\r
+ }\r
+\r
+ /* TODO: MISSING OS494, OS287, OS535, OS536 */\r
+\r
+ OS_STD_END_2(OSServiceId_TerminateApplication,applId,restartOption);\r
}\r
\r
\r
state
*/\r
StatusType AllowAccess( void ) {\r
+ StatusType rv = E_OK;\r
ApplicationType applId = Os_Sys.currApplId;\r
\r
/* @req OS497 */\r
if( Os_AppVar[applId].state != APPLICATION_RESTARTING ) {\r
- return E_OS_STATE;\r
+ rv = E_OS_STATE;\r
}\r
\r
/* @req OS498 */\r
Os_AppVar[applId].state = APPLICATION_ACCESSIBLE;\r
- return E_OK;\r
+ OS_STD_END(OSServiceId_AllowAccess);\r
}\r
\r
/**\r
* @return E_OK: No errors, E_OS_ID: <Application> is not valid
*/\r
StatusType GetApplicationState( ApplicationType applId, ApplicationStateRefType value ) {\r
+ StatusType rv = E_OK;\r
\r
if(applId > OS_APPLICATION_CNT ) {\r
- return E_OS_ID;\r
+ rv = E_OS_ID;\r
+ goto err;\r
}\r
\r
*value = Os_AppVar[applId].state;\r
\r
- return E_OK;\r
+ OS_STD_END_2(OSServiceId_GetApplicationID,applId,value);\r
}\r
\r
\r
#include "sys.h"\r
\r
#if defined(__GNUC__)\r
+\r
+/* For ARM this will generate to #define APA #12 */\r
#define DECLARE(sym,val) \\r
__asm("#define\t" #sym "\t%0" : : "n" ((val)))\r
\r
*\r
*/\r
\r
+\r
#include "Os.h"\r
\r
void apa(void *);\r
\r
\r
void func1( int a ) {\r
-\r
-\r
+ (void)a;\r
}\r
\r
-int func3( int a ) {\r
+uint32_t func3( int a ) {\r
if( a == 0) {\r
return 5;\r
}\r
- return 4;\r
+ return (*(uint32_t *)0xE000ED04 ) & 0x1f7;\r
}\r
\r
int func2( void ) {\r
#include "sys.h"\r
#include "alarm_i.h"\r
#include "sched_table_i.h"\r
+#include "application.h"\r
#include "arc.h"\r
\r
#define COUNTER_STD_END \\r
uint32_t flags;\r
cPtr = Os_CounterGet(counter_id);\r
\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( cPtr->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
+ }\r
+\r
+#endif\r
+\r
+\r
Irq_Save(flags);\r
/** @req OS376 */\r
if( !IsCounterValid(counter_id) ) {\r
#include "Os.h"\r
#include "task_i.h"\r
#include "sys.h"\r
+#include "application.h"\r
#include "internal.h"\r
\r
#define VALIDATE_W_RV(_exp,_rv) \\r
#if (OS_USE_APPLICATIONS == STD_ON)\r
\r
#include "os_config_macros.h"\r
+#include "sys.h"\r
+\r
+#define APPL_ID_TO_MASK(_x) (1<<(_x))\r
+\r
\r
/* STD container : OsApplicationHooks\r
* class: 3,4\r
\r
extern GEN_APPLICATION_HEAD;\r
\r
+static inline OsAppVarType *Os_ApplGet(ApplicationType id) {\r
+ return &Os_AppVar[id];\r
+}\r
+\r
static inline uint8_t Os_ApplGetCore( ApplicationType appl )\r
{\r
return Os_AppConst[appl].core;\r
}\r
\r
+#define OS_APP_CALL_ERRORHOOKS( x ) \\r
+ for(int i=0;i<OS_APPLICATION_CNT;i++) { \\r
+ if( Os_AppConst[i].StartupHook != NULL ) { \\r
+ Os_AppConst[i].StartupHook(); \\r
+ } \\r
+ }\r
+\r
+/**\r
+ *\r
+ * @param mask Target accessing application mask\r
+ * @return\r
+ */\r
+static inline StatusType Os_ApplHaveAccess( uint32_t mask ) {\r
+ ApplicationStateType state;\r
+\r
+ /* @req OS056 */\r
+ if( (APPL_ID_TO_MASK(Os_Sys.currApplId) & mask) == 0 ) {\r
+ return E_OS_ACCESS;\r
+ }\r
+\r
+ /* @req OS504/ActivateTask\r
+ * The Operating System module shall deny access to Operating System\r
+ * objects from other OS-Applications to an OS-Application which is not in state\r
+ * APPLICATION_ACCESSIBLE.\r
+ * */\r
+\r
+ /* We are activating a task in another application */\r
+ GetApplicationState(Os_Sys.currApplId,&state);\r
+ if( state != APPLICATION_ACCESSIBLE ) {\r
+ return E_OS_ACCESS;\r
+ }\r
+\r
+ return E_OK;\r
+}\r
+\r
void Os_ApplStart( void );\r
\r
#endif /* (OS_USE_APPLICATIONS == STD_ON) */\r
return rv;\r
\r
\r
+#define OS_SAVE_PARAM_3(_service_id,_p1,_p2,_p3) \\r
+ os_error.serviceId=_service_id;\\r
+ os_error.param1 = (uint32_t) _p1; \\r
+ os_error.param2 = (uint32_t) _p2; \\r
+ os_error.param3 = (uint32_t) _p3; \\r
+ ERRORHOOK(rv); \\r
+\r
\r
/* Called for sequence of error hook calls in case a service\r
* does not return with E_OK. Note that in this case the general error hook and the OS-\r
#define ERRORHOOK(x) \\r
if( Os_Sys.hooks->ErrorHook != NULL ) { \\r
Os_Sys.hooks->ErrorHook(x); \\r
- }\r
+ } \\r
+ OS_APP_CALL_ERRORHOOKS(x);\r
+\r
+\r
\r
#if (OS_USE_APPLICATIONS == STD_ON)\r
#define PROTECTIONHOOK(_x) \\r
return rv;\r
}\r
\r
+\r
+\r
+\r
static inline void Os_TaskResourceAdd( OsResourceType *rPtr, OsTaskVarType *pcbPtr) {\r
/* Save old task prio in resource and set new task prio */\r
rPtr->owner = pcbPtr->constPtr->pid;\r
//static uint8 stackTop = 0x42;
-
+static void Os_IsrAddWithId( const OsIsrConstType * restrict isrPtr, int id ) {
+ Os_IsrVarList[id].constPtr = isrPtr;
+ Os_VectorToIsr[isrPtr->vector] = id;
+ Irq_EnableVector( isrPtr->vector, isrPtr->priority, Os_ApplGetCore(isrPtr->appOwner ) );
+}
void Os_IsrInit( void ) {
#if OS_ISR_CNT != 0
/* Attach the interrupts */
- for (int i = 0; i < sizeof(Os_IsrConstList) / sizeof(OsIsrConstType); i++) {
- Os_IsrAdd(&Os_IsrConstList[i]);
+ for (int i = 0; i < Os_Sys.isrCnt; i++) {
+ Os_IsrAddWithId(&Os_IsrConstList[i],i);
}
#endif
}
ISRType Os_IsrAdd( const OsIsrConstType * restrict isrPtr ) {
ISRType id;
+ assert( isrPtr != NULL );
+
id = Os_Sys.isrCnt++;
Os_IsrVarList[id].constPtr = isrPtr;
- Os_VectorToIsr[isrPtr->vector] = id;
+ Os_VectorToIsr[isrPtr->vector + IRQ_INTERRUPT_OFFSET ] = id;
Irq_EnableVector( isrPtr->vector, isrPtr->priority, Os_ApplGetCore(isrPtr->appOwner ) );
return id;
Os_StackPerformCheck(new_pcb);
if( (new_pcb == Os_Sys.currTaskPtr) ||
- (Os_Sys.currTaskPtr->scheduling == NON) ||
+ (Os_Sys.currTaskPtr->constPtr->scheduling == NON) ||
!Os_SchedulerResourceIsFree() )
{
/* Just bring the preempted task back to running */
}
}
-void Os_Isr_cm3( void *isr_p ) {
+void Os_Isr_cm3( int16_t vector ) {
- struct OsTaskVar *isrPtr;
-
- Os_Sys.intNestCnt++;
+ OsIsrVarType *isrPtr = &Os_IsrVarList[Os_VectorToIsr[vector]];
- /* Grab the ISR "pcb" */
- isrPtr = (struct OsTaskVar *)isr_p;
- isrPtr->state = ST_RUNNING;
+ assert( isrPtr != NULL );
- if( isrPtr->proc_type & ( PROC_EXTENDED | PROC_BASIC ) ) {
- assert(0);
+ if( isrPtr->constPtr->type == ISR_TYPE_1) {
+ isrPtr->constPtr->entry();
+ return;
}
+ Os_Sys.intNestCnt++;
+ isrPtr->state = ST_ISR_RUNNING;
+
Irq_Enable();
- isrPtr->entry();
+ isrPtr->constPtr->entry();
Irq_Disable();
/* Check so that ISR2 haven't disabled the interrupts */
/* Check so that the ISR2 have called ReleaseResource() for each GetResource() */
/** @req OS369 */
- if( Os_TaskOccupiesResources(isrPtr) ) {
- Os_TaskResourceFreeAll(isrPtr);
+ if( Os_IsrOccupiesResources(isrPtr) ) {
+ Os_IsrResourceFreeAll(isrPtr);
ERRORHOOK(E_OS_RESOURCE);
}
OsTaskVarType *taskPtr = NULL;
assert( isrPtr != NULL );
-// if( isrPtr == NULL ) {
-// Os_ArchPanic(OS_ERR_SPURIOUS_INTERRUPT, NULL, NULL );
-// }
if( isrPtr->constPtr->type == ISR_TYPE_1) {
isrPtr->constPtr->entry();
Os_Sys.intNestCnt++;
- /* Grab the ISR "pcb" */
isrPtr->state = ST_ISR_RUNNING;
Irq_SOI();
\r
#VPATH += $(ROOTDIR)/arch/arm/arm_cm3/kernel\r
vpath-y += $(ARCH_PATH-y)/kernel\r
-#obj-y += asm_sample.o\r
+obj-y += asm_sample.o\r
#CFLAGS_asm_sample.o += -O3\r
obj-y += arch_krn.o\r
obj-$(CFG_HC1X) += arch_irq.o\r
# Assembler offsets\r
asm_offset.h: asm_offset.c\r
@echo " >> asm offset gen $<"\r
- $(Q)$(CC) -S $(CFLAGS) -o $(<:.c=.s) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $< \r
- @$(SED) -n "/#define/p" $(<:.c=.s) > $@\r
+ $(Q)$(CC) -S $(CFLAGS) -o $(<:.c=.s) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
+# $(Q)$(CC) -S $(CFLAGS) -o $(<:.c=.s) $(addprefix -I,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
+ @$(SED) -e "/#define/!d" -e "s/#//2g" $(<:.c=.s) > $@ \r
+# @$(SED) -n "/#define/p" $(<:.c=.s) > $@\r
@rm $(<:.c=.s)\r
endif\r
\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
#include "Os.h"\r
+#include "application.h"\r
#include "internal.h"\r
#include "task_i.h"\r
#include "resource_i.h"\r
OsResourceType *rPtr;\r
uint32_t flags;\r
\r
- Irq_Save(flags);\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( Os_ResourceGet(ResID)->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
+ }\r
\r
+#endif\r
+\r
+ Irq_Save(flags);\r
\r
if( Os_Sys.intNestCnt != 0 ) {\r
\r
#include "sched_table_i.h"\r
#include "sys.h"\r
#include "alist_i.h"\r
+#include "application.h"\r
\r
\r
/* ----------------------------[private define]------------------------------*/\r
\r
sPtr = Os_SchTblGet(sid);\r
\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( sPtr->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
+ }\r
+\r
+#endif\r
+\r
#if ( OS_SC2 == STD_ON ) || ( OS_SC4 == STD_ON )\r
if( sPtr->sync != NULL ) {\r
/* EXPLICIT or IMPLICIT */\r
SCHED_CHECK_ID(sid);\r
sTblPtr = Os_SchTblGet(sid);\r
\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( sTblPtr->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
+ }\r
+\r
+#endif\r
+\r
/** @req OS349 */\r
if( start > Os_CounterGetMaxValue(sTblPtr->counter) ) {\r
rv = E_OS_VALUE;\r
#include <stdlib.h>\r
#include "Os.h"\r
\r
+#include "application.h"\r
#include "internal.h"\r
#include "task_i.h"\r
#include "sys.h"\r
* @return\r
*/\r
\r
+\r
StatusType ActivateTask( TaskType TaskID ) {\r
long msr;\r
OsTaskVarType *pcb = Os_TaskGet(TaskID);\r
\r
Irq_Save(msr);\r
\r
-#if (OS_USE_APPLICATIONS == STD_ON)\r
- /* @req OS504/ActivateTask\r
- * The Operating System module shall deny access to Operating System\r
- * objects from other OS-Applications to an OS-Application which is not in state\r
- * APPLICATION_ACCESSIBLE.\r
- * */\r
- if( pcb->constPtr->applOwnerId != Os_Sys.currApplId ) {\r
- /* We are activating a task in another application */\r
- ApplicationStateType state;\r
- /* We are activating a task in another application */\r
- GetApplicationState(Os_Sys.currApplId,&state);\r
- if( state != APPLICATION_ACCESSIBLE ) {\r
- rv=E_OS_ACCESS;\r
- goto err;\r
- }\r
+#if (OS_APPLICATION_CNT > 1)\r
+\r
+ rv = Os_ApplHaveAccess( pcb->constPtr->accessingApplMask );\r
+ if( rv != E_OK ) {\r
+ goto err;\r
}\r
+\r
#endif\r
\r
/* @req OS093 ActivateTask */\r
\r
&tdir="&cfg_project_path_g\binaries\*osek*.elf"\r
os cmd /c dir &tdir/B /O:N > &datafile\r
+&tdir="&cfg_project_path_g\binaries\*os_*.elf"\r
+os cmd /c dir &tdir/B /O:N >> &datafile\r
+\r
\r
os cmd /c del &rfile\r
os cmd /c echo "" > &rfile\r
\r
\r
\r
+\r
projects / arc.git / commitdiff