#define USE_LDEBUG_PRINTF\r
#include "debug.h"\r
\r
-/* ----------------------------[includes]------------------------------------*/\r
/* ----------------------------[private define]------------------------------*/\r
/* ----------------------------[private macro]-------------------------------*/\r
/* ----------------------------[private typedef]-----------------------------*/\r
*\r
* @param err The error code.\r
* @param errFramePtr Pointer to extra information about the error, if any.\r
- * @param excFramePtr Pointer to the exception frame, that cause the error.\r
+ * @param excFramePtr Pointer to the exception frame, that caused the error.\r
*/\r
void Os_ArchPanic( uint32_t err, void *errFramePtr , Os_ExceptionFrameType *excFramePtr) {\r
(void)excFramePtr;\r
\r
/* ----------------------------[private define]------------------------------*/\r
\r
-//#define OLD_CALL \r
\r
#define INTC_IACKR_PRC0 0xfff48010 \r
#define INTC_EOIR_PRC0 0xfff48018\r
#endif\r
/* Check for 0 entry */\r
mr r5,r6\r
+#if 0 \r
cmplwi r5,0\r
bne+ vectorOk\r
/* The entry was 0, call panic */\r
li r4, 0\r
mr r5,r1\r
b Os_ArchPanic\r
+#endif \r
\r
vectorOk:\r
+ /* extract vector */\r
extrwi r5,r5,9,21\r
/* Check for soft INT */\r
cmplwi r5,7\r
/* Clear soft interrupt */\r
li r0,1\r
LOAD_ADDR_32(3,INTC_SSCIR0)\r
-// lis r3, INTC_SSCIR0@h\r
-// ori r3, r3, INTC_SSCIR0@l\r
stbx r0,r5,r3 \r
\r
noSoftInt: \r
LOAD_ADDR_32(3,Os_Isr)\r
-// lis r3, Os_Isr@h\r
-// ori r3, r3,Os_Isr@l\r
mtlr r3\r
mr r3,r4 /* "old" stack as arg1 */\r
-#if defined(OLD_CALL) \r
- lwz r4, 0x0(r6) /* Read the address from the for function/pcb entry */\r
-#else\r
- mr r4,r5\r
-#endif \r
+ mr r4,r5 /* Vector as arg2 */\r
blrl /* Call the entry */\r
\r
/* Notes!\r
//extern uint8 Irq_IsrTypeTable[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
//extern const OsIsrConstType *Irq_Map[NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS];\r
\r
-static void dumpExceptionRegs( uint32_t *regs );\r
+//static void dumpExceptionRegs( uint32_t *regs );\r
\r
/* ----------------------------[private variables]---------------------------*/\r
extern void exception_tbl(void);\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.28\r
+* Generator version: 2.0.29\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
-* on Wed Apr 13 08:22:49 CEST 2011\r
+* on Fri Apr 15 17:18:12 CEST 2011\r
*/\r
\r
\r
NULL,\r
ALARM_ACTION_ACTIVATETASK,\r
TASK_ID_bTask,\r
- NULL,\r
- NULL,\r
+ 0,\r
+ 0,\r
APPLICATION_ID_OsApplication1, /* Application owner */\r
0 /* Accessing application mask */\r
),\r
\r
// ################################## TASKS #################################\r
GEN_TASK_HEAD = {\r
- GEN_BTASK( OsIdle,\r
- "OsIdle",\r
- 0,\r
- FULL,\r
- TRUE,\r
- NULL,\r
- 0,\r
- 1,\r
- 0,\r
- 0 \r
+ GEN_BTASK( /* */OsIdle,\r
+ /* name */"OsIdle",\r
+ /* priority */0,\r
+ /* schedule */FULL,\r
+ /* autostart */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* activation lim. */1,\r
+ /* App owner */0,\r
+ /* Accessing apps */0 \r
),\r
GEN_BTASK(\r
/* */bTask,\r
/* name */"bTask",\r
- /* priority */31,\r
+ /* priority */2,\r
/* schedule */FULL,\r
/* autostart */FALSE,\r
/* resource_int_p */NULL,\r
/* name */TRUE,\r
/* resource_int_p */NULL,\r
/* resource mask */RES_MASK_Resource1 | 0,\r
+ /* event mask */1,\r
/* App owner */APPLICATION_ID_OsApplication1,\r
/* Accessing apps */0\r
), \r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.28\r
+* Generator version: 2.0.29\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
-* on Wed Apr 13 08:22:49 CEST 2011\r
+* on Fri Apr 15 17:18:12 CEST 2011\r
*/\r
\r
\r
\r
// Event masks\r
-#define EVENT_MASK_Event1 2\r
-#define EVENT_MASK_Event2 2\r
+#define EVENT_MASK_Event1 1\r
+#define EVENT_MASK_Event2 1\r
\r
// Isr Id's\r
#define ISR_ID_LossOfClock 0\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventAutoMask</DEFINITION-REF>\r
<VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
<CONTAINER UUID="3602409e-1b1a-4c75-bf15-45449d37570f">\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventAutoMask</DEFINITION-REF>\r
<VALUE>false</VALUE>\r
</BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
<CONTAINER UUID="fb419017-ef2b-4217-b417-098a2317e6b0">\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.24\r
+* Generator version: 2.0.29\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
-* on Thu Mar 24 08:53:26 CET 2011\r
+* on Fri Apr 15 17:17:57 CEST 2011\r
*/\r
\r
\r
\r
#include "kernel.h"\r
\r
+\r
// ############################### EXTERNAL REFERENCES #############################\r
\r
/* Application externals */\r
/* name */ "OsApplication1",\r
/* trusted */ true, /* NOT CONFIGURABLE IN TOOLS */\r
/* core */ 0, /* Default value, multicore not enabled.*/\r
- /* StartupHook */ NULL, /* Startup Hook */\r
- /* ShutdownHook */ NULL, /* Shutdown Hook */\r
- /* ErrorHook */ NULL, /* Error Hook */\r
+ /* StartupHook */ NULL,\r
+ /* ShutdownHook */ NULL,\r
+ /* ErrorHook */ NULL,\r
/* rstrtTaskId */ 0 /* NOT CONFIGURABLE IN TOOLS */\r
), \r
};\r
ALARM_ACTION_SETEVENT,\r
TASK_ID_eTask1,\r
EVENT_MASK_Event2,\r
- NULL,\r
+ 0,\r
APPLICATION_ID_OsApplication1, /* Application owner */\r
0 /* Accessing application mask */\r
),\r
\r
// ################################## TASKS #################################\r
GEN_TASK_HEAD = {\r
- GEN_BTASK( OsIdle,\r
- "OsIdle",\r
- 0,\r
- FULL,\r
- TRUE,\r
- NULL,\r
- 0,\r
- 1,\r
- 0,\r
- 0 \r
+ GEN_BTASK( /* */OsIdle,\r
+ /* name */"OsIdle",\r
+ /* priority */0,\r
+ /* schedule */FULL,\r
+ /* autostart */TRUE,\r
+ /* resource_int_p */NULL,\r
+ /* resource mask */0,\r
+ /* activation lim. */1,\r
+ /* App owner */0,\r
+ /* Accessing apps */0 \r
),\r
GEN_BTASK(\r
/* */bTask3,\r
/* name */TRUE,\r
/* resource_int_p */NULL,\r
/* resource mask */0,\r
+ /* event mask */1,\r
/* App owner */APPLICATION_ID_OsApplication1,\r
/* Accessing apps */0\r
), \r
/* name */TRUE,\r
/* resource_int_p */NULL,\r
/* resource mask */0,\r
+ /* event mask */1,\r
/* App owner */APPLICATION_ID_OsApplication1,\r
/* Accessing apps */0\r
), \r
};\r
\r
// ############################ SCHEDULE TABLES #############################\r
+\r
+\r
* Configured for (MCU): MPC551x\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.24\r
+* Generator version: 2.0.29\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
-* on Thu Mar 24 08:53:26 CET 2011\r
+* on Fri Apr 15 17:17:57 CEST 2011\r
*/\r
\r
\r
\r
// Event masks\r
-#define EVENT_MASK_Event1 2\r
-#define EVENT_MASK_Event2 4\r
+#define EVENT_MASK_Event1 1\r
+#define EVENT_MASK_Event2 1\r
\r
// Isr Id's\r
\r
#define OS_ISR2_CNT 0\r
#define OS_ISR1_CNT 0\r
\r
-/* New */\r
-#define OS_ISR_MAX_CNT 10 /* NOT CONFIGURABLE IN TOOLS */\r
+#define OS_ISR_MAX_CNT 10\r
\r
\r
#endif /*OS_CFG_H_*/\r
</INTEGER-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventAutoMask</DEFINITION-REF>\r
- <VALUE>false</VALUE>\r
+ <VALUE>true</VALUE>\r
</BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
<CONTAINER UUID="b3d27dc1-6efc-4eb8-8c33-1502ae5ab5ea">\r
</INTEGER-VALUE>\r
<BOOLEAN-VALUE>\r
<DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventAutoMask</DEFINITION-REF>\r
- <VALUE>false</VALUE>\r
+ <VALUE>true</VALUE>\r
</BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/ArcOsEventId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
</PARAMETER-VALUES>\r
</CONTAINER>\r
<CONTAINER UUID="f7992fcb-1ea5-400d-a4d3-0910c9eafef8">\r
void *Irq_Entry( void *stack_p );\r
#endif\r
\r
-//ISRType Irq_Attach( const OsIsrConstType *isrPtr );\r
+struct OsIsrConst;\r
+\r
ISRType Irq_Attach( int vector );\r
-ISRType Irq_Attach2( const OsIsrConstType * );\r
+ISRType Irq_Attach2( const struct OsIsrConst * );\r
\r
/**\r
* Attach an ISR type 1 to the interrupt controller.\r
\r
/*\r
* INCLUDE "RULES"\r
- * Since this types and methods defined here are used by the drivers, they should\r
+ * Since the types and methods defined here are used by the drivers, they should\r
* include it. E.g. #include "isr.h"\r
*\r
* This file is also used internally by the kernel\r
.appOwner = _app, \\r
}; \\r
\r
-#define _ISR_INSTALL_ISR2(_name, _entry, _unique, _vector,_priority,_app ) \\r
+\r
+#define __ISR_INSTALL_ISR2(_name, _entry, _unique, _vector,_priority,_app ) \\r
do { \\r
const OsIsrConstType _entry ## _unique = { \\r
.vector = _vector, \\r
Os_IsrAdd( & _entry ## _unique); \\r
} while(0);\r
\r
+\r
+\r
+#define _ISR_INSTALL_ISR2(_name,_entry, _unique, _vector,_priority,_app) \\r
+ __ISR_INSTALL_ISR2(_name,_entry, _unique, _vector,_priority,_app)\r
+\r
#define ISR_INSTALL_ISR2(_name,_entry, _vector,_priority,_app) \\r
_ISR_INSTALL_ISR2(_name,_entry, __LINE__, _vector,_priority,_app)\r
\r
\r
+#define ISR_DECLARE_ISR1(_name, _entry, _unique, _vector,_priority,_app ) \\r
+ const OsIsrConstType _entry ## _unique = { \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_1, \\r
+ .priority = _priority, \\r
+ .entry = _entry, \\r
+ .name = _name, \\r
+ .resourceMask = 0, \\r
+ .timingProtPtr = NULL, \\r
+ .appOwner = _app, \\r
+ }; \\r
+\r
+#define __ISR_INSTALL_ISR1(_name, _entry, _unique, _vector,_priority,_app ) \\r
+ do { \\r
+ const OsIsrConstType _entry ## _unique = { \\r
+ .vector = _vector, \\r
+ .type = ISR_TYPE_2, \\r
+ .priority = _priority, \\r
+ .entry = _entry, \\r
+ .name = _name, \\r
+ .resourceMask = 0, \\r
+ .timingProtPtr = NULL, \\r
+ .appOwner = _app, \\r
+ }; \\r
+ Os_IsrAdd( & _entry ## _unique); \\r
+ } while(0);\r
+\r
+#define _ISR_INSTALL_ISR1(_name,_entry, _unique, _vector,_priority,_app) \\r
+ __ISR_INSTALL_ISR1(_name,_entry, _unique, _vector,_priority,_app)\r
+\r
+#define ISR_INSTALL_ISR1(_name,_entry, _vector,_priority,_app) \\r
+ _ISR_INSTALL_ISR1(_name,_entry, __LINE__, _vector,_priority,_app)\r
+\r
+\r
+\r
/* ----------------------------[typedef]-------------------------------------*/\r
\r
\r
* OsIsrTimingProtection[C] 0..1\r
* */\r
\r
-typedef struct {\r
+typedef struct OsIsrConst {\r
const char *name;\r
uint8_t core;\r
int16_t vector;\r
* Currently used for calculating the ceiling priority.\r
*/\r
#define GEN_ETASK( _id, _name, _priority, _scheduling, \\r
- _autostart, _resource_int_p, _resource_mask, \\r
+ _autostart, _resource_int_p, _resource_mask, _event_mask, \\r
_appl_owner, _accessing_appl_mask ) \\r
{ \\r
.pid = TASK_ID_ ## _id, \\r
.resourceIntPtr = _resource_int_p, \\r
.scheduling = _scheduling, \\r
.resourceAccess = _resource_mask, \\r
+ .eventMask = _event_mask, \\r
.activationLimit = 1, \\r
.applOwnerId = _appl_owner, \\r
.accessingApplMask = _accessing_appl_mask, \\r
#define GEN_ISR2( _name, _vector, _priority, _entry, _appOwner, _resourceMask ) \\r
{ \\r
.vector = _vector, \\r
- .type = ISR_TYPE_1, \\r
+ .type = ISR_TYPE_2, \\r
.priority = _priority, \\r
.entry = _entry, \\r
.name = _name, \\r
* This service shall only be called from the extended task owning\r
* the event.\r
*\r
+ * From 7.6.1 in Autosar OS 4.0\r
+ * An event is accessible if the task for which the event can be set\r
+ * is accessible. Access means that these Operating System objects are\r
+ * allowed as parameters to API services.\r
+ *\r
* @param Mask Mask of the events waited for\r
* @return\r
*/\r
* OsAlarmAutostart[C] 0..1 Autostart\r
*/\r
typedef struct OsAlarm {\r
- char name[16];\r
+ //char name[16];\r
+ char *name;\r
/* Reference to counter */\r
struct OsCounter *counter;\r
\r
\r
static inline ApplicationType Os_AlarmGetApplicationOwner( AlarmType id ) {\r
ApplicationType rv;\r
-#if (OS_RESOURCE_CNT!=0)\r
+#if (OS_ALARM_CNT!=0)\r
rv = (id < OS_ALARM_CNT) ? Os_AlarmGet(id)->applOwnerId : INVALID_OSAPPLICATION;\r
#else\r
(void)id;\r
char name[16];\r
enum OsTaskSchedule scheduling;\r
uint32_t resourceAccess;\r
+ uint32_t eventMask;\r
// pointer to internal resource\r
// NULL if none\r
OsResourceType *resourceIntPtr;\r
ISRType id;
id = Os_Sys.isrCnt++;
- /* We have no VAR entires for ISR1 */
- if( isrPtr->type == ISR_TYPE_2) {
- Os_IsrVarList[id].constPtr = isrPtr;
- }
+ Os_IsrVarList[id].constPtr = isrPtr;
Os_VectorToIsr[isrPtr->vector] = id;
Irq_EnableVector( isrPtr->vector, isrPtr->priority, Os_ApplGetCore(isrPtr->appOwner ) );
OsIsrVarType *isrPtr = &Os_IsrVarList[Os_VectorToIsr[vector]];
OsTaskVarType *taskPtr = NULL;
+ assert( isrPtr != NULL );
+// if( isrPtr == NULL ) {
+// Os_ArchPanic(OS_ERR_SPURIOUS_INTERRUPT, NULL, NULL );
+// }
+
+ if( isrPtr->constPtr->type == ISR_TYPE_1) {
+ isrPtr->constPtr->entry();
+ return stack;
+ }
+
/* Check if we interrupted a task or ISR */
if( Os_Sys.intNestCnt == 0 ) {
/* We interrupted a task */
projects / arc.git / commitdiff