1 /*******************************************************************
2 Components for embedded applications builded for
3 laboratory and medical instruments firmware
5 system_def_jt_usb1.h - definition of hardware adresses and registers
7 Copyright (C) 2002 by Pavel Pisa pisa@cmp.felk.cvut.cz
8 (C) 2002 by PiKRON Ltd. http://www.pikron.com
10 *******************************************************************/
12 #ifndef _SYSTEM_DEF_HW01_H_
13 #define _SYSTEM_DEF_HW01_H_
15 //#define CPU_REF_HZ 11059200l /* reference clock frequency */
16 //#define CPU_SYS_HZ 11059200l /* default system clock frequency */
18 #define CPU_REF_HZ 4000000l /* reference clock frequency */
19 //#define CPU_SYS_HZ 24000000l /* default system clock frequency */
20 #define CPU_SYS_HZ 16000000l /* default system clock frequency */
23 unsigned long cpu_ref_hz; /* actual external XTAL reference */
24 unsigned long cpu_sys_hz; /* actual system clock frequency */
26 volatile unsigned long msec_time;
29 /* No external RAM available */
31 #undef XRAM_SUPPORT_ENABLED
35 #define ISR_USB_INTV EXCPTVEC_IRQ6 /* pin IRQ6 on PG.0 */
36 #define PDIUSB_TEST_IRQ() (!(*DIO_PORTG & 1))
37 #define PDIUSB_READ_DATA_ADDR (volatile __u8 * const)(0x600000)
38 #define PDIUSB_WRITE_DATA_ADDR (volatile __u8 * const)(0x600000)
39 #define PDIUSB_COMMAND_ADDR (volatile __u8 * const)(0x600001)
41 /* P1.0 .. DACK_N/DMACK0, P7.0 .. DMREQ/DREQ0, P7.2 .. EOT_N/TEND0 */
42 #undef PDIUSB_WITH_ADD_IRQ_HANDLER
43 #define PDIUSB_WITH_EXCPTVECT_SET
44 #define PDIUSB_SUPPORT_ENABLED
47 /* IRAM 16 kB of on-chip memory */
48 /* 0xffb000-0xffcfff .. 8 kB free */
49 /* 0xffd000-0xffdfff .. 4 kB for Flash emulation */
50 /* 0xffe000-0xffffc0 .. 4 kB - 64 B free*/
51 /* 0xffffc0-0xffffff .. 64 B free*/
52 #define IRAM_START (volatile __u8 * const)(0xffb000)
53 #define IRAM_START1 (volatile __u8 * const)(0xffe000)
54 #define FRAM_START (volatile __u8 * const)(0xffffc0)
56 /* SCI0 - RS232/485 */
58 /* SCI2 - RS232/Boot */
64 /* Some registers are read only on H8S processors */
65 /* We use shadow registers for some of them */
66 #define SHADOW_REG_ALT(_reg,_mask,_xor) \
67 (*(_reg)=_reg##_shadow=(_reg##_shadow&~(_mask))^(_xor))
69 #define SHADOW_REG_SET(_reg,_mask) \
70 (*(_reg)=_reg##_shadow|=(_mask))
72 #define SHADOW_REG_CLR(_reg,_mask) \
73 (*(_reg)=_reg##_shadow&=~(_mask))
75 #define SHADOW_REG_RD(_reg) \
78 #define SHADOW_REG_WR(_reg,_val) \
79 (*(_reg)=_reg##_shadow=(_val))
81 __u8 DIO_P1DDR_shadow;
82 __u8 DIO_P3DDR_shadow;
83 __u8 DIO_P7DDR_shadow;
84 __u8 DIO_PFDDR_shadow;
85 __u8 DIO_PGDDR_shadow;
87 #define DEB_LED_INIT() \
88 do { /* set P3.2, P3.6, P3.7 LED output */ \
89 *DIO_P3DR |= (P3DR_P32DRm | P3DR_P36DRm | P3DR_P37DRm);\
90 SHADOW_REG_SET(DIO_P3DDR,(P3DDR_P32DDRm|P3DDR_P36DDRm|P3DDR_P37DDRm));\
93 #define DEB_LED_OFF(num) \
94 do{switch(num){ case 0: *DIO_P3DR |= P3DR_P32DRm; \
95 case 1: *DIO_P3DR |= P3DR_P36DRm; \
96 case 2: *DIO_P3DR |= P3DR_P37DRm; }}while(0)
97 #define DEB_LED_ON(num) \
98 do{switch(num){ case 0: *DIO_P3DR &= ~P3DR_P32DRm; \
99 case 1: *DIO_P3DR &= ~P3DR_P36DRm; \
100 case 2: *DIO_P3DR &= ~P3DR_P37DRm; }}while(0)
102 #endif /* _SYSTEM_DEF_HW01_H_ */