arm64: mm: remove swtch to ASID0 in context swtch

Removing switch to ASID0 [1] in kernel thread switch as
in aarch64 this is not required since the TTBR and ASID
are updated together.

Bug 1506465

Change-Id: I7989dd74e79eb2305c962891ca63afef4fbeb853
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: http://git-master/r/401699
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Nickolas Fortino <nfortino@nvidia.com>

diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index 237635d8a46ffac72f17de35ab1f2aac6bb71b78..04586a88487b6f07b341ef63d62296fb1718dde6 100644 (file)
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -78,11 +78,8 @@ static inline void switch_new_context(struct mm_struct *mm)
 static inline void check_and_switch_context(struct mm_struct *mm,
                                            struct task_struct *tsk)
 {
-       /*
-        * Required during context switch to avoid speculative page table
-        * walking with the wrong TTBR.
-        */
-       cpu_set_reserved_ttbr0();
+       /* unneeded switch to ASID0 */
+       /* cpu_set_reserved_ttbr0(); */
 
        if (!((mm->context.id ^ cpu_last_asid) >> max_asid_bits))
                /*