]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
Revert "arm64:mm: rm swtch to ASID0 in ctxt swtch"
authorRohit Khanna <rokhanna@nvidia.com>
Wed, 7 Sep 2016 20:00:23 +0000 (13:00 -0700)
committerWinnie Hsu <whsu@nvidia.com>
Wed, 21 Sep 2016 21:27:10 +0000 (14:27 -0700)
This reverts commit 584b60200b8bdcc895c8edacb94f48db5929f70a.

Change-Id: Ibe5b217521b77fa5799400b9460182e3329e1779
Signed-off-by: Rohit Khanna <rokhanna@nvidia.com>
Reviewed-on: http://git-master/r/1216501
(cherry picked from commit 04c8d66d61e15198b95d54672b2f2fe047d180b3)
Reviewed-on: http://git-master/r/1223589
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
GVS: Gerrit_Virtual_Submit

arch/arm64/include/asm/mmu_context.h

index e141db0e1b51586120bb790a80b93e32d19f558d..ee65dc999fc4b699003c3d577bd04ac050888c50 100644 (file)
@@ -78,8 +78,11 @@ static inline void switch_new_context(struct mm_struct *mm)
 static inline void check_and_switch_context(struct mm_struct *mm,
                                            struct task_struct *tsk)
 {
-       /* unneeded switch to ASID0 */
-       /* cpu_set_reserved_ttbr0(); */
+       /*
+        * Required during context switch to avoid speculative page table
+        * walking with the wrong TTBR.
+        */
+       cpu_set_reserved_ttbr0();
 
        if (!((mm->context.id ^ cpu_last_asid) >> MAX_ASID_BITS))
                /*