From: Rohit Khanna Date: Wed, 7 Sep 2016 20:00:23 +0000 (-0700) Subject: Revert "arm64:mm: rm swtch to ASID0 in ctxt swtch" X-Git-Tag: tegra-l4t-r24.2.1~13 X-Git-Url: http://rtime.felk.cvut.cz/gitweb/sojka/nv-tegra/linux-3.10.git/commitdiff_plain/112ff312f0d4e21795dca87457e5ff6c370f1712 Revert "arm64:mm: rm swtch to ASID0 in ctxt swtch" This reverts commit 584b60200b8bdcc895c8edacb94f48db5929f70a. Change-Id: Ibe5b217521b77fa5799400b9460182e3329e1779 Signed-off-by: Rohit Khanna Reviewed-on: http://git-master/r/1216501 (cherry picked from commit 04c8d66d61e15198b95d54672b2f2fe047d180b3) Reviewed-on: http://git-master/r/1223589 Reviewed-by: Bibek Basu Tested-by: Bibek Basu Reviewed-by: Winnie Hsu GVS: Gerrit_Virtual_Submit --- diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index e141db0e1b5..ee65dc999fc 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -78,8 +78,11 @@ static inline void switch_new_context(struct mm_struct *mm) static inline void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk) { - /* unneeded switch to ASID0 */ - /* cpu_set_reserved_ttbr0(); */ + /* + * Required during context switch to avoid speculative page table + * walking with the wrong TTBR. + */ + cpu_set_reserved_ttbr0(); if (!((mm->context.id ^ cpu_last_asid) >> MAX_ASID_BITS)) /*