powerpc/mpc5xxx: add OF platform binding doc for FSL MSCAN devices

From net-next-2.6 commit 932a3bca9a21c05a856891921d0164b5f0dcbff7

This patch adds documentation for the MSCAN OF device bindings for
the MPC512x and moves the one for the MPC5200 to the new common file
"Documentation/powerpc/dts-bindings/fsl/can.txt".

Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
git-svn-id: svn://svn.berlios.de//socketcan/trunk@1106 030b6a49-0b11-0410-94ab-b0dab22257f2

diff --git a/kernel/2.6/Documentation/powerpc/dts-bindings/fsl/can.txt b/kernel/2.6/Documentation/powerpc/dts-bindings/fsl/can.txt
new file mode 100644 (file)
index 0000000..2fa4fcd
--- /dev/null
+++ b/kernel/2.6/Documentation/powerpc/dts-bindings/fsl/can.txt
@@ -0,0 +1,53 @@
+CAN Device Tree Bindings
+------------------------
+
+(c) 2006-2009 Secret Lab Technologies Ltd
+Grant Likely <grant.likely@secretlab.ca>
+
+fsl,mpc5200-mscan nodes
+-----------------------
+In addition to the required compatible-, reg- and interrupt-properties, you can
+also specify which clock source shall be used for the controller:
+
+- fsl,mscan-clock-source : a string describing the clock source. Valid values
+                          are: "ip" for ip bus clock
+                                "ref" for reference clock (XTAL)
+                          "ref" is default in case this property is not
+                          present.
+
+fsl,mpc5121-mscan nodes
+-----------------------
+In addition to the required compatible-, reg- and interrupt-properties, you can
+also specify which clock source and divider shall be used for the controller:
+
+- fsl,mscan-clock-source : a string describing the clock source. Valid values
+                          are: "ip" for ip bus clock
+                               "ref" for reference clock
+                               "sys" for system clock
+                          If this property is not present, an optimal CAN
+                          clock source and frequency based on the system
+                          clock will be selected. If this is not possible,
+                          the reference clock will be used.
+
+- fsl,mscan-clock-divider: for the reference and system clock, an additional
+                          clock divider can be specified. By default, a
+                          value of 1 is used.
+
+Note that the MPC5121 Rev. 1 processor is not supported.
+
+Examples:
+       can@1300 {
+               compatible = "fsl,mpc5121-mscan";
+               interrupts = <12 0x8>;
+               interrupt-parent = <&ipic>;
+               reg = <0x1300 0x80>;
+       };
+
+       can@1380 {
+               compatible = "fsl,mpc5121-mscan";
+               interrupts = <13 0x8>;
+               interrupt-parent = <&ipic>;
+               reg = <0x1380 0x80>;
+               fsl,mscan-clock-source = "ref";
+               fsl,mscan-clock-divider = <3>;
+       };