7 * CAN bus driver for the alone generic (as possible as) MSCAN controller.
10 * Andrey Volkov <avolkov@varma-el.com>
13 * 2005-2006, Varma Electronics Oy
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <linux/autoconf.h>
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/interrupt.h>
36 #include <linux/delay.h>
37 #include <linux/netdevice.h>
38 #include <linux/can.h>
39 #include <linux/list.h>
42 #include <linux/can/dev.h>
43 #include <linux/can/error.h>
46 #define MSCAN_NORMAL_MODE 0
47 #define MSCAN_SLEEP_MODE MSCAN_SLPRQ
48 #define MSCAN_INIT_MODE (MSCAN_INITRQ | MSCAN_SLPRQ)
49 #define MSCAN_POWEROFF_MODE (MSCAN_CSWAI | MSCAN_SLPRQ)
51 #define BTR0_BRP_MASK 0x3f
52 #define BTR0_SJW_SHIFT 6
53 #define BTR0_SJW_MASK (0x3 << BTR0_SJW_SHIFT)
55 #define BTR1_TSEG1_MASK 0xf
56 #define BTR1_TSEG2_SHIFT 4
57 #define BTR1_TSEG2_MASK (0x7 << BTR1_TSEG2_SHIFT)
58 #define BTR1_SAM_SHIFT 7
60 #define BTR0_SET_BRP(brp) (((brp)-1)&BTR0_BRP_MASK)
61 #define BTR0_SET_SJW(sjw) ((((sjw)-1)<<BTR0_SJW_SHIFT)&BTR0_SJW_MASK)
63 #define BTR1_SET_TSEG1(tseg1) (((tseg1)-1)&BTR1_TSEG1_MASK)
64 #define BTR1_SET_TSEG2(tseg2) ((((tseg2)-1)<<BTR1_TSEG2_SHIFT)&BTR1_TSEG2_MASK)
65 #define BTR1_SET_SAM(sam) (((sam)&1)<<BTR1_SAM_SHIFT)
73 #define TX_QUEUE_SIZE 3
76 struct list_head list;
81 volatile unsigned long flags;
87 struct list_head tx_head;
88 tx_queue_entry_t tx_queue[TX_QUEUE_SIZE];
91 #define F_RX_PROGRESS 0
92 #define F_TX_PROGRESS 1
93 #define F_TX_WAIT_ALL 2
95 static int mscan_set_mode(struct can_device *can, u8 mode)
97 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
102 if( mode != MSCAN_NORMAL_MODE ) {
103 canctl1 = in_8(®s->canctl1);
104 if ((mode & MSCAN_SLPRQ) && (canctl1 & MSCAN_SLPAK) == 0) {
105 out_8( ®s->canctl0, in_8(®s->canctl0) | MSCAN_SLPRQ );
106 for (i = 0; i < 255; i++ ) {
107 if ( in_8(®s->canctl1) & MSCAN_SLPAK )
115 if ( !ret && (mode & MSCAN_INITRQ) && (canctl1 & MSCAN_INITAK) == 0) {
116 out_8( ®s->canctl0, in_8( ®s->canctl0 ) | MSCAN_INITRQ);
117 for (i = 0; i < 255; i++ ) {
118 if ( in_8(®s->canctl1) & MSCAN_INITAK )
125 if ( !ret && (mode & MSCAN_CSWAI) )
126 out_8( ®s->canctl0, in_8(®s->canctl0) | MSCAN_CSWAI);
129 canctl1 = in_8(®s->canctl1);
130 if ( canctl1 & (MSCAN_SLPAK | MSCAN_INITAK) ) {
131 out_8(®s->canctl0, in_8(®s->canctl0) &
132 ~(MSCAN_SLPRQ | MSCAN_INITRQ));
133 for (i = 0; i < 255; i++ ) {
134 canctl1 = in_8(®s->canctl1);
135 if ( (canctl1 & (MSCAN_INITAK | MSCAN_SLPAK)) ==0 )
145 static void mscan_push_state(struct can_device *can, struct mscan_state *state)
147 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
149 state->mode = in_8(®s->canctl0) &
150 (MSCAN_SLPRQ | MSCAN_INITRQ | MSCAN_CSWAI);
151 state->canrier = in_8(®s->canrier);
152 state->cantier = in_8(®s->cantier);
155 static int mscan_pop_state(struct can_device *can, struct mscan_state *state)
157 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
159 ret = mscan_set_mode(can, state->mode);
161 out_8( ®s->canrier, state->canrier);
162 out_8( ®s->cantier, state->cantier);
167 static int mscan_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev)
169 struct can_frame *frame = (struct can_frame *)skb->data;
170 struct can_device *can = ND2CAN(ndev);
171 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
172 struct mscan_priv *priv = can->priv;
176 if ( frame->can_dlc > 8 )
179 dev_dbg( ND2D(ndev), "%s\n", __FUNCTION__);
180 out_8(®s->cantier, 0);
182 i = ~priv->tx_active & MSCAN_TXE;
184 switch ( hweight8(i) ) {
186 netif_stop_queue(ndev);
187 dev_err( ND2D(ndev), "BUG! Tx Ring full when queue awake!\n" );
188 return NETDEV_TX_BUSY;
190 /* if buf_id < 3, then current frame will be send out of order,
191 since buffer with lower id have higher priority (hell..) */
194 if(priv->cur_pri==0xff)
195 set_bit(F_TX_WAIT_ALL, &priv->flags);
196 netif_stop_queue(ndev);
198 set_bit(F_TX_PROGRESS, &priv->flags);
200 out_8(®s->cantbsel, i);
202 rtr = frame->can_id & CAN_RTR_FLAG;
204 if (frame->can_id & CAN_EFF_FLAG) {
205 dev_dbg(ND2D(ndev), "sending extended frame\n");
207 can_id = (frame->can_id & CAN_EFF_MASK) << 1;
210 out_be16(®s->tx.idr3_2, can_id);
213 can_id = (can_id & 0x7) | ((can_id<<2) & 0xffe0) | (3<<3);
215 dev_dbg(ND2D(ndev), "sending standard frame\n");
216 can_id = (frame->can_id & CAN_SFF_MASK) << 5;
220 out_be16(®s->tx.idr1_0, can_id);
223 volatile void __iomem *data = ®s->tx.dsr1_0;
224 u16 *payload = (u16 *)frame->data;
225 /*Its safe to write into dsr[dlc+1]*/
226 for (i=0; i<(frame->can_dlc+1)/2; i++) {
227 out_be16(data, *payload++);
228 data += 2+_MSCAN_RESERVED_DSR_SIZE;
232 out_8(®s->tx.dlr, frame->can_dlc);
233 out_8(®s->tx.tbpr, priv->cur_pri);
235 /* Start transmission. */
236 out_8(®s->cantflg, 1<<buf_id);
238 if ( ! test_bit(F_TX_PROGRESS, &priv->flags) )
239 ndev->trans_start = jiffies;
241 list_add_tail( &priv->tx_queue[buf_id].list, &priv->tx_head);
245 /* Enable interrupt. */
246 priv->tx_active |= 1<<buf_id;
247 out_8( ®s->cantier, priv->tx_active);
253 static void mscan_tx_timeout(struct net_device *ndev)
256 struct can_device *can = ND2CAN(ndev);
257 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
258 struct mscan_priv *priv = can->priv;
259 struct can_frame *frame;
262 printk ("%s\n", __FUNCTION__);
264 out_8(®s->cantier, 0);
266 mask = list_entry( priv->tx_head.next, tx_queue_entry_t, list)->mask;
267 ndev->trans_start = jiffies;
268 out_8(®s->cantarq, mask);
269 out_8(®s->cantier, priv->tx_active);
271 skb = dev_alloc_skb(sizeof(struct can_frame));
273 if(printk_ratelimit())
274 dev_notice(ND2D(ndev), "TIMEOUT packet dropped\n");
277 frame = (struct can_frame *)skb_put(skb,sizeof(struct can_frame));
279 frame->can_id = CAN_ERR_FLAG | CAN_ERR_TX_TIMEOUT;
280 frame->can_dlc = CAN_ERR_DLC;
283 skb->protocol = __constant_htons(ETH_P_CAN);
284 skb->ip_summed = CHECKSUM_UNNECESSARY;
289 static can_state_t state_map[] = {
291 CAN_STATE_BUS_WARNING,
292 CAN_STATE_BUS_PASSIVE,
296 static inline int check_set_state(struct can_device *can, u8 canrflg)
301 if ( !(canrflg & MSCAN_CSCIF) || can->state > CAN_STATE_BUS_OFF)
304 state = state_map[max( MSCAN_STATE_RX(canrflg), MSCAN_STATE_TX(canrflg))];
305 if(can->state < state)
307 if(state == CAN_STATE_BUS_OFF)
308 netif_carrier_off(CAN2ND(can));
309 else if(can->state == CAN_STATE_BUS_OFF && state != CAN_STATE_BUS_OFF)
310 netif_carrier_on(CAN2ND(can));
315 static int mscan_rx_poll(struct net_device *ndev, int *budget)
317 struct can_device *can = ND2CAN(ndev);
318 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
319 struct mscan_priv *priv = can->priv;
320 int npackets = 0, quota = min(ndev->quota, *budget);
323 struct can_frame *frame;
328 while ( npackets < quota &&
329 ( (canrflg = in_8(®s->canrflg)) & (MSCAN_RXF | MSCAN_ERR_IF) )) {
331 skb = dev_alloc_skb(sizeof(struct can_frame));
333 if(printk_ratelimit())
334 dev_notice(ND2D(ndev), "packet dropped\n");
335 can->net_stats.rx_dropped++;
336 out_8(®s->canrflg, canrflg);
340 frame = (struct can_frame *)skb_put(skb,sizeof(struct can_frame));
342 if (canrflg & MSCAN_RXF) {
343 can_id = in_be16( ®s->rx.idr1_0 );
344 if (can_id & (1<<3) ) {
345 frame->can_id = CAN_EFF_FLAG;
346 can_id = (can_id << 16) | in_be16(®s->rx.idr3_2);
347 can_id = ((can_id & 0xffe00000) | ((can_id & 0x7ffff) << 2 ))>>2;
354 frame->can_id |= can_id>>1;
356 frame->can_id |= CAN_RTR_FLAG;
357 frame->can_dlc = in_8(®s->rx.dlr) & 0xf;
359 if( !(frame->can_id & CAN_RTR_FLAG ) ) {
360 volatile void __iomem * data = ®s->rx.dsr1_0;
361 u16 *payload = (u16 *)frame->data;
362 for (i=0; i<(frame->can_dlc+1)/2; i++) {
363 *payload++ = in_be16(data);
364 data += 2+_MSCAN_RESERVED_DSR_SIZE;
368 dev_dbg(ND2D(ndev), "received pkt: id: %u dlc: %u data: ",
369 frame->can_id,frame->can_dlc);
371 for(i=0; i<frame->can_dlc && !(frame->can_id & CAN_FLAG_RTR ); i++)
372 printk( "%2x ",frame->data[i]);
376 out_8(®s->canrflg, MSCAN_RXF);
377 ndev->last_rx = jiffies;
378 can->net_stats.rx_packets++;
379 can->net_stats.rx_bytes += frame->can_dlc;
381 else if (canrflg & MSCAN_ERR_IF ) {
382 frame->can_id = CAN_ERR_FLAG;
384 if (canrflg & MSCAN_OVRIF) {
385 frame->can_id |= CAN_ERR_CRTL;
386 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
387 can->net_stats.rx_over_errors++;
392 if ( check_set_state(can, canrflg)) {
393 frame->can_id |= CAN_ERR_CRTL;
394 switch( can->state ) {
395 case CAN_STATE_BUS_WARNING:
396 if( (priv->shadow_statflg & MSCAN_RSTAT_MSK) <
397 (canrflg & MSCAN_RSTAT_MSK))
398 frame->data[1] |= CAN_ERR_CRTL_RX_WARNING;
400 if( (priv->shadow_statflg & MSCAN_TSTAT_MSK) <
401 (canrflg & MSCAN_TSTAT_MSK))
402 frame->data[1] |= CAN_ERR_CRTL_TX_WARNING;
404 case CAN_STATE_BUS_PASSIVE:
405 frame->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
407 case CAN_STATE_BUS_OFF:
408 frame->can_id |= CAN_ERR_BUSOFF;
409 frame->can_id &= ~CAN_ERR_CRTL;
413 priv->shadow_statflg = canrflg & MSCAN_STAT_MSK;
414 frame->can_dlc = CAN_ERR_DLC;
415 out_8(®s->canrflg, MSCAN_ERR_IF);
420 skb->protocol = __constant_htons(ETH_P_CAN);
421 skb->ip_summed = CHECKSUM_UNNECESSARY;
422 netif_receive_skb(skb);
426 ndev->quota -= npackets;
428 if ( !(in_8(®s->canrflg) & (MSCAN_RXF | MSCAN_ERR_IF))) {
429 netif_rx_complete(ndev);
430 clear_bit(F_RX_PROGRESS, &priv->flags);
431 out_8(®s->canrier, in_8(®s->canrier) | MSCAN_ERR_IF | MSCAN_RXFIE);
438 mscan_isr(int irq, void *dev_id, struct pt_regs *r)
440 struct net_device *ndev = (struct net_device *) dev_id;
441 struct can_device *can = ND2CAN(ndev);
442 struct mscan_regs *regs = (struct mscan_regs *)(ndev->base_addr);
443 struct mscan_priv *priv = can->priv;
445 irqreturn_t ret = IRQ_NONE;
447 if ( in_8(®s->cantier) & MSCAN_TXE )
449 struct list_head *tmp, *pos;
451 cantflg = in_8(®s->cantflg) & MSCAN_TXE;
453 list_for_each_safe(pos, tmp, &priv->tx_head) {
454 tx_queue_entry_t *entry = list_entry(pos, tx_queue_entry_t, list);
455 u8 mask = entry->mask;
457 if( !(cantflg & mask) )
460 if ( in_8(®s->cantaak) & mask ) {
461 can->net_stats.tx_dropped++;
462 can->net_stats.tx_aborted_errors++;
465 out_8(®s->cantbsel, mask);
466 can->net_stats.tx_bytes += in_8(®s->tx.dlr);
467 can->net_stats.tx_packets++;
469 priv->tx_active &= ~mask;
473 if ( list_empty(&priv->tx_head) ) {
474 clear_bit(F_TX_WAIT_ALL, &priv->flags);
475 clear_bit(F_TX_PROGRESS, &priv->flags);
479 ndev->trans_start = jiffies;
481 if( !test_bit(F_TX_WAIT_ALL, &priv->flags) )
482 netif_wake_queue(ndev);
484 out_8( ®s->cantier, priv->tx_active );
488 if ( !test_and_set_bit(F_RX_PROGRESS, &priv->flags) &&
489 (((canrflg = in_8(®s->canrflg)) & ~MSCAN_STAT_MSK))) {
490 if ( check_set_state(can, canrflg) ) {
491 out_8(®s->canrflg, MSCAN_CSCIF);
494 if (canrflg & ~MSCAN_STAT_MSK) {
495 priv->shadow_canrier = in_8(®s->canrier);
496 out_8(®s->canrier, 0);
497 netif_rx_schedule(ndev);
501 clear_bit(F_RX_PROGRESS, &priv->flags);
506 static int mscan_do_set_mode(struct can_device *can, can_mode_t mode)
511 netif_stop_queue(CAN2ND(can));
513 (mode==CAN_MODE_STOP)? MSCAN_INIT_MODE: MSCAN_SLEEP_MODE);
516 printk("%s: CAN_MODE_START requested\n",__FUNCTION__);
517 mscan_set_mode(can, MSCAN_NORMAL_MODE);
518 netif_wake_queue(CAN2ND(can));
528 int mscan_do_set_bit_time(struct can_device *can, struct can_bittime *bt)
532 struct mscan_state state;
533 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
535 if(bt->type != CAN_BITTIME_STD)
538 spin_lock_irq(&can->irq_lock);
540 mscan_push_state(can, &state);
541 ret = mscan_set_mode(can, MSCAN_INIT_MODE);
543 reg = BTR0_SET_BRP(bt->std.brp) | BTR0_SET_SJW(bt->std.sjw);
544 out_8(®s->canbtr0, reg);
546 reg = BTR1_SET_TSEG1(bt->std.prop_seg + bt->std.phase_seg1) |
547 BTR1_SET_TSEG2(bt->std.phase_seg2) | BTR1_SET_SAM(bt->std.sam);
548 out_8(®s->canbtr1, reg);
550 ret = mscan_pop_state(can, &state);
553 spin_unlock_irq(&can->irq_lock);
557 static int mscan_open(struct net_device *ndev)
560 struct can_device *can = ND2CAN(ndev);
561 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
562 struct mscan_priv *priv = can->priv;
564 if((ret = request_irq(ndev->irq, mscan_isr, SA_SHIRQ, ndev->name, ndev)) < 0) {
565 printk(KERN_ERR "%s - failed to attach interrupt\n", ndev->name);
569 INIT_LIST_HEAD(&priv->tx_head);
570 /* acceptance mask/acceptance code (accept everything) */
571 out_be16(®s->canidar1_0, 0);
572 out_be16(®s->canidar3_2, 0);
573 out_be16(®s->canidar5_4, 0);
574 out_be16(®s->canidar7_6, 0);
576 out_be16(®s->canidmr1_0, 0xffff);
577 out_be16(®s->canidmr3_2, 0xffff);
578 out_be16(®s->canidmr5_4, 0xffff);
579 out_be16(®s->canidmr7_6, 0xffff);
580 /* Two 32 bit Acceptance Filters */
581 out_8(®s->canidac, MSCAN_AF_32BIT);
583 out_8(®s->canctl1, in_8(®s->canctl1) & ~MSCAN_LISTEN);
584 mscan_set_mode( can, MSCAN_NORMAL_MODE);
586 priv->shadow_statflg = in_8(®s->canrflg) & MSCAN_STAT_MSK;
590 out_8(®s->cantier, 0);
591 /* Enable receive interrupts. */
592 out_8(®s->canrier, MSCAN_OVRIE | MSCAN_RXFIE | MSCAN_CSCIE |
593 MSCAN_RSTATE1 | MSCAN_RSTATE0 |
594 MSCAN_TSTATE1 | MSCAN_TSTATE0);
596 netif_start_queue(ndev);
601 static int mscan_close(struct net_device *ndev)
603 struct can_device *can = ND2CAN(ndev);
604 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
606 netif_stop_queue(ndev);
608 /* disable interrupts */
609 out_8(®s->cantier, 0);
610 out_8(®s->canrier, 0);
611 free_irq(ndev->irq, ndev);
613 mscan_set_mode( can, MSCAN_INIT_MODE);
617 int mscan_register(struct can_device *can, int clock_src)
619 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
622 ctl1 = in_8(®s->canctl1);
624 ctl1 |= MSCAN_CLKSRC;
626 ctl1 &= ~MSCAN_CLKSRC;
629 out_8(®s->canctl1, ctl1);
632 mscan_set_mode( can, MSCAN_INIT_MODE );
634 return register_netdev(CAN2ND(can));
636 EXPORT_SYMBOL(mscan_register);
638 void mscan_unregister(struct can_device *can)
640 struct mscan_regs *regs = (struct mscan_regs *)(CAN2ND(can)->base_addr);
641 mscan_set_mode( can, MSCAN_INIT_MODE );
642 out_8(®s->canctl1, in_8(®s->canctl1) & ~MSCAN_CANE);
643 unregister_netdev(CAN2ND(can));
646 EXPORT_SYMBOL(mscan_unregister);
648 struct can_device *alloc_mscandev()
650 struct can_device *can;
651 struct net_device *ndev;
652 struct mscan_priv *priv;
655 can = alloc_candev(sizeof(struct mscan_priv));
661 ndev->watchdog_timeo = MSCAN_WATCHDOG_TIMEOUT;
662 ndev->open = mscan_open;
663 ndev->stop = mscan_close;
664 ndev->hard_start_xmit = mscan_hard_start_xmit;
665 ndev->tx_timeout = mscan_tx_timeout;
667 ndev->poll = mscan_rx_poll;
670 can->do_set_bit_time = mscan_do_set_bit_time;
671 can->do_set_mode = mscan_do_set_mode;
673 for(i=0; i< TX_QUEUE_SIZE; i++)
674 priv->tx_queue[i].mask = 1<<i;
679 EXPORT_SYMBOL(alloc_mscandev);
681 MODULE_AUTHOR("Andrey Volkov <avolkov@varma-el.com>");
682 MODULE_LICENSE("GPL v2");
683 MODULE_DESCRIPTION("CAN port driver for a mscan based chips");