2 * CAN bus driver for Microchip 251x CAN Controller with SPI Interface
4 * MCP2510 support and bug fixes by Christian Pellegrin
5 * <chripell@evolware.org>
7 * Copyright 2009 Christian Pellegrin EVOL S.r.l.
9 * Copyright 2007 Raymarine UK, Ltd. All Rights Reserved.
10 * Written under contract by:
11 * Chris Elston, Katalix Systems, Ltd.
13 * Based on Microchip MCP251x CAN controller driver written by
14 * David Vrabel, Copyright 2006 Arcom Control Systems Ltd.
16 * Based on CAN bus driver for the CCAN controller written by
17 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix
18 * - Simon Kallweit, intefo AG
21 * This program is free software; you can redistribute it and/or modify
22 * it under the terms of the version 2 of the GNU General Public License
23 * as published by the Free Software Foundation
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
36 * Your platform definition file should specify something like:
38 * static struct mcp251x_platform_data mcp251x_info = {
39 * .oscillator_frequency = 8000000,
40 * .board_specific_setup = &mcp251x_setup,
41 * .model = CAN_MCP251X_MCP2510,
42 * .power_enable = mcp251x_power_enable,
43 * .transceiver_enable = NULL,
46 * static struct spi_board_info spi_board_info[] = {
48 * .modalias = "mcp251x",
49 * .platform_data = &mcp251x_info,
51 * .max_speed_hz = 2*1000*1000,
56 * Please see mcp251x.h for a description of the fields in
57 * struct mcp251x_platform_data.
61 #include <linux/completion.h>
62 #include <linux/delay.h>
63 #include <linux/device.h>
64 #include <linux/dma-mapping.h>
65 #include <linux/freezer.h>
66 #include <linux/interrupt.h>
68 #include <linux/kernel.h>
69 #include <linux/module.h>
70 #include <linux/netdevice.h>
71 #include <linux/platform_device.h>
72 #include <linux/spi/spi.h>
73 #include <linux/uaccess.h>
74 #include <socketcan/can.h>
75 #include <socketcan/can/core.h>
76 #include <socketcan/can/dev.h>
77 #include <socketcan/can/platform/mcp251x.h>
79 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
80 #error This driver does not support Kernel versions < 2.6.22
83 /* SPI interface instruction set */
84 #define INSTRUCTION_WRITE 0x02
85 #define INSTRUCTION_READ 0x03
86 #define INSTRUCTION_BIT_MODIFY 0x05
87 #define INSTRUCTION_LOAD_TXB(n) (0x40 + 2 * (n))
88 #define INSTRUCTION_READ_RXB(n) (((n) == 0) ? 0x90 : 0x94)
89 #define INSTRUCTION_RESET 0xC0
91 /* MPC251x registers */
94 # define CANCTRL_REQOP_MASK 0xe0
95 # define CANCTRL_REQOP_CONF 0x80
96 # define CANCTRL_REQOP_LISTEN_ONLY 0x60
97 # define CANCTRL_REQOP_LOOPBACK 0x40
98 # define CANCTRL_REQOP_SLEEP 0x20
99 # define CANCTRL_REQOP_NORMAL 0x00
100 # define CANCTRL_OSM 0x08
101 # define CANCTRL_ABAT 0x10
105 # define CNF1_SJW_SHIFT 6
107 # define CNF2_BTLMODE 0x80
108 # define CNF2_SAM 0x40
109 # define CNF2_PS1_SHIFT 3
111 # define CNF3_SOF 0x08
112 # define CNF3_WAKFIL 0x04
113 # define CNF3_PHSEG2_MASK 0x07
115 # define CANINTE_MERRE 0x80
116 # define CANINTE_WAKIE 0x40
117 # define CANINTE_ERRIE 0x20
118 # define CANINTE_TX2IE 0x10
119 # define CANINTE_TX1IE 0x08
120 # define CANINTE_TX0IE 0x04
121 # define CANINTE_RX1IE 0x02
122 # define CANINTE_RX0IE 0x01
124 # define CANINTF_MERRF 0x80
125 # define CANINTF_WAKIF 0x40
126 # define CANINTF_ERRIF 0x20
127 # define CANINTF_TX2IF 0x10
128 # define CANINTF_TX1IF 0x08
129 # define CANINTF_TX0IF 0x04
130 # define CANINTF_RX1IF 0x02
131 # define CANINTF_RX0IF 0x01
133 # define EFLG_EWARN 0x01
134 # define EFLG_RXWAR 0x02
135 # define EFLG_TXWAR 0x04
136 # define EFLG_RXEP 0x08
137 # define EFLG_TXEP 0x10
138 # define EFLG_TXBO 0x20
139 # define EFLG_RX0OVR 0x40
140 # define EFLG_RX1OVR 0x80
141 #define TXBCTRL(n) (((n) * 0x10) + 0x30 + TXBCTRL_OFF)
142 # define TXBCTRL_ABTF 0x40
143 # define TXBCTRL_MLOA 0x20
144 # define TXBCTRL_TXERR 0x10
145 # define TXBCTRL_TXREQ 0x08
146 #define TXBSIDH(n) (((n) * 0x10) + 0x30 + TXBSIDH_OFF)
147 # define SIDH_SHIFT 3
148 #define TXBSIDL(n) (((n) * 0x10) + 0x30 + TXBSIDL_OFF)
149 # define SIDL_SID_MASK 7
150 # define SIDL_SID_SHIFT 5
151 # define SIDL_EXIDE_SHIFT 3
152 # define SIDL_EID_SHIFT 16
153 # define SIDL_EID_MASK 3
154 #define TXBEID8(n) (((n) * 0x10) + 0x30 + TXBEID8_OFF)
155 #define TXBEID0(n) (((n) * 0x10) + 0x30 + TXBEID0_OFF)
156 #define TXBDLC(n) (((n) * 0x10) + 0x30 + TXBDLC_OFF)
157 # define DLC_RTR_SHIFT 6
158 #define TXBCTRL_OFF 0
159 #define TXBSIDH_OFF 1
160 #define TXBSIDL_OFF 2
161 #define TXBEID8_OFF 3
162 #define TXBEID0_OFF 4
165 #define RXBCTRL(n) (((n) * 0x10) + 0x60 + RXBCTRL_OFF)
166 # define RXBCTRL_BUKT 0x04
167 # define RXBCTRL_RXM0 0x20
168 # define RXBCTRL_RXM1 0x40
169 #define RXBSIDH(n) (((n) * 0x10) + 0x60 + RXBSIDH_OFF)
170 # define RXBSIDH_SHIFT 3
171 #define RXBSIDL(n) (((n) * 0x10) + 0x60 + RXBSIDL_OFF)
172 # define RXBSIDL_IDE 0x08
173 # define RXBSIDL_EID 3
174 # define RXBSIDL_SHIFT 5
175 #define RXBEID8(n) (((n) * 0x10) + 0x60 + RXBEID8_OFF)
176 #define RXBEID0(n) (((n) * 0x10) + 0x60 + RXBEID0_OFF)
177 #define RXBDLC(n) (((n) * 0x10) + 0x60 + RXBDLC_OFF)
178 # define RXBDLC_LEN_MASK 0x0f
179 # define RXBDLC_RTR 0x40
180 #define RXBCTRL_OFF 0
181 #define RXBSIDH_OFF 1
182 #define RXBSIDL_OFF 2
183 #define RXBEID8_OFF 3
184 #define RXBEID0_OFF 4
188 #define GET_BYTE(val, byte) \
189 (((val) >> ((byte) * 8)) & 0xff)
190 #define SET_BYTE(val, byte) \
191 (((val) & 0xff) << ((byte) * 8))
194 * Buffer size required for the largest SPI transfer (i.e., reading a
197 #define CAN_FRAME_MAX_DATA_LEN 8
198 #define SPI_TRANSFER_BUF_LEN (6 + CAN_FRAME_MAX_DATA_LEN)
199 #define CAN_FRAME_MAX_BITS 128
201 #define TX_ECHO_SKB_MAX 1
203 #define DEVICE_NAME "mcp251x"
205 static int mcp251x_enable_dma; /* Enable SPI DMA. Default: 0 (Off) */
206 module_param(mcp251x_enable_dma, int, S_IRUGO);
207 MODULE_PARM_DESC(mcp251x_enable_dma, "Enable SPI DMA. Default: 0 (Off)");
209 static struct can_bittiming_const mcp251x_bittiming_const = {
221 struct mcp251x_priv {
223 struct net_device *net;
224 struct spi_device *spi;
226 struct mutex spi_lock; /* SPI buffer lock */
229 dma_addr_t spi_tx_dma;
230 dma_addr_t spi_rx_dma;
232 struct sk_buff *tx_skb;
234 struct workqueue_struct *wq;
235 struct work_struct tx_work;
236 struct work_struct irq_work;
237 struct completion awake;
241 #define AFTER_SUSPEND_UP 1
242 #define AFTER_SUSPEND_DOWN 2
243 #define AFTER_SUSPEND_POWER 4
244 #define AFTER_SUSPEND_RESTART 8
248 static void mcp251x_clean(struct net_device *net)
250 struct mcp251x_priv *priv = netdev_priv(net);
252 net->stats.tx_errors++;
254 dev_kfree_skb(priv->tx_skb);
256 can_free_echo_skb(priv->net, 0);
262 * Note about handling of error return of mcp251x_spi_trans: accessing
263 * registers via SPI is not really different conceptually than using
264 * normal I/O assembler instructions, although it's much more
265 * complicated from a practical POV. So it's not advisable to always
266 * check the return value of this function. Imagine that every
267 * read{b,l}, write{b,l} and friends would be bracketed in "if ( < 0)
268 * error();", it would be a great mess (well there are some situation
269 * when exception handling C++ like could be useful after all). So we
270 * just check that transfers are OK at the beginning of our
271 * conversation with the chip and to avoid doing really nasty things
272 * (like injecting bogus packets in the network stack).
274 static int mcp251x_spi_trans(struct spi_device *spi, int len)
276 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
277 struct spi_transfer t = {
278 .tx_buf = priv->spi_tx_buf,
279 .rx_buf = priv->spi_rx_buf,
283 struct spi_message m;
286 spi_message_init(&m);
288 if (mcp251x_enable_dma) {
289 t.tx_dma = priv->spi_tx_dma;
290 t.rx_dma = priv->spi_rx_dma;
294 spi_message_add_tail(&t, &m);
296 ret = spi_sync(spi, &m);
298 dev_err(&spi->dev, "spi transfer failed: ret = %d\n", ret);
302 static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)
304 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
307 mutex_lock(&priv->spi_lock);
309 priv->spi_tx_buf[0] = INSTRUCTION_READ;
310 priv->spi_tx_buf[1] = reg;
312 mcp251x_spi_trans(spi, 3);
313 val = priv->spi_rx_buf[2];
315 mutex_unlock(&priv->spi_lock);
320 static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)
322 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
324 mutex_lock(&priv->spi_lock);
326 priv->spi_tx_buf[0] = INSTRUCTION_WRITE;
327 priv->spi_tx_buf[1] = reg;
328 priv->spi_tx_buf[2] = val;
330 mcp251x_spi_trans(spi, 3);
332 mutex_unlock(&priv->spi_lock);
335 static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
336 u8 mask, uint8_t val)
338 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
340 mutex_lock(&priv->spi_lock);
342 priv->spi_tx_buf[0] = INSTRUCTION_BIT_MODIFY;
343 priv->spi_tx_buf[1] = reg;
344 priv->spi_tx_buf[2] = mask;
345 priv->spi_tx_buf[3] = val;
347 mcp251x_spi_trans(spi, 4);
349 mutex_unlock(&priv->spi_lock);
352 static void mcp251x_hw_tx_frame(struct spi_device *spi, u8 *buf,
353 int len, int tx_buf_idx)
355 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
356 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
358 if (pdata->model == CAN_MCP251X_MCP2510) {
361 for (i = 1; i < TXBDAT_OFF + len; i++)
362 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + i,
365 mutex_lock(&priv->spi_lock);
366 memcpy(priv->spi_tx_buf, buf, TXBDAT_OFF + len);
367 mcp251x_spi_trans(spi, TXBDAT_OFF + len);
368 mutex_unlock(&priv->spi_lock);
372 static void mcp251x_hw_tx(struct spi_device *spi, struct can_frame *frame,
375 u32 sid, eid, exide, rtr;
376 u8 buf[SPI_TRANSFER_BUF_LEN];
378 exide = (frame->can_id & CAN_EFF_FLAG) ? 1 : 0; /* Extended ID Enable */
380 sid = (frame->can_id & CAN_EFF_MASK) >> 18;
382 sid = frame->can_id & CAN_SFF_MASK; /* Standard ID */
383 eid = frame->can_id & CAN_EFF_MASK; /* Extended ID */
384 rtr = (frame->can_id & CAN_RTR_FLAG) ? 1 : 0; /* Remote transmission */
386 buf[TXBCTRL_OFF] = INSTRUCTION_LOAD_TXB(tx_buf_idx);
387 buf[TXBSIDH_OFF] = sid >> SIDH_SHIFT;
388 buf[TXBSIDL_OFF] = ((sid & SIDL_SID_MASK) << SIDL_SID_SHIFT) |
389 (exide << SIDL_EXIDE_SHIFT) |
390 ((eid >> SIDL_EID_SHIFT) & SIDL_EID_MASK);
391 buf[TXBEID8_OFF] = GET_BYTE(eid, 1);
392 buf[TXBEID0_OFF] = GET_BYTE(eid, 0);
393 buf[TXBDLC_OFF] = (rtr << DLC_RTR_SHIFT) | frame->can_dlc;
394 memcpy(buf + TXBDAT_OFF, frame->data, frame->can_dlc);
395 mcp251x_hw_tx_frame(spi, buf, frame->can_dlc, tx_buf_idx);
396 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx), TXBCTRL_TXREQ);
399 static void mcp251x_hw_rx_frame(struct spi_device *spi, u8 *buf,
402 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
403 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
405 if (pdata->model == CAN_MCP251X_MCP2510) {
408 for (i = 1; i < RXBDAT_OFF; i++)
409 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
410 len = buf[RXBDLC_OFF] & RXBDLC_LEN_MASK;
413 for (; i < (RXBDAT_OFF + len); i++)
414 buf[i] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + i);
416 mutex_lock(&priv->spi_lock);
418 priv->spi_tx_buf[RXBCTRL_OFF] = INSTRUCTION_READ_RXB(buf_idx);
419 mcp251x_spi_trans(spi, SPI_TRANSFER_BUF_LEN);
420 memcpy(buf, priv->spi_rx_buf, SPI_TRANSFER_BUF_LEN);
422 mutex_unlock(&priv->spi_lock);
426 static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
428 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
430 struct can_frame *frame;
431 u8 buf[SPI_TRANSFER_BUF_LEN];
433 skb = alloc_can_skb(priv->net, &frame);
435 dev_err(&spi->dev, "cannot allocate RX skb\n");
436 priv->net->stats.rx_dropped++;
440 mcp251x_hw_rx_frame(spi, buf, buf_idx);
441 if (buf[RXBSIDL_OFF] & RXBSIDL_IDE) {
442 /* Extended ID format */
443 frame->can_id = CAN_EFF_FLAG;
445 /* Extended ID part */
446 SET_BYTE(buf[RXBSIDL_OFF] & RXBSIDL_EID, 2) |
447 SET_BYTE(buf[RXBEID8_OFF], 1) |
448 SET_BYTE(buf[RXBEID0_OFF], 0) |
449 /* Standard ID part */
450 (((buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) |
451 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT)) << 18);
452 /* Remote transmission request */
453 if (buf[RXBDLC_OFF] & RXBDLC_RTR)
454 frame->can_id |= CAN_RTR_FLAG;
456 /* Standard ID format */
458 (buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) |
459 (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT);
462 frame->can_dlc = buf[RXBDLC_OFF] & RXBDLC_LEN_MASK;
463 if (frame->can_dlc > 8) {
464 dev_warn(&spi->dev, "invalid frame recevied\n");
465 priv->net->stats.rx_errors++;
469 memcpy(frame->data, buf + RXBDAT_OFF, frame->can_dlc);
471 priv->net->stats.rx_packets++;
472 priv->net->stats.rx_bytes += frame->can_dlc;
476 static void mcp251x_hw_sleep(struct spi_device *spi)
478 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_SLEEP);
481 static void mcp251x_hw_wakeup(struct spi_device *spi)
483 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
487 /* Can only wake up by generating a wake-up interrupt. */
488 mcp251x_write_bits(spi, CANINTE, CANINTE_WAKIE, CANINTE_WAKIE);
489 mcp251x_write_bits(spi, CANINTF, CANINTF_WAKIF, CANINTF_WAKIF);
491 /* Wait until the device is awake */
492 if (!wait_for_completion_timeout(&priv->awake, HZ))
493 dev_err(&spi->dev, "MCP251x didn't wake-up\n");
496 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
497 static int mcp251x_hard_start_xmit(struct sk_buff *skb, struct net_device *net)
499 static netdev_tx_t mcp251x_hard_start_xmit(struct sk_buff *skb,
500 struct net_device *net)
503 struct mcp251x_priv *priv = netdev_priv(net);
504 struct spi_device *spi = priv->spi;
506 if (priv->tx_skb || priv->tx_len) {
507 dev_warn(&spi->dev, "hard_xmit called while tx busy\n");
508 netif_stop_queue(net);
509 return NETDEV_TX_BUSY;
512 if (skb->len != sizeof(struct can_frame)) {
513 dev_err(&spi->dev, "dropping packet - bad length\n");
515 net->stats.tx_dropped++;
519 netif_stop_queue(net);
521 net->trans_start = jiffies;
522 queue_work(priv->wq, &priv->tx_work);
527 static int mcp251x_do_set_mode(struct net_device *net, enum can_mode mode)
529 struct mcp251x_priv *priv = netdev_priv(net);
533 /* We have to delay work since SPI I/O may sleep */
534 priv->can.state = CAN_STATE_ERROR_ACTIVE;
535 priv->restart_tx = 1;
536 if (priv->can.restart_ms == 0)
537 priv->after_suspend = AFTER_SUSPEND_RESTART;
538 queue_work(priv->wq, &priv->irq_work);
547 static void mcp251x_set_normal_mode(struct spi_device *spi)
549 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
550 unsigned long timeout;
552 /* Enable interrupts */
553 mcp251x_write_reg(spi, CANINTE,
554 CANINTE_ERRIE | CANINTE_TX2IE | CANINTE_TX1IE |
555 CANINTE_TX0IE | CANINTE_RX1IE | CANINTE_RX0IE |
558 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
559 /* Put device into loopback mode */
560 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LOOPBACK);
562 /* Put device into normal mode */
563 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
565 /* Wait for the device to enter normal mode */
566 timeout = jiffies + HZ;
567 while (mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK) {
569 if (time_after(jiffies, timeout)) {
570 dev_err(&spi->dev, "MCP251x didn't"
571 " enter in normal mode\n");
576 priv->can.state = CAN_STATE_ERROR_ACTIVE;
579 static int mcp251x_do_set_bittiming(struct net_device *net)
581 struct mcp251x_priv *priv = netdev_priv(net);
582 struct can_bittiming *bt = &priv->can.bittiming;
583 struct spi_device *spi = priv->spi;
585 mcp251x_write_reg(spi, CNF1, ((bt->sjw - 1) << CNF1_SJW_SHIFT) |
587 mcp251x_write_reg(spi, CNF2, CNF2_BTLMODE |
588 (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES ?
590 ((bt->phase_seg1 - 1) << CNF2_PS1_SHIFT) |
592 mcp251x_write_bits(spi, CNF3, CNF3_PHSEG2_MASK,
593 (bt->phase_seg2 - 1));
594 dev_info(&spi->dev, "CNF: 0x%02x 0x%02x 0x%02x\n",
595 mcp251x_read_reg(spi, CNF1),
596 mcp251x_read_reg(spi, CNF2),
597 mcp251x_read_reg(spi, CNF3));
602 static int mcp251x_setup(struct net_device *net, struct mcp251x_priv *priv,
603 struct spi_device *spi)
607 ret = open_candev(net);
609 dev_err(&spi->dev, "unable to set initial baudrate!\n");
613 /* Enable RX0->RX1 buffer roll over and disable filters */
614 mcp251x_write_bits(spi, RXBCTRL(0),
615 RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1,
616 RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1);
617 mcp251x_write_bits(spi, RXBCTRL(1),
618 RXBCTRL_RXM0 | RXBCTRL_RXM1,
619 RXBCTRL_RXM0 | RXBCTRL_RXM1);
623 static void mcp251x_hw_reset(struct spi_device *spi)
625 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
628 mutex_lock(&priv->spi_lock);
630 priv->spi_tx_buf[0] = INSTRUCTION_RESET;
632 ret = spi_write(spi, priv->spi_tx_buf, 1);
634 mutex_unlock(&priv->spi_lock);
637 dev_err(&spi->dev, "reset failed: ret = %d\n", ret);
638 /* Wait for reset to finish */
642 static int mcp251x_hw_probe(struct spi_device *spi)
646 mcp251x_hw_reset(spi);
649 * Please note that these are "magic values" based on after
650 * reset defaults taken from data sheet which allows us to see
651 * if we really have a chip on the bus (we avoid common all
652 * zeroes or all ones situations)
654 st1 = mcp251x_read_reg(spi, CANSTAT) & 0xEE;
655 st2 = mcp251x_read_reg(spi, CANCTRL) & 0x17;
657 dev_dbg(&spi->dev, "CANSTAT 0x%02x CANCTRL 0x%02x\n", st1, st2);
659 /* Check for power up default values */
660 return (st1 == 0x80 && st2 == 0x07) ? 1 : 0;
663 static irqreturn_t mcp251x_can_isr(int irq, void *dev_id)
665 struct net_device *net = (struct net_device *)dev_id;
666 struct mcp251x_priv *priv = netdev_priv(net);
668 /* Schedule bottom half */
669 if (!work_pending(&priv->irq_work))
670 queue_work(priv->wq, &priv->irq_work);
675 static int mcp251x_open(struct net_device *net)
677 struct mcp251x_priv *priv = netdev_priv(net);
678 struct spi_device *spi = priv->spi;
679 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
682 if (pdata->transceiver_enable)
683 pdata->transceiver_enable(1);
685 priv->force_quit = 0;
689 ret = request_irq(spi->irq, mcp251x_can_isr,
690 IRQF_TRIGGER_FALLING, DEVICE_NAME, net);
692 dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
693 if (pdata->transceiver_enable)
694 pdata->transceiver_enable(0);
698 mcp251x_hw_wakeup(spi);
699 mcp251x_hw_reset(spi);
700 ret = mcp251x_setup(net, priv, spi);
702 free_irq(spi->irq, net);
703 if (pdata->transceiver_enable)
704 pdata->transceiver_enable(0);
707 mcp251x_set_normal_mode(spi);
708 netif_wake_queue(net);
713 static int mcp251x_stop(struct net_device *net)
715 struct mcp251x_priv *priv = netdev_priv(net);
716 struct spi_device *spi = priv->spi;
717 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
721 /* Disable and clear pending interrupts */
722 mcp251x_write_reg(spi, CANINTE, 0x00);
723 mcp251x_write_reg(spi, CANINTF, 0x00);
725 priv->force_quit = 1;
726 free_irq(spi->irq, net);
727 flush_workqueue(priv->wq);
729 mcp251x_write_reg(spi, TXBCTRL(0), 0);
730 if (priv->tx_skb || priv->tx_len)
733 mcp251x_hw_sleep(spi);
735 if (pdata->transceiver_enable)
736 pdata->transceiver_enable(0);
738 priv->can.state = CAN_STATE_STOPPED;
743 static void mcp251x_tx_work_handler(struct work_struct *ws)
745 struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
747 struct spi_device *spi = priv->spi;
748 struct net_device *net = priv->net;
749 struct can_frame *frame;
752 frame = (struct can_frame *)priv->tx_skb->data;
754 if (priv->can.state == CAN_STATE_BUS_OFF) {
756 netif_wake_queue(net);
759 if (frame->can_dlc > CAN_FRAME_MAX_DATA_LEN)
760 frame->can_dlc = CAN_FRAME_MAX_DATA_LEN;
761 mcp251x_hw_tx(spi, frame, 0);
762 priv->tx_len = 1 + frame->can_dlc;
763 can_put_echo_skb(priv->tx_skb, net, 0);
768 static void mcp251x_irq_work_handler(struct work_struct *ws)
770 struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
772 struct spi_device *spi = priv->spi;
773 struct net_device *net = priv->net;
776 enum can_state new_state;
778 if (priv->after_suspend) {
780 mcp251x_hw_reset(spi);
781 mcp251x_setup(net, priv, spi);
782 if (priv->after_suspend & AFTER_SUSPEND_RESTART) {
783 mcp251x_set_normal_mode(spi);
784 } else if (priv->after_suspend & AFTER_SUSPEND_UP) {
785 netif_device_attach(net);
786 /* Clean since we lost tx buffer */
787 if (priv->tx_skb || priv->tx_len) {
789 netif_wake_queue(net);
791 mcp251x_set_normal_mode(spi);
793 mcp251x_hw_sleep(spi);
795 priv->after_suspend = 0;
798 if (priv->can.restart_ms == 0 && priv->can.state == CAN_STATE_BUS_OFF)
801 while (!priv->force_quit && !freezing(current)) {
802 u8 eflag = mcp251x_read_reg(spi, EFLG);
803 int can_id = 0, data1 = 0;
805 mcp251x_write_reg(spi, EFLG, 0x00);
807 if (priv->restart_tx) {
808 priv->restart_tx = 0;
809 mcp251x_write_reg(spi, TXBCTRL(0), 0);
810 if (priv->tx_skb || priv->tx_len)
812 netif_wake_queue(net);
813 can_id |= CAN_ERR_RESTARTED;
817 /* Wait whilst the device wakes up */
822 intf = mcp251x_read_reg(spi, CANINTF);
823 mcp251x_write_bits(spi, CANINTF, intf, 0x00);
825 /* Update can state */
826 if (eflag & EFLG_TXBO) {
827 new_state = CAN_STATE_BUS_OFF;
828 can_id |= CAN_ERR_BUSOFF;
829 } else if (eflag & EFLG_TXEP) {
830 new_state = CAN_STATE_ERROR_PASSIVE;
831 can_id |= CAN_ERR_CRTL;
832 data1 |= CAN_ERR_CRTL_TX_PASSIVE;
833 } else if (eflag & EFLG_RXEP) {
834 new_state = CAN_STATE_ERROR_PASSIVE;
835 can_id |= CAN_ERR_CRTL;
836 data1 |= CAN_ERR_CRTL_RX_PASSIVE;
837 } else if (eflag & EFLG_TXWAR) {
838 new_state = CAN_STATE_ERROR_WARNING;
839 can_id |= CAN_ERR_CRTL;
840 data1 |= CAN_ERR_CRTL_TX_WARNING;
841 } else if (eflag & EFLG_RXWAR) {
842 new_state = CAN_STATE_ERROR_WARNING;
843 can_id |= CAN_ERR_CRTL;
844 data1 |= CAN_ERR_CRTL_RX_WARNING;
846 new_state = CAN_STATE_ERROR_ACTIVE;
849 /* Update can state statistics */
850 switch (priv->can.state) {
851 case CAN_STATE_ERROR_ACTIVE:
852 if (new_state >= CAN_STATE_ERROR_WARNING &&
853 new_state <= CAN_STATE_BUS_OFF)
854 priv->can.can_stats.error_warning++;
855 case CAN_STATE_ERROR_WARNING: /* fallthrough */
856 if (new_state >= CAN_STATE_ERROR_PASSIVE &&
857 new_state <= CAN_STATE_BUS_OFF)
858 priv->can.can_stats.error_passive++;
863 priv->can.state = new_state;
865 if ((intf & CANINTF_ERRIF) || (can_id & CAN_ERR_RESTARTED)) {
867 struct can_frame *frame;
869 /* Create error frame */
870 skb = alloc_can_err_skb(net, &frame);
872 /* Set error frame flags based on bus state */
873 frame->can_id = can_id;
874 frame->data[1] = data1;
876 /* Update net stats for overflows */
877 if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR)) {
878 if (eflag & EFLG_RX0OVR)
879 net->stats.rx_over_errors++;
880 if (eflag & EFLG_RX1OVR)
881 net->stats.rx_over_errors++;
882 frame->can_id |= CAN_ERR_CRTL;
884 CAN_ERR_CRTL_RX_OVERFLOW;
890 "cannot allocate error skb\n");
894 if (priv->can.state == CAN_STATE_BUS_OFF) {
895 if (priv->can.restart_ms == 0) {
897 mcp251x_hw_sleep(spi);
905 if (intf & CANINTF_WAKIF)
906 complete(&priv->awake);
908 if (intf & CANINTF_MERRF) {
909 /* If there are pending Tx buffers, restart queue */
910 txbnctrl = mcp251x_read_reg(spi, TXBCTRL(0));
911 if (!(txbnctrl & TXBCTRL_TXREQ)) {
912 if (priv->tx_skb || priv->tx_len)
914 netif_wake_queue(net);
918 if (intf & (CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)) {
919 net->stats.tx_packets++;
920 net->stats.tx_bytes += priv->tx_len - 1;
922 can_get_echo_skb(net, 0);
925 netif_wake_queue(net);
928 if (intf & CANINTF_RX0IF)
929 mcp251x_hw_rx(spi, 0);
931 if (intf & CANINTF_RX1IF)
932 mcp251x_hw_rx(spi, 1);
936 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28)
937 static const struct net_device_ops mcp251x_netdev_ops = {
938 .ndo_open = mcp251x_open,
939 .ndo_stop = mcp251x_stop,
940 .ndo_start_xmit = mcp251x_hard_start_xmit,
944 static int __devinit mcp251x_can_probe(struct spi_device *spi)
946 struct net_device *net;
947 struct mcp251x_priv *priv;
948 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
952 /* Platform data is required for osc freq */
955 /* Allocate can/net device */
956 net = alloc_candev(sizeof(struct mcp251x_priv), TX_ECHO_SKB_MAX);
962 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28)
963 net->netdev_ops = &mcp251x_netdev_ops;
965 net->open = mcp251x_open;
966 net->stop = mcp251x_stop;
967 net->hard_start_xmit = mcp251x_hard_start_xmit;
969 net->flags |= IFF_ECHO;
971 priv = netdev_priv(net);
972 priv->can.bittiming_const = &mcp251x_bittiming_const;
973 priv->can.do_set_mode = mcp251x_do_set_mode;
974 priv->can.clock.freq = pdata->oscillator_frequency / 2;
975 priv->can.do_set_bittiming = mcp251x_do_set_bittiming;
977 dev_set_drvdata(&spi->dev, priv);
980 mutex_init(&priv->spi_lock);
982 /* If requested, allocate DMA buffers */
983 if (mcp251x_enable_dma) {
984 spi->dev.coherent_dma_mask = ~0;
987 * Minimum coherent DMA allocation is PAGE_SIZE, so allocate
988 * that much and share it between Tx and Rx DMA buffers.
990 priv->spi_tx_buf = dma_alloc_coherent(&spi->dev,
995 if (priv->spi_tx_buf) {
996 priv->spi_rx_buf = (u8 *)(priv->spi_tx_buf +
998 priv->spi_rx_dma = (dma_addr_t)(priv->spi_tx_dma +
1001 /* Fall back to non-DMA */
1002 mcp251x_enable_dma = 0;
1006 /* Allocate non-DMA buffers */
1007 if (!mcp251x_enable_dma) {
1008 priv->spi_tx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1009 if (!priv->spi_tx_buf) {
1013 priv->spi_rx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1014 if (!priv->spi_tx_buf) {
1020 if (pdata->power_enable)
1021 pdata->power_enable(1);
1023 /* Call out to platform specific setup */
1024 if (pdata->board_specific_setup)
1025 pdata->board_specific_setup(spi);
1027 SET_NETDEV_DEV(net, &spi->dev);
1029 priv->wq = create_freezeable_workqueue("mcp251x_wq");
1031 INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
1032 INIT_WORK(&priv->irq_work, mcp251x_irq_work_handler);
1034 init_completion(&priv->awake);
1036 /* Configure the SPI bus */
1037 spi->mode = SPI_MODE_0;
1038 spi->bits_per_word = 8;
1041 if (!mcp251x_hw_probe(spi)) {
1042 dev_info(&spi->dev, "Probe failed\n");
1045 mcp251x_hw_sleep(spi);
1047 if (pdata->transceiver_enable)
1048 pdata->transceiver_enable(0);
1050 ret = register_candev(net);
1052 dev_info(&spi->dev, "probed\n");
1056 if (!mcp251x_enable_dma)
1057 kfree(priv->spi_rx_buf);
1059 if (!mcp251x_enable_dma)
1060 kfree(priv->spi_tx_buf);
1063 if (mcp251x_enable_dma)
1064 dma_free_coherent(&spi->dev, PAGE_SIZE,
1065 priv->spi_tx_buf, priv->spi_tx_dma);
1067 if (pdata->power_enable)
1068 pdata->power_enable(0);
1069 dev_err(&spi->dev, "probe failed\n");
1074 static int __devexit mcp251x_can_remove(struct spi_device *spi)
1076 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1077 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1078 struct net_device *net = priv->net;
1080 unregister_candev(net);
1083 priv->force_quit = 1;
1084 flush_workqueue(priv->wq);
1085 destroy_workqueue(priv->wq);
1087 if (mcp251x_enable_dma) {
1088 dma_free_coherent(&spi->dev, PAGE_SIZE,
1089 priv->spi_tx_buf, priv->spi_tx_dma);
1091 kfree(priv->spi_tx_buf);
1092 kfree(priv->spi_rx_buf);
1095 if (pdata->power_enable)
1096 pdata->power_enable(0);
1102 static int mcp251x_can_suspend(struct spi_device *spi, pm_message_t state)
1104 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1105 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1106 struct net_device *net = priv->net;
1108 if (netif_running(net)) {
1109 netif_device_detach(net);
1111 mcp251x_hw_sleep(spi);
1112 if (pdata->transceiver_enable)
1113 pdata->transceiver_enable(0);
1114 priv->after_suspend = AFTER_SUSPEND_UP;
1116 priv->after_suspend = AFTER_SUSPEND_DOWN;
1119 if (pdata->power_enable) {
1120 pdata->power_enable(0);
1121 priv->after_suspend |= AFTER_SUSPEND_POWER;
1127 static int mcp251x_can_resume(struct spi_device *spi)
1129 struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1130 struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1132 if (priv->after_suspend & AFTER_SUSPEND_POWER) {
1133 pdata->power_enable(1);
1134 queue_work(priv->wq, &priv->irq_work);
1136 if (priv->after_suspend & AFTER_SUSPEND_UP) {
1137 if (pdata->transceiver_enable)
1138 pdata->transceiver_enable(1);
1139 queue_work(priv->wq, &priv->irq_work);
1141 priv->after_suspend = 0;
1147 #define mcp251x_can_suspend NULL
1148 #define mcp251x_can_resume NULL
1151 static struct spi_driver mcp251x_can_driver = {
1153 .name = DEVICE_NAME,
1154 .bus = &spi_bus_type,
1155 .owner = THIS_MODULE,
1158 .probe = mcp251x_can_probe,
1159 .remove = __devexit_p(mcp251x_can_remove),
1160 .suspend = mcp251x_can_suspend,
1161 .resume = mcp251x_can_resume,
1164 static int __init mcp251x_can_init(void)
1166 return spi_register_driver(&mcp251x_can_driver);
1169 static void __exit mcp251x_can_exit(void)
1171 spi_unregister_driver(&mcp251x_can_driver);
1174 module_init(mcp251x_can_init);
1175 module_exit(mcp251x_can_exit);
1177 MODULE_AUTHOR("Chris Elston <celston@katalix.com>, "
1178 "Christian Pellegrin <chripell@evolware.org>");
1179 MODULE_DESCRIPTION("Microchip 251x CAN driver");
1180 MODULE_LICENSE("GPL v2");