2 * i82527.c - Intel I82527 network device driver
4 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of Volkswagen nor the names of its contributors
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * Alternatively, provided that this notice is retained in full, this
20 * software may be distributed under the terms of the GNU General
21 * Public License ("GPL") version 2, in which case the provisions of the
22 * GPL apply INSTEAD OF those given above.
24 * The provided data structures and external interfaces from this code
25 * are not restricted to be used by modules with a GPL compatible license.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
40 * Send feedback to <socketcan-users@lists.berlios.de>
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/version.h>
47 #include <linux/kernel.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/fcntl.h>
51 #include <linux/interrupt.h>
52 #include <linux/ptrace.h>
53 #include <linux/string.h>
54 #include <linux/errno.h>
55 #include <linux/netdevice.h>
56 #include <linux/if_arp.h>
57 #include <linux/if_ether.h>
58 #include <linux/skbuff.h>
60 #include <linux/can.h>
61 #include <linux/can/ioctl.h> /* for struct can_device_stats */
65 #include <linux/can/version.h> /* for RCSID. Removed by mkpatch script */
68 MODULE_AUTHOR("Oliver Hartkopp <oliver.hartkopp@volkswagen.de>");
69 MODULE_LICENSE("Dual BSD/GPL");
70 MODULE_DESCRIPTION("LLCF/socketcan '" CHIP_NAME "' network device driver");
72 #ifdef CONFIG_CAN_DEBUG_DEVICES
73 #define DBG(args...) ((priv->debug > 0) ? printk(args) : 0)
74 /* logging in interrupt context! */
75 #define iDBG(args...) ((priv->debug > 1) ? printk(args) : 0)
76 #define iiDBG(args...) ((priv->debug > 2) ? printk(args) : 0)
80 #define iiDBG(args...)
83 char drv_name[DRV_NAME_LEN] = "undefined";
85 /* driver and version information */
86 static const char *drv_version = "0.0.4";
87 static const char *drv_reldate = "2007-08-03";
89 static const canid_t rxobjflags[] = {0, CAN_EFF_FLAG,
90 CAN_RTR_FLAG, CAN_RTR_FLAG | CAN_EFF_FLAG,
94 /* array of all can chips */
95 struct net_device *can_dev[MAXDEV];
97 /* module parameters */
98 unsigned long base[MAXDEV] = { 0 }; /* hardware address */
99 unsigned long rbase[MAXDEV] = { 0 }; /* (remapped) device address */
100 unsigned int irq[MAXDEV] = { 0 };
102 unsigned int speed[MAXDEV] = { DEFAULT_SPEED, DEFAULT_SPEED };
103 unsigned int btr[MAXDEV] = { 0 };
104 unsigned int bcr[MAXDEV] = { 0 }; /* bus configuration register */
105 unsigned int cdv[MAXDEV] = { 0 }; /* CLKOUT clock divider */
106 unsigned int mo15[MAXDEV] = { MO15_DEFLT, MO15_DEFLT }; /* msg obj 15 */
108 static int rx_probe[MAXDEV] = { 0 };
109 static int clk = DEFAULT_HW_CLK;
110 static int force_dmc = DEFAULT_FORCE_DMC;
111 static int irq_mode = DEFAULT_IRQ_MODE;
112 static int debug = 0;
113 static int restart_ms = 100;
122 static int rx_probe_n;
124 static u8 dsc; /* devide system clock */
125 static u8 dmc; /* devide memory clock */
126 static unsigned long irqflags; /* for shared / disabled local interrupts */
128 module_param_array(base, int, &base_n, 0);
129 module_param_array(irq, int, &irq_n, 0);
130 module_param_array(speed, int, &speed_n, 0);
131 module_param_array(btr, int, &btr_n, 0);
132 module_param_array(bcr, int, &bcr_n, 0);
133 module_param_array(cdv, int, &cdv_n, 0);
134 module_param_array(mo15, int, &mo15_n, 0);
135 module_param_array(rx_probe, int, &rx_probe_n, 0);
137 module_param(clk, int, 0);
138 module_param(force_dmc, int, 0);
139 module_param(irq_mode, int, 0);
140 module_param(debug, int, 0);
141 module_param(restart_ms, int, 0);
143 MODULE_PARM_DESC(base, "CAN controller base address");
144 MODULE_PARM_DESC(irq, "CAN controller interrupt");
145 MODULE_PARM_DESC(speed, "CAN bus bitrate");
146 MODULE_PARM_DESC(btr, "Bit Timing Register value 0x<btr0><btr1>, e.g. 0x4014");
147 MODULE_PARM_DESC(bcr, "i82527 bus configuration register value (default: 0)");
148 MODULE_PARM_DESC(cdv, "clockout devider value (0-14) (default: 0)");
149 MODULE_PARM_DESC(mo15, "rx message object 15 usage. 0:none 1:sff(default) 2:eff");
150 MODULE_PARM_DESC(rx_probe, "switch to trx mode after correct msg receiption. (default off)");
152 MODULE_PARM_DESC(clk, "CAN controller chip clock (default: 16MHz)");
153 MODULE_PARM_DESC(force_dmc, "set i82527 DMC bit (default: calculate from clk)");
154 MODULE_PARM_DESC(irq_mode, "specify irq setup bits (1:shared 2:disable local irqs while processing) (default: 1)");
155 MODULE_PARM_DESC(debug, "set debug mask (default: 0)");
156 MODULE_PARM_DESC(restart_ms, "restart chip on heavy bus errors / bus off after x ms (default 100ms)");
158 /* function declarations */
160 static void chipset_init(struct net_device *dev, int wake);
161 static void chipset_init_rx(struct net_device *dev);
162 static void chipset_init_trx(struct net_device *dev);
163 static void can_netdev_setup(struct net_device *dev);
164 static struct net_device* can_create_netdev(int dev_num, int hw_regs);
165 static int can_set_drv_name(void);
166 int set_reset_mode(struct net_device *dev);
168 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
169 static struct net_device_stats *can_get_stats(struct net_device *dev)
171 struct can_priv *priv = netdev_priv(dev);
173 /* TODO: read statistics from chip */
178 static int i82527_probe_chip(unsigned long base)
180 // Check if hardware reset is still inactive OR
181 // maybe there is no chip in this address space
182 if (CANin(base, cpuInterfaceReg) & iCPU_RST) {
183 printk(KERN_INFO "%s: probing @ 0x%lX failed (reset)\n",
188 // Write test pattern
189 CANout(base, message1Reg.dataReg[1], 0x25);
190 CANout(base, message2Reg.dataReg[3], 0x52);
191 CANout(base, message10Reg.dataReg[6], 0xc3);
193 // Read back test pattern
194 if ((CANin(base, message1Reg.dataReg[1]) != 0x25 ) ||
195 (CANin(base, message2Reg.dataReg[3]) != 0x52 ) ||
196 (CANin(base, message10Reg.dataReg[6]) != 0xc3 )) {
197 printk(KERN_INFO "%s: probing @ 0x%lX failed (pattern)\n",
206 * set baud rate divisor values
208 static void set_btr(struct net_device *dev, int btr0, int btr1)
210 struct can_priv *priv = netdev_priv(dev);
211 unsigned long base = dev->base_addr;
213 /* no bla bla when restarting the device */
214 if (priv->state == STATE_UNINITIALIZED)
215 printk(KERN_INFO "%s: setting BTR0=%02X BTR1=%02X\n",
216 dev->name, btr0, btr1);
218 CANout(base, bitTiming0Reg, btr0);
219 CANout(base, bitTiming1Reg, btr1);
223 * calculate baud rate divisor values
225 static void set_baud(struct net_device *dev, int baud, int clock)
227 struct can_priv *priv = netdev_priv(dev);
235 int best_error = 1000000000;
240 int SAM = (baud > 100000 ? 0 : 1);
242 if (dsc) /* devide system clock */
243 clock >>= 1; /* calculate BTR with this value */
245 for (tseg = (0 + 0 + 2) * 2;
246 tseg <= (MAX_TSEG2 + MAX_TSEG1 + 2) * 2 + 1;
248 brp = clock / ((1 + tseg / 2) * baud) + tseg % 2;
249 if ((brp > 0) && (brp <= 64)) {
250 error = baud - clock / (brp * (1 + tseg / 2));
254 if (error <= best_error) {
256 best_tseg = tseg / 2;
258 best_baud = clock / (brp * (1 + tseg / 2));
262 if (best_error && (baud / best_error < 10)) {
263 printk("%s: unable to set baud rate %d (ext clock %dHz)\n",
264 dev->name, baud, clock * 2);
268 tseg2 = best_tseg - (SAMPLE_POINT * (best_tseg + 1)) / 100;
271 } else if (tseg2 > MAX_TSEG2) {
274 tseg1 = best_tseg - tseg2 - 2;
275 if (tseg1 > MAX_TSEG1) {
277 tseg2 = best_tseg - tseg1 - 2;
280 priv->btr = ((best_brp | JUMPWIDTH)<<8) +
281 ((SAM << 7) | (tseg2 << 4) | tseg1);
283 printk(KERN_INFO "%s: calculated best baudrate: %d / btr is 0x%04X\n",
284 dev->name, best_baud, priv->btr);
286 set_btr(dev, (priv->btr>>8) & 0xFF, priv->btr & 0xFF);
287 // set_btr(dev, best_brp | JUMPWIDTH, (SAM << 7) | (tseg2 << 4) | tseg1);
290 static inline int obj2rxo(int obj)
292 /* obj4 = obj15 SFF, obj5 = obj15 EFF */
294 return RXOBJBASE + obj;
299 void enable_rx_obj(unsigned long base, int obj)
302 int rxo = obj2rxo(obj);
304 // Configure message object for receiption
305 if (rxobjflags[obj] & CAN_EFF_FLAG)
308 if (rxobjflags[obj] & CAN_RTR_FLAG) {
309 CANout(base, msgArr[rxo].messageReg.messageConfigReg,
311 CANout(base, msgArr[rxo].messageReg.msgCtrl0Reg,
312 MVAL_SET | TXIE_RES | RXIE_SET | INTPD_RES);
313 CANout(base, msgArr[rxo].messageReg.msgCtrl1Reg,
314 NEWD_RES | CPUU_SET | TXRQ_RES | RMPD_RES);
316 CANout(base, msgArr[rxo].messageReg.messageConfigReg, mcfg);
317 CANout(base, msgArr[rxo].messageReg.msgCtrl0Reg,
318 MVAL_SET | TXIE_RES | RXIE_SET | INTPD_RES);
319 CANout(base, msgArr[rxo].messageReg.msgCtrl1Reg,
320 NEWD_RES | MLST_RES | TXRQ_RES | RMPD_RES);
324 void disable_rx_obj(unsigned long base, int obj)
326 int rxo = obj2rxo(obj);
328 CANout(base, msgArr[rxo].messageReg.msgCtrl1Reg,
329 NEWD_RES | MLST_RES | TXRQ_RES | RMPD_RES);
330 CANout(base, msgArr[rxo].messageReg.msgCtrl0Reg,
331 MVAL_RES | TXIE_RES | RXIE_RES | INTPD_RES);
334 int set_reset_mode(struct net_device *dev)
336 struct can_priv *priv = netdev_priv(dev);
337 unsigned long base = dev->base_addr;
339 // Configure cpu interface
340 CANout(base, cpuInterfaceReg,(dsc | dmc | iCPU_CEN));
342 // Enable configuration and puts chip in bus-off, disable interrupts
343 CANout(base, controlReg, iCTL_CCE | iCTL_INI);
346 CANin(base, interruptReg);
348 // Clear status register
349 CANout(base, statusReg, 0);
351 // Clear message objects for receiption
352 if (priv->mo15 == MO15_SFF)
353 disable_rx_obj(base, 4); /* rx via obj15 SFF */
355 disable_rx_obj(base, 0); /* rx via obj10 SFF */
357 if (priv->mo15 == MO15_EFF)
358 disable_rx_obj(base, 5); /* rx via obj15 EFF */
360 disable_rx_obj(base, 1); /* rx via obj11 EFF */
362 disable_rx_obj(base, 2);
363 disable_rx_obj(base, 3);
365 // Clear message object for send
366 CANout(base, message1Reg.msgCtrl1Reg,
367 RMPD_RES | TXRQ_RES | CPUU_RES | NEWD_RES);
368 CANout(base, message1Reg.msgCtrl0Reg,
369 MVAL_RES | TXIE_RES | RXIE_RES | INTPD_RES);
371 DBG(KERN_INFO "%s: %s: CtrlReg 0x%x CPUifReg 0x%x\n",
372 dev->name, __FUNCTION__,
373 CANin(base, controlReg), CANin(base, cpuInterfaceReg));
378 static int set_normal_mode(struct net_device *dev)
380 struct can_priv *priv = netdev_priv(dev);
381 unsigned long base = dev->base_addr;
384 CANin(base, interruptReg);
386 // Clear status register
387 CANout(base, statusReg, 0);
389 // Configure message objects for receiption
390 if (priv->mo15 == MO15_SFF) {
391 enable_rx_obj(base, 4); /* rx via obj15 SFF */
392 printk(KERN_INFO "%s: %s: using msg object 15 for "
394 dev->name, CHIP_NAME);
396 enable_rx_obj(base, 0); /* rx via obj10 SFF */
398 if (priv->mo15 == MO15_EFF) {
399 enable_rx_obj(base, 5); /* rx via obj15 EFF */
400 printk(KERN_INFO "%s: %s: using msg object 15 for "
402 dev->name, CHIP_NAME);
404 enable_rx_obj(base, 1); /* rx via obj11 EFF */
406 enable_rx_obj(base, 2);
407 enable_rx_obj(base, 3);
409 // Clear message object for send
410 CANout(base, message1Reg.msgCtrl1Reg,
411 RMPD_RES | TXRQ_RES | CPUU_RES | NEWD_RES);
412 CANout(base, message1Reg.msgCtrl0Reg,
413 MVAL_RES | TXIE_RES | RXIE_RES | INTPD_RES);
418 static int set_listen_mode(struct net_device *dev)
420 return set_normal_mode(dev); /* for now */
424 * Clear and invalidate message objects
426 int i82527_clear_msg_objects(unsigned long base)
432 for (i = 1; i <= 15; i++) {
433 CANout(base, msgArr[i].messageReg.msgCtrl0Reg,
434 INTPD_UNC | RXIE_RES | TXIE_RES | MVAL_RES);
435 CANout(base, msgArr[i].messageReg.msgCtrl0Reg,
436 INTPD_RES | RXIE_RES | TXIE_RES | MVAL_RES);
437 CANout(base, msgArr[i].messageReg.msgCtrl1Reg,
438 NEWD_RES | MLST_RES | TXRQ_RES | RMPD_RES);
439 for (data = 0; data < 8; data++)
440 CANout(base, msgArr[i].messageReg.dataReg[data], 0);
441 for (id = 0; id < 4; id++)
442 CANout(base, msgArr[i].messageReg.idReg[id], 0);
443 CANout(base, msgArr[i].messageReg.messageConfigReg, 0);
450 * initialize I82527 chip:
454 * - enable interrupts
455 * - start operating mode
457 static void chipset_init_regs(struct net_device *dev)
459 struct can_priv *priv = netdev_priv(dev);
460 unsigned long base = dev->base_addr;
462 // Enable configuration and puts chip in bus-off, disable interrupts
463 CANout(base, controlReg, (iCTL_CCE | iCTL_INI));
465 // Set CLKOUT devider and slew rates is was done in i82527_init_module
467 // Bus configuration was done in i82527_init_module
470 CANin(base, interruptReg);
472 // Clear status register
473 CANout(base, statusReg, 0);
475 i82527_clear_msg_objects(base);
477 // Set all global ID masks to "don't care"
478 CANout(base, globalMaskStandardReg[0], 0);
479 CANout(base, globalMaskStandardReg[1], 0);
480 CANout(base, globalMaskExtendedReg[0], 0);
481 CANout(base, globalMaskExtendedReg[1], 0);
482 CANout(base, globalMaskExtendedReg[2], 0);
483 CANout(base, globalMaskExtendedReg[3], 0);
485 DBG(KERN_INFO "%s: %s: CtrlReg 0x%x CPUifReg 0x%x\n",
486 dev->name, __FUNCTION__,
487 CANin(base, controlReg), CANin(base, cpuInterfaceReg));
489 // Note: At this stage the CAN ship is still in bus-off condition
490 // and must be started using StartChip()
493 if (priv->btr) { /* no calculation when btr is provided */
494 set_btr(dev, (priv->btr>>8) & 0xFF, priv->btr & 0xFF);
496 if (priv->speed == 0) {
497 priv->speed = DEFAULT_SPEED;
499 set_baud(dev, priv->speed * 1000, priv->clock);
504 static void chipset_init(struct net_device *dev, int wake)
506 struct can_priv *priv = netdev_priv(dev);
509 chipset_init_rx(dev); /* wait for valid reception first */
511 chipset_init_trx(dev);
513 if ((wake) && netif_queue_stopped(dev))
514 netif_wake_queue(dev);
517 static void chipset_init_rx(struct net_device *dev)
519 struct can_priv *priv = netdev_priv(dev);
520 unsigned long base = dev->base_addr;
522 iDBG(KERN_INFO "%s: %s()\n", dev->name, __FUNCTION__);
524 /* set chip into reset mode */
528 chipset_init_regs(dev);
530 /* automatic bit rate detection */
531 set_listen_mode(dev);
533 priv->state = STATE_PROBE;
535 // Clear bus-off, Interrupts only for errors, not for status change
536 CANout(base, controlReg, iCTL_IE | iCTL_EIE);
538 DBG(KERN_INFO "%s: %s: CtrlReg 0x%x CPUifReg 0x%x\n",
539 dev->name, __FUNCTION__,
540 CANin(base, controlReg), CANin(base, cpuInterfaceReg));
543 static void chipset_init_trx(struct net_device *dev)
545 struct can_priv *priv = netdev_priv(dev);
546 unsigned long base = dev->base_addr;
548 iDBG(KERN_INFO "%s: %s()\n", dev->name, __FUNCTION__);
550 /* set chip into reset mode */
554 chipset_init_regs(dev);
556 /* leave reset mode */
557 set_normal_mode(dev);
559 priv->state = STATE_ACTIVE;
561 // Clear bus-off, Interrupts only for errors, not for status change
562 CANout(base, controlReg, iCTL_IE | iCTL_EIE);
564 DBG(KERN_INFO "%s: %s: CtrlReg 0x%x CPUifReg 0x%x\n",
565 dev->name, __FUNCTION__,
566 CANin(base, controlReg), CANin(base, cpuInterfaceReg));
570 * transmit a CAN message
571 * message layout in the sk_buff should be like this:
572 * xx xx xx xx ll 00 11 22 33 44 55 66 77
573 * [ can-id ] [len] [can data (up to 8 bytes]
575 static int can_start_xmit(struct sk_buff *skb, struct net_device *dev)
577 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
578 struct net_device_stats *stats = can_get_stats(dev);
580 struct net_device_stats *stats = &dev->stats;
582 struct can_frame *cf = (struct can_frame*)skb->data;
583 unsigned long base = dev->base_addr;
589 if ((CANin(base, message1Reg.msgCtrl1Reg) & TXRQ_UNC) == TXRQ_SET) {
590 printk(KERN_ERR "%s: %s: TX register is occupied!\n",
591 dev->name, drv_name);
595 netif_stop_queue(dev);
600 if ( cf->can_id & CAN_RTR_FLAG )
605 CANout(base, message1Reg.msgCtrl1Reg,
606 RMPD_RES | TXRQ_RES | CPUU_SET | NEWD_RES);
607 CANout(base, message1Reg.msgCtrl0Reg,
608 MVAL_SET | TXIE_SET | RXIE_RES | INTPD_RES);
610 if (id & CAN_EFF_FLAG) {
612 CANout(base, message1Reg.messageConfigReg,
613 (dlc << 4) + rtr + MCFG_XTD);
614 CANout(base, message1Reg.idReg[3], (id << 3) & 0xFFU);
615 CANout(base, message1Reg.idReg[2], (id >> 5) & 0xFFU);
616 CANout(base, message1Reg.idReg[1], (id >> 13) & 0xFFU);
617 CANout(base, message1Reg.idReg[0], (id >> 21) & 0xFFU);
621 CANout(base, message1Reg.messageConfigReg,
623 CANout(base, message1Reg.idReg[0], (id >> 3) & 0xFFU);
624 CANout(base, message1Reg.idReg[1], (id << 5) & 0xFFU);
627 dlc &= 0x0f; //restore length only
628 for ( i=0; i < dlc; i++ ) {
629 CANout(base, message1Reg.dataReg[i],
633 CANout(base, message1Reg.msgCtrl1Reg,
634 (RMPD_RES | TXRQ_SET | CPUU_RES | NEWD_UNC));
636 // HM: We had some cases of repeated IRQs
637 // so make sure the INT is acknowledged
638 // I know it's already further up, but doing again fixed the issue
639 CANout(base, message1Reg.msgCtrl0Reg,
640 (MVAL_UNC | TXIE_UNC | RXIE_UNC | INTPD_RES));
642 stats->tx_bytes += dlc;
644 dev->trans_start = jiffies;
651 static void can_tx_timeout(struct net_device *dev)
653 struct can_priv *priv = netdev_priv(dev);
654 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
655 struct net_device_stats *stats = can_get_stats(dev);
657 struct net_device_stats *stats = &dev->stats;
662 /* do not conflict with e.g. bus error handling */
663 if (!(priv->timer.expires)){ /* no restart on the run */
664 chipset_init_trx(dev); /* no tx queue wakeup */
665 netif_wake_queue(dev); /* wakeup here */
668 DBG(KERN_INFO "%s: %s: can_restart_dev already active.\n",
669 dev->name, __FUNCTION__ );
674 static void can_restart_on(struct net_device *dev)
676 struct can_priv *priv = netdev_priv(dev);
678 if (!(priv->timer.expires)){ /* no restart on the run */
682 priv->timer.function = can_restart_dev;
683 priv->timer.data = (unsigned long) dev;
685 /* restart chip on persistent error in <xxx> ms */
686 priv->timer.expires = jiffies + (priv->restart_ms * HZ) / 1000;
687 add_timer(&priv->timer);
689 iDBG(KERN_INFO "%s: %s start (%ld)\n",
690 dev->name, __FUNCTION__ , jiffies);
692 iDBG(KERN_INFO "%s: %s already (%ld)\n",
693 dev->name, __FUNCTION__ , jiffies);
696 static void can_restart_dev(unsigned long data)
698 struct net_device *dev = (struct net_device*) data;
699 struct can_priv *priv = netdev_priv(dev);
701 DBG(KERN_INFO "%s: can_restart_dev (%ld)\n",
704 /* mark inactive timer */
705 priv->timer.expires = 0;
707 if (priv->state != STATE_UNINITIALIZED) {
709 /* count number of restarts */
710 priv->can_stats.restarts++;
712 chipset_init(dev, 1);
718 /* the timerless version */
720 static void can_restart_now(struct net_device *dev)
722 struct can_priv *priv = netdev_priv(dev);
724 if (priv->state != STATE_UNINITIALIZED) {
726 /* count number of restarts */
727 priv->can_stats.restarts++;
729 chipset_init(dev, 1);
735 * Subroutine of ISR for RX interrupts.
738 static void can_rx(struct net_device *dev, int obj)
740 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
741 struct net_device_stats *stats = can_get_stats(dev);
743 struct net_device_stats *stats = &dev->stats;
745 unsigned long base = dev->base_addr;
746 struct can_frame *cf;
753 int rxo = obj2rxo(obj);
755 skb = dev_alloc_skb(sizeof(struct can_frame));
760 skb->protocol = htons(ETH_P_CAN);
761 skb->pkt_type = PACKET_BROADCAST;
762 skb->ip_summed = CHECKSUM_UNNECESSARY;
764 ctl1reg = CANin(base, msgArr[rxo].messageReg.msgCtrl1Reg);
765 msgctlreg = CANin(base, msgArr[rxo].messageReg.messageConfigReg);
767 if( msgctlreg & MCFG_XTD ) {
768 id = CANin(base, msgArr[rxo].messageReg.idReg[3])
769 | (CANin(base, msgArr[rxo].messageReg.idReg[2]) << 8)
770 | (CANin(base, msgArr[rxo].messageReg.idReg[1]) << 16)
771 | (CANin(base, msgArr[rxo].messageReg.idReg[0]) << 24);
775 id = CANin(base, msgArr[rxo].messageReg.idReg[1])
776 |(CANin(base, msgArr[rxo].messageReg.idReg[0]) << 8);
780 if (ctl1reg & RMPD_SET) {
784 msgctlreg &= 0xf0;/* strip length code */
785 dlc = msgctlreg >> 4;
786 dlc %= 9; /* limit count to 8 bytes */
788 cf = (struct can_frame*)skb_put(skb, sizeof(struct can_frame));
789 memset(cf, 0, sizeof(struct can_frame));
792 for (i = 0; i < dlc; i++) {
793 cf->data[i] = CANin(base, msgArr[rxo].messageReg.dataReg[i]);
796 // Make the chip ready to receive the next message
797 enable_rx_obj(base, obj);
801 dev->last_rx = jiffies;
803 stats->rx_bytes += dlc;
807 * I82527 interrupt handler
809 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
810 static irqreturn_t can_interrupt(int irq, void *dev_id, struct pt_regs *regs)
812 static irqreturn_t can_interrupt(int irq, void *dev_id)
815 struct net_device *dev = (struct net_device*)dev_id;
816 struct can_priv *priv = netdev_priv(dev);
817 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
818 struct net_device_stats *stats = can_get_stats(dev);
820 struct net_device_stats *stats = &dev->stats;
822 unsigned long base = dev->base_addr;
829 iiDBG(KERN_INFO "%s: interrupt\n", dev->name);
831 if (priv->state == STATE_UNINITIALIZED) {
832 printk(KERN_ERR "%s: %s: uninitialized controller!\n",
833 dev->name, __FUNCTION__);
834 //chipset_init(dev, 1); /* should be possible at this stage */
838 if (priv->state == STATE_RESET_MODE) {
839 iiDBG(KERN_ERR "%s: %s: controller is in reset mode!\n",
840 dev->name, __FUNCTION__);
845 // Read the highest pending interrupt request
846 irqreg = CANin(base, interruptReg);
853 case 1: // Status register
857 // Read the STATUS reg
858 status = CANin(base, statusReg);
859 CANout (base, statusReg, 0);
861 if ( status & iSTAT_RXOK ) {
862 // Intel: Software must clear this bit in ISR
863 CANout (base, statusReg, status & ~iSTAT_RXOK);
865 if ( status & iSTAT_TXOK ) {
866 // Intel: Software must clear this bit in ISR
867 CANout (base, statusReg, status & ~iSTAT_TXOK);
869 if ( status & iSTAT_WARN ) {
870 // Note: status bit is read-only, don't clear
871 /* error warning interrupt */
872 iDBG(KERN_INFO "%s: error warning\n",
874 priv->can_stats.error_warning++;
876 if ( status & iSTAT_BOFF ) {
879 // Note: status bit is read-only, don't clear
881 priv->can_stats.bus_error++;
883 // Clear init flag and reenable interrupts
884 flags = CANin(base, controlReg) |
885 ( iCTL_IE | iCTL_EIE );
887 flags &= ~iCTL_INI; // Reset init flag
888 CANout(base, controlReg, flags);
893 case 0x2: // Receiption, message object 15
897 ctl1reg = CANin(base, message15Reg.msgCtrl1Reg);
898 while (ctl1reg & NEWD_SET) {
899 if (ctl1reg & MLST_SET)
900 priv->can_stats.data_overrun++;
902 if (priv->mo15 == MO15_SFF)
903 can_rx(dev, 4); /* rx via obj15 SFF */
905 can_rx(dev, 5); /* rx via obj15 EFF */
907 ctl1reg = CANin(base, message15Reg.msgCtrl1Reg);
910 if (priv->state == STATE_PROBE) {
911 /* valid RX -> switch to trx-mode */
912 chipset_init_trx(dev); /* no tx queue wakeup */
913 break; /* check again after init controller */
918 case 0xC: // Receiption, message object 10
919 case 0xD: // Receiption, message object 11
921 int obj = irqreg - 0xC;
922 int rxo = obj2rxo(obj);
924 ctl1reg = CANin(base, msgArr[rxo].messageReg.msgCtrl1Reg);
925 while (ctl1reg & NEWD_SET) {
926 if (ctl1reg & MLST_SET)
927 priv->can_stats.data_overrun++;
928 CANout(base, msgArr[rxo].messageReg.msgCtrl1Reg,
929 NEWD_RES | MLST_RES | TXRQ_UNC | RMPD_UNC);
931 ctl1reg = CANin(base,
932 msgArr[rxo].messageReg.msgCtrl1Reg);
935 if (priv->state == STATE_PROBE) {
936 /* valid RX -> switch to trx-mode */
937 chipset_init_trx(dev); /* no tx queue wakeup */
938 break; /* check again after init controller */
943 case 0xE: // Receiption, message object 12 (RTR)
944 case 0xF: // Receiption, message object 13 (RTR)
946 int obj = irqreg - 0xC;
947 int rxo = obj2rxo(obj);
949 ctl0reg = CANin(base, msgArr[rxo].messageReg.msgCtrl0Reg);
950 while (ctl0reg & INTPD_SET) {
952 ctl0reg = CANin(base, msgArr[rxo].messageReg.msgCtrl0Reg);
955 if (priv->state == STATE_PROBE) {
956 /* valid RX -> switch to trx-mode */
957 chipset_init_trx(dev); /* no tx queue wakeup */
958 break; /* check again after init controller */
963 case 3: // Message object 1 (our write object)
964 /* transmission complete interrupt */
966 // Nothing more to send, switch off interrupts
967 CANout(base, message1Reg.msgCtrl0Reg,
968 (MVAL_RES | TXIE_RES | RXIE_RES | INTPD_RES));
969 // We had some cases of repeated IRQ
970 // so make sure the INT is acknowledged
971 CANout(base, message1Reg.msgCtrl0Reg,
972 (MVAL_UNC | TXIE_UNC | RXIE_UNC | INTPD_RES));
975 netif_wake_queue(dev);
978 default: // Unexpected
979 iDBG(KERN_INFO "%s: Unexpected i82527 interrupt: "
980 "irqreq=0x%X\n", dev->name, irqreg);
984 // Get irq status again for next loop iteration
985 irqreg = CANin(base, interruptReg);
986 if (irqreg == lastIrqreg)
987 iDBG(KERN_INFO "%s: i82527 interrupt repeated: "
988 "irqreq=0x%X\n", dev->name, irqreg);
991 } /* end while (irqreq) */
994 iDBG(KERN_INFO "%s: handled %d IRQs\n", dev->name, n);
999 return n == 0 ? IRQ_NONE : IRQ_HANDLED;
1003 * initialize CAN bus driver
1005 static int can_open(struct net_device *dev)
1007 struct can_priv *priv = netdev_priv(dev);
1009 /* set chip into reset mode */
1010 set_reset_mode(dev);
1012 priv->state = STATE_UNINITIALIZED;
1014 /* register interrupt handler */
1015 if (request_irq(dev->irq, &can_interrupt, irqflags,
1016 dev->name, (void*)dev))
1019 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
1020 /* clear statistics */
1021 memset(&priv->stats, 0, sizeof(priv->stats));
1025 chipset_init(dev, 0);
1026 priv->open_time = jiffies;
1028 netif_start_queue(dev);
1034 * stop CAN bus activity
1036 static int can_close(struct net_device *dev)
1038 struct can_priv *priv = netdev_priv(dev);
1040 /* set chip into reset mode */
1041 set_reset_mode(dev);
1043 priv->open_time = 0;
1045 if (priv->timer.expires) {
1046 del_timer(&priv->timer);
1047 priv->timer.expires = 0;
1050 free_irq(dev->irq, (void*)dev);
1051 priv->state = STATE_UNINITIALIZED;
1053 netif_stop_queue(dev);
1058 void can_netdev_setup(struct net_device *dev)
1060 /* Fill in the the fields of the device structure
1061 with CAN netdev generic values */
1063 dev->change_mtu = NULL;
1064 dev->set_mac_address = NULL;
1065 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
1066 dev->hard_header = NULL;
1067 dev->rebuild_header = NULL;
1068 dev->hard_header_cache = NULL;
1069 dev->header_cache_update = NULL;
1070 dev->hard_header_parse = NULL;
1072 dev->header_ops = NULL;
1075 dev->type = ARPHRD_CAN;
1076 dev->hard_header_len = 0;
1077 dev->mtu = sizeof(struct can_frame);
1079 dev->tx_queue_len = 10;
1081 dev->flags = IFF_NOARP;
1082 dev->features = NETIF_F_NO_CSUM;
1084 dev->open = can_open;
1085 dev->stop = can_close;
1086 dev->hard_start_xmit = can_start_xmit;
1087 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
1088 dev->get_stats = can_get_stats;
1091 dev->tx_timeout = can_tx_timeout;
1092 dev->watchdog_timeo = TX_TIMEOUT;
1095 static struct net_device* can_create_netdev(int dev_num, int hw_regs)
1097 struct net_device *dev;
1098 struct can_priv *priv;
1100 const char mo15mode [3][6] = {"none", "sff", "eff"};
1102 if (!(dev = alloc_netdev(sizeof(struct can_priv), CAN_NETDEV_NAME,
1103 can_netdev_setup))) {
1104 printk(KERN_ERR "%s: out of memory\n", CHIP_NAME);
1108 printk(KERN_INFO "%s: base 0x%lX / irq %d / speed %d / "
1109 "btr 0x%X / rx_probe %d / mo15 %s\n",
1110 drv_name, rbase[dev_num], irq[dev_num],
1111 speed[dev_num], btr[dev_num], rx_probe[dev_num],
1112 mo15mode[mo15[dev_num]]);
1114 /* fill net_device structure */
1116 priv = netdev_priv(dev);
1118 dev->irq = irq[dev_num];
1119 dev->base_addr = rbase[dev_num];
1121 priv->speed = speed[dev_num];
1122 priv->btr = btr[dev_num];
1123 priv->rx_probe = rx_probe[dev_num];
1124 priv->mo15 = mo15[dev_num];
1126 priv->hw_regs = hw_regs;
1127 priv->restart_ms = restart_ms;
1128 priv->debug = debug;
1130 init_timer(&priv->timer);
1131 priv->timer.expires = 0;
1133 if (register_netdev(dev)) {
1134 printk(KERN_INFO "%s: register netdev failed\n", CHIP_NAME);
1142 int can_set_drv_name(void)
1144 char *hname = hal_name();
1146 if (strlen(CHIP_NAME) + strlen(hname) >= DRV_NAME_LEN-1) {
1147 printk(KERN_ERR "%s: driver name too long!\n", CHIP_NAME);
1150 sprintf(drv_name, "%s-%s", CHIP_NAME, hname);
1154 static void i82527_exit_module(void)
1158 for (i = 0; i < MAXDEV; i++) {
1159 if (can_dev[i] != NULL) {
1160 struct can_priv *priv = netdev_priv(can_dev[i]);
1161 unregister_netdev(can_dev[i]);
1162 del_timer(&priv->timer);
1164 hal_release_region(i, I82527_IO_SIZE);
1165 free_netdev(can_dev[i]);
1168 can_proc_remove(drv_name);
1170 if ((ret = hal_exit()))
1171 printk(KERN_INFO "%s: hal_exit error %d.\n", drv_name, ret);
1174 static __init int i82527_init_module(void)
1177 struct net_device *dev;
1179 if ((sizeof(canmessage_t) != 15) || (sizeof(canregs_t) != 256)) {
1180 printk(KERN_WARNING "%s sizes: canmessage_t %d canregs_t %d\n",
1181 CHIP_NAME, (int)sizeof(canmessage_t),
1182 (int)sizeof(canregs_t));
1186 if ((ret = hal_init()))
1189 if ((ret = can_set_drv_name()))
1192 if (clk < 1000 ) /* MHz command line value */
1195 if (clk < 1000000 ) /* kHz command line value */
1198 printk(KERN_INFO "%s driver v%s (%s)\n",
1199 drv_name, drv_version, drv_reldate);
1200 printk(KERN_INFO "%s - options [clk %d.%06d MHz] [restart_ms %dms]"
1202 drv_name, clk/1000000, clk%1000000, restart_ms, debug);
1203 printk(KERN_INFO "%s - options [force_dmc %d] [irq_mode %d]\n",
1204 drv_name, force_dmc, irq_mode);
1207 printk(KERN_INFO "%s: loading defaults.\n", drv_name);
1211 /* to ensure the proper access to the i82527 registers */
1212 /* the timing dependend settings have to be done first */
1214 dsc = iCPU_DSC; /* devide system clock => MCLK is 8MHz save */
1215 else if (clk > 8000000) /* 8MHz < clk <= 10MHz */
1216 dmc = iCPU_DMC; /* devide memory clock */
1218 /* devide memory clock even if it's not needed (regarding the spec) */
1222 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
1223 if (irq_mode & IRQ_MODE_SHARED)
1224 irqflags |= SA_SHIRQ;
1225 if (irq_mode & IRQ_MODE_DISABLE_LOCAL_IRQS)
1226 irqflags |= SA_INTERRUPT;
1228 if (irq_mode & IRQ_MODE_SHARED)
1229 irqflags |= IRQF_SHARED;
1230 if (irq_mode & IRQ_MODE_DISABLE_LOCAL_IRQS)
1231 irqflags |= IRQF_DISABLED;
1234 for (i = 0; base[i]; i++) {
1238 printk(KERN_DEBUG "%s: checking for %s on address 0x%lX ...\n",
1239 drv_name, CHIP_NAME, base[i]);
1241 if (!hal_request_region(i, I82527_IO_SIZE, drv_name)) {
1242 printk(KERN_ERR "%s: memory already in use\n",
1244 i82527_exit_module();
1251 // Enable configuration, put chip in bus-off, disable ints
1252 CANout(rbase[i], controlReg, iCTL_CCE | iCTL_INI);
1254 // Configure cpu interface / CLKOUT disable
1255 CANout(rbase[i], cpuInterfaceReg,(dsc | dmc));
1257 if (!i82527_probe_chip(rbase[i])) {
1258 printk(KERN_ERR "%s: probably missing controller"
1259 " hardware\n", drv_name);
1261 hal_release_region(i, I82527_IO_SIZE);
1262 i82527_exit_module();
1266 /* CLKOUT devider and slew rate calculation */
1267 if ((cdv[i] < 0) || (cdv[i] > 14)) {
1268 printk(KERN_WARNING "%s: adjusted cdv[%d]=%d to 0.\n",
1269 drv_name, i, cdv[i]);
1273 clkout = clk / (cdv[i] + 1); /* CLKOUT frequency */
1274 clockdiv = (u8)cdv[i]; /* devider value (see i82527 spec) */
1276 if (clkout <= 16000000) {
1277 clockdiv |= iCLK_SL1;
1278 if (clkout <= 8000000)
1279 clockdiv |= iCLK_SL0;
1280 } else if (clkout <= 24000000)
1281 clockdiv |= iCLK_SL0;
1283 // Set CLKOUT devider and slew rates
1284 CANout(rbase[i], clkOutReg, clockdiv);
1286 // Configure cpu interface / CLKOUT enable
1287 CANout(rbase[i], cpuInterfaceReg,(dsc | dmc | iCPU_CEN));
1289 CANout(rbase[i], busConfigReg, bcr[i]);
1291 dev = can_create_netdev(i, I82527_IO_SIZE);
1295 set_reset_mode(dev);
1296 can_proc_create(drv_name);
1300 hal_release_region(i, I82527_IO_SIZE);
1306 module_init(i82527_init_module);
1307 module_exit(i82527_exit_module);