kernel/2.6/drivers/net/can/mcp251x.c

   1 /*
   2  *
   3  * CAN bus driver for Microchip 251x CAN Controller with SPI Interface
   4  *
   5  * MCP2510 support and bug fixes by Christian Pellegrin
   6  * <chripell@evolware.org>
   7  *
   8  * Copyright 2007 Raymarine UK, Ltd. All Rights Reserved.
   9  * Written under contract by:
  10  *   Chris Elston, Katalix Systems, Ltd.
  11  *
  12  * Based on Microchip MCP251x CAN controller driver written by
  13  * David Vrabel, Copyright 2006 Arcom Control Systems Ltd.
  14  *
  15  * Based on CAN bus driver for the CCAN controller written by
  16  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix
  17  * - Simon Kallweit, intefo AG
  18  * Copyright 2007
  19  *
  20  * This program is free software; you can redistribute it and/or modify
  21  * it under the terms of the version 2 of the GNU General Public License
  22  * as published by the Free Software Foundation
  23  *
  24  * This program is distributed in the hope that it will be useful,
  25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27  * GNU General Public License for more details.
  28  *
  29  * You should have received a copy of the GNU General Public License
  30  * along with this program; if not, write to the Free Software
  31  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  32  *
  33  *
  34  *
  35  * Your platform definition file should specify something like:
  36  *
  37  * static struct mcp251x_platform_data mcp251x_info = {
  38  *         .oscillator_frequency = 8000000,
  39  *         .board_specific_setup = &mcp251x_setup,
  40  *         .model = CAN_MCP251X_MCP2510,
  41  *         .power_enable = mcp251x_power_enable,
  42  *         .transceiver_enable = NULL,
  43  * };
  44  *
  45  * static struct spi_board_info spi_board_info[] = {
  46  *         {
  47  *                 .modalias      = "mcp251x",
  48  *                 .platform_data = &mcp251x_info,
  49  *                 .irq           = IRQ_EINT13,
  50  *                 .max_speed_hz  = 2*1000*1000,
  51  *                 .chip_select   = 2,
  52  *         },
  53  * };
  54  *
  55  * Please see mcp251x.h for a description of the fields in
  56  * struct mcp251x_platform_data.
  57  *
  58  */
  59
  60 #include <linux/device.h>
  61 #include <linux/kernel.h>
  62 #include <linux/module.h>
  63 #include <linux/interrupt.h>
  64 #include <linux/platform_device.h>
  65 #include <linux/netdevice.h>
  66 #include <linux/can.h>
  67 #include <linux/spi/spi.h>
  68 #include <linux/can/dev.h>
  69 #include <linux/can/core.h>
  70 #include <linux/if_arp.h>
  71 #include <linux/dma-mapping.h>
  72 #include <linux/delay.h>
  73 #include <linux/completion.h>
  74 #include <linux/freezer.h>
  75 #include <linux/uaccess.h>
  76 #include <linux/io.h>
  77 #include <linux/can/platform/mcp251x.h>
  78
  79 /* SPI interface instruction set */
  80 #define INSTRUCTION_WRITE               0x02
  81 #define INSTRUCTION_READ                0x03
  82 #define INSTRUCTION_BIT_MODIFY  0x05
  83 #define INSTRUCTION_LOAD_TXB(n) (0x40 + 2 * (n))
  84 #define INSTRUCTION_READ_RXB(n) (((n) == 0) ? 0x90 : 0x94)
  85 #define INSTRUCTION_RESET               0xC0
  86
  87 /* MPC251x registers */
  88 #define CANSTAT       0x0e
  89 #define CANCTRL       0x0f
  90 #  define CANCTRL_REQOP_MASK        0xe0
  91 #  define CANCTRL_REQOP_CONF        0x80
  92 #  define CANCTRL_REQOP_LISTEN_ONLY 0x60
  93 #  define CANCTRL_REQOP_LOOPBACK    0x40
  94 #  define CANCTRL_REQOP_SLEEP       0x20
  95 #  define CANCTRL_REQOP_NORMAL      0x00
  96 #  define CANCTRL_OSM               0x08
  97 #  define CANCTRL_ABAT              0x10
  98 #define TEC           0x1c
  99 #define REC           0x1d
 100 #define CNF1          0x2a
 101 #define CNF2          0x29
 102 #  define CNF2_BTLMODE  0x80
 103 #define CNF3          0x28
 104 #  define CNF3_SOF      0x08
 105 #  define CNF3_WAKFIL   0x04
 106 #  define CNF3_PHSEG2_MASK 0x07
 107 #define CANINTE       0x2b
 108 #  define CANINTE_MERRE 0x80
 109 #  define CANINTE_WAKIE 0x40
 110 #  define CANINTE_ERRIE 0x20
 111 #  define CANINTE_TX2IE 0x10
 112 #  define CANINTE_TX1IE 0x08
 113 #  define CANINTE_TX0IE 0x04
 114 #  define CANINTE_RX1IE 0x02
 115 #  define CANINTE_RX0IE 0x01
 116 #define CANINTF       0x2c
 117 #  define CANINTF_MERRF 0x80
 118 #  define CANINTF_WAKIF 0x40
 119 #  define CANINTF_ERRIF 0x20
 120 #  define CANINTF_TX2IF 0x10
 121 #  define CANINTF_TX1IF 0x08
 122 #  define CANINTF_TX0IF 0x04
 123 #  define CANINTF_RX1IF 0x02
 124 #  define CANINTF_RX0IF 0x01
 125 #define EFLG          0x2d
 126 #  define EFLG_EWARN    0x01
 127 #  define EFLG_RXWAR    0x02
 128 #  define EFLG_TXWAR    0x04
 129 #  define EFLG_RXEP     0x08
 130 #  define EFLG_TXEP     0x10
 131 #  define EFLG_TXBO     0x20
 132 #  define EFLG_RX0OVR   0x40
 133 #  define EFLG_RX1OVR   0x80
 134 #define TXBCTRL(n)  ((n * 0x10) + 0x30)
 135 #  define TXBCTRL_ABTF  0x40
 136 #  define TXBCTRL_MLOA  0x20
 137 #  define TXBCTRL_TXERR 0x10
 138 #  define TXBCTRL_TXREQ 0x08
 139 #define RXBCTRL(n)  ((n * 0x10) + 0x60)
 140 #  define RXBCTRL_BUKT   0x04
 141 #  define RXBCTRL_RXM0   0x20
 142 #  define RXBCTRL_RXM1   0x40
 143
 144 /* Buffer size required for the largest SPI transfer (i.e., reading a
 145  * frame). */
 146 #define CAN_FRAME_MAX_DATA_LEN  8
 147 #define SPI_TRANSFER_BUF_LEN    (2*(6 + CAN_FRAME_MAX_DATA_LEN))
 148 #define CAN_FRAME_MAX_BITS      128
 149
 150 #define DEVICE_NAME "mcp251x"
 151
 152 static int mcp251x_enable_dma; /* Enable SPI DMA. Default: 0 (Off) */
 153 module_param(mcp251x_enable_dma, int, S_IRUGO);
 154 MODULE_PARM_DESC(mcp251x_enable_dma, "Enable SPI DMA. Default: 0 (Off)");
 155
 156 static struct can_bittiming_const mcp251x_bittiming_const = {
 157         .tseg1_min = 3,
 158         .tseg1_max = 16,
 159         .tseg2_min = 2,
 160         .tseg2_max = 8,
 161         .sjw_max = 4,
 162         .brp_min = 1,
 163         .brp_max = 64,
 164         .brp_inc = 1,
 165 };
 166
 167 struct mcp251x_priv {
 168         struct can_priv    can;
 169         struct net_device *net;
 170         struct spi_device *spi;
 171
 172         struct mutex spi_lock; /* SPI buffer lock */
 173         u8 *spi_tx_buf;
 174         u8 *spi_rx_buf;
 175         dma_addr_t spi_tx_dma;
 176         dma_addr_t spi_rx_dma;
 177
 178         struct sk_buff *tx_skb;
 179         struct workqueue_struct *wq;
 180         struct work_struct tx_work;
 181         struct work_struct irq_work;
 182         struct completion awake;
 183         int wake;
 184         int force_quit;
 185         int after_suspend;
 186 #define AFTER_SUSPEND_UP 1
 187 #define AFTER_SUSPEND_DOWN 2
 188 #define AFTER_SUSPEND_POWER 4
 189         int restart_tx;
 190 };
 191
 192 static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)
 193 {
 194         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 195         struct spi_transfer t = {
 196                 .tx_buf = priv->spi_tx_buf,
 197                 .rx_buf = priv->spi_rx_buf,
 198                 .len = 3,
 199                 .cs_change = 0,
 200         };
 201         struct spi_message m;
 202         u8 val = 0;
 203         int ret;
 204
 205         mutex_lock(&priv->spi_lock);
 206
 207         priv->spi_tx_buf[0] = INSTRUCTION_READ;
 208         priv->spi_tx_buf[1] = reg;
 209
 210         spi_message_init(&m);
 211
 212         if (mcp251x_enable_dma) {
 213                 t.tx_dma = priv->spi_tx_dma;
 214                 t.rx_dma = priv->spi_rx_dma;
 215                 m.is_dma_mapped = 1;
 216         }
 217
 218         spi_message_add_tail(&t, &m);
 219
 220         ret = spi_sync(spi, &m);
 221         if (ret < 0)
 222                 dev_dbg(&spi->dev, "%s: failed: ret = %d\n", __func__, ret);
 223         else
 224                 val = priv->spi_rx_buf[2];
 225
 226         mutex_unlock(&priv->spi_lock);
 227
 228         dev_dbg(&spi->dev, "%s: read %02x = %02x\n", __func__, reg, val);
 229         return val;
 230 }
 231
 232 static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)
 233 {
 234         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 235         struct spi_transfer t = {
 236                 .tx_buf = priv->spi_tx_buf,
 237                 .rx_buf = priv->spi_rx_buf,
 238                 .len = 3,
 239                 .cs_change = 0,
 240         };
 241         struct spi_message m;
 242         int ret;
 243
 244         mutex_lock(&priv->spi_lock);
 245
 246         priv->spi_tx_buf[0] = INSTRUCTION_WRITE;
 247         priv->spi_tx_buf[1] = reg;
 248         priv->spi_tx_buf[2] = val;
 249
 250         spi_message_init(&m);
 251
 252         if (mcp251x_enable_dma) {
 253                 t.tx_dma = priv->spi_tx_dma;
 254                 t.rx_dma = priv->spi_rx_dma;
 255                 m.is_dma_mapped = 1;
 256         }
 257
 258         spi_message_add_tail(&t, &m);
 259
 260         ret = spi_sync(spi, &m);
 261
 262         mutex_unlock(&priv->spi_lock);
 263
 264         if (ret < 0)
 265                 dev_dbg(&spi->dev, "%s: failed\n", __func__);
 266 }
 267
 268 static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
 269                                u8 mask, uint8_t val)
 270 {
 271         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 272         struct spi_transfer t = {
 273                 .tx_buf = priv->spi_tx_buf,
 274                 .rx_buf = priv->spi_rx_buf,
 275                 .len = 4,
 276                 .cs_change = 0,
 277         };
 278         struct spi_message m;
 279         int ret;
 280
 281         mutex_lock(&priv->spi_lock);
 282
 283         priv->spi_tx_buf[0] = INSTRUCTION_BIT_MODIFY;
 284         priv->spi_tx_buf[1] = reg;
 285         priv->spi_tx_buf[2] = mask;
 286         priv->spi_tx_buf[3] = val;
 287
 288         spi_message_init(&m);
 289
 290         if (mcp251x_enable_dma) {
 291                 t.tx_dma = priv->spi_tx_dma;
 292                 t.rx_dma = priv->spi_rx_dma;
 293                 m.is_dma_mapped = 1;
 294         }
 295
 296         spi_message_add_tail(&t, &m);
 297
 298         ret = spi_sync(spi, &m);
 299
 300         mutex_unlock(&priv->spi_lock);
 301
 302         if (ret < 0)
 303                 dev_dbg(&spi->dev, "%s: failed\n", __func__);
 304 }
 305
 306 static int mcp251x_hw_tx(struct spi_device *spi, struct can_frame *frame,
 307                           int tx_buf_idx)
 308 {
 309         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 310         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 311         u32 sid, eid, exide, rtr;
 312
 313         dev_dbg(&spi->dev, "%s\n", __func__);
 314
 315         exide = (frame->can_id & CAN_EFF_FLAG) ? 1 : 0; /* Extended ID Enable */
 316         if (exide)
 317                 sid = (frame->can_id & CAN_EFF_MASK) >> 18;
 318         else
 319                 sid = frame->can_id & CAN_SFF_MASK; /* Standard ID */
 320         eid = frame->can_id & CAN_EFF_MASK; /* Extended ID */
 321         rtr = (frame->can_id & CAN_RTR_FLAG) ? 1 : 0; /* Remote transmission */
 322
 323         if (pdata->model == CAN_MCP251X_MCP2510) {
 324                 int i;
 325
 326                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 1, sid >> 3);
 327                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 2,
 328                                   ((sid & 7) << 5) | (exide << 3) |
 329                                   ((eid >> 16) & 3));
 330                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 3,
 331                                   (eid >> 8) & 0xff);
 332                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 4, eid & 0xff);
 333                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 5,
 334                                   (rtr << 6) | frame->can_dlc);
 335
 336                 for (i = 0; i < frame->can_dlc ; i++) {
 337                         mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 6 + i,
 338                                           frame->data[i]);
 339                 }
 340         } else {
 341                 struct spi_transfer t = {
 342                         .tx_buf = priv->spi_tx_buf,
 343                         .rx_buf = priv->spi_rx_buf,
 344                         .cs_change = 0,
 345                         .len = 6 + CAN_FRAME_MAX_DATA_LEN,
 346                 };
 347                 struct spi_message m;
 348                 int ret;
 349                 u8 *tx_buf = priv->spi_tx_buf;
 350
 351                 mutex_lock(&priv->spi_lock);
 352
 353                 tx_buf[0] = INSTRUCTION_LOAD_TXB(tx_buf_idx);
 354                 tx_buf[1] = sid >> 3;
 355                 tx_buf[2] = ((sid & 7) << 5) | (exide << 3) |
 356                   ((eid >> 16) & 3);
 357                 tx_buf[3] = (eid >> 8) & 0xff;
 358                 tx_buf[4] = eid & 0xff;
 359                 tx_buf[5] = (rtr << 6) | frame->can_dlc;
 360
 361                 memcpy(tx_buf + 6, frame->data, frame->can_dlc);
 362
 363                 spi_message_init(&m);
 364
 365                 if (mcp251x_enable_dma) {
 366                         t.tx_dma = priv->spi_tx_dma;
 367                         t.rx_dma = priv->spi_rx_dma;
 368                         m.is_dma_mapped = 1;
 369                 }
 370
 371                 spi_message_add_tail(&t, &m);
 372
 373                 ret = spi_sync(spi, &m);
 374
 375                 mutex_unlock(&priv->spi_lock);
 376
 377                 if (ret < 0) {
 378                         dev_dbg(&spi->dev, "%s: failed: ret = %d\n", __func__,
 379                                 ret);
 380                         return -1;
 381                 }
 382         }
 383         mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx), TXBCTRL_TXREQ);
 384         return 0;
 385 }
 386
 387 static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
 388 {
 389         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 390         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 391         struct sk_buff *skb;
 392         struct can_frame *frame;
 393
 394         dev_dbg(&spi->dev, "%s\n", __func__);
 395
 396         skb = dev_alloc_skb(sizeof(struct can_frame));
 397         if (!skb) {
 398                 dev_dbg(&spi->dev, "%s: out of memory for Rx'd frame\n",
 399                         __func__);
 400                 priv->net->stats.rx_dropped++;
 401                 return;
 402         }
 403         skb->dev = priv->net;
 404         frame = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
 405
 406         if (pdata->model == CAN_MCP251X_MCP2510) {
 407                 int i;
 408                 u8 rx_buf[6];
 409
 410                 rx_buf[1] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 1);
 411                 rx_buf[2] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 2);
 412                 rx_buf[3] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 3);
 413                 rx_buf[4] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 4);
 414                 rx_buf[5] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 5);
 415
 416                 if ((rx_buf[2] >> 3) & 0x1) {
 417                         /* Extended ID format */
 418                         frame->can_id = CAN_EFF_FLAG;
 419                         frame->can_id |= ((rx_buf[2] & 3) << 16) |
 420                           (rx_buf[3] << 8) | rx_buf[4] |
 421                           (((rx_buf[1] << 3) | (rx_buf[2] >> 5)) << 18);
 422                 } else {
 423                         /* Standard ID format */
 424                         frame->can_id = (rx_buf[1] << 3) | (rx_buf[2] >> 5);
 425                 }
 426
 427                 if ((rx_buf[5] >> 6) & 0x1) {
 428                         /* Remote transmission request */
 429                         frame->can_id |= CAN_RTR_FLAG;
 430                 }
 431
 432                 /* Data length */
 433                 frame->can_dlc = rx_buf[5] & 0x0f;
 434                 if (frame->can_dlc > 8) {
 435                         dev_warn(&spi->dev, "invalid frame recevied\n");
 436                         priv->net->stats.rx_errors++;
 437                         dev_kfree_skb(skb);
 438                         return;
 439                 }
 440
 441                 for (i = 0; i < frame->can_dlc; i++) {
 442                         frame->data[i] = mcp251x_read_reg(spi,
 443                                                           RXBCTRL(buf_idx) +
 444                                                           6 + i);
 445                 }
 446         } else {
 447                 struct spi_transfer t = {
 448                         .tx_buf = priv->spi_tx_buf,
 449                         .rx_buf = priv->spi_rx_buf,
 450                         .cs_change = 0,
 451                         .len = 14, /* RX buffer: RXBnCTRL to RXBnD7 */
 452                 };
 453                 struct spi_message m;
 454                 int ret;
 455                 u8 *tx_buf = priv->spi_tx_buf;
 456                 u8 *rx_buf = priv->spi_rx_buf;
 457
 458                 mutex_lock(&priv->spi_lock);
 459
 460                 tx_buf[0] = INSTRUCTION_READ_RXB(buf_idx);
 461
 462                 spi_message_init(&m);
 463
 464                 if (mcp251x_enable_dma) {
 465                         t.tx_dma = priv->spi_tx_dma;
 466                         t.rx_dma = priv->spi_rx_dma;
 467                         m.is_dma_mapped = 1;
 468                 }
 469
 470                 spi_message_add_tail(&t, &m);
 471
 472                 ret = spi_sync(spi, &m);
 473
 474                 if (ret < 0) {
 475                         dev_dbg(&spi->dev, "%s: failed: ret = %d\n",
 476                                 __func__, ret);
 477                         priv->net->stats.rx_errors++;
 478                         mutex_unlock(&priv->spi_lock);
 479                         return;
 480                 }
 481
 482                 if ((rx_buf[2] >> 3) & 0x1) {
 483                         /* Extended ID format */
 484                         frame->can_id = CAN_EFF_FLAG;
 485                         frame->can_id |= ((rx_buf[2] & 3) << 16) |
 486                           (rx_buf[3] << 8) | rx_buf[4] |
 487                           (((rx_buf[1] << 3) | (rx_buf[2] >> 5)) << 18);
 488                 } else {
 489                         /* Standard ID format */
 490                         frame->can_id = (rx_buf[1] << 3) | (rx_buf[2] >> 5);
 491                 }
 492
 493                 if ((rx_buf[5] >> 6) & 0x1) {
 494                         /* Remote transmission request */
 495                         frame->can_id |= CAN_RTR_FLAG;
 496                 }
 497
 498                 /* Data length */
 499                 frame->can_dlc = rx_buf[5] & 0x0f;
 500                 if (frame->can_dlc > 8) {
 501                         dev_warn(&spi->dev, "invalid frame recevied\n");
 502                         priv->net->stats.rx_errors++;
 503                         dev_kfree_skb(skb);
 504                         mutex_unlock(&priv->spi_lock);
 505                         return;
 506                 }
 507
 508                 memcpy(frame->data, rx_buf + 6, CAN_FRAME_MAX_DATA_LEN);
 509
 510                 mutex_unlock(&priv->spi_lock);
 511         }
 512
 513         priv->net->stats.rx_packets++;
 514         priv->net->stats.rx_bytes += frame->can_dlc;
 515
 516         skb->protocol = __constant_htons(ETH_P_CAN);
 517         skb->pkt_type = PACKET_BROADCAST;
 518         skb->ip_summed = CHECKSUM_UNNECESSARY;
 519         netif_rx(skb);
 520 }
 521
 522 static void mcp251x_hw_sleep(struct spi_device *spi)
 523 {
 524         mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_SLEEP);
 525 }
 526
 527 static void mcp251x_hw_wakeup(struct spi_device *spi)
 528 {
 529         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 530
 531         priv->wake = 1;
 532
 533         /* Can only wake up by generating a wake-up interrupt. */
 534         mcp251x_write_bits(spi, CANINTE, CANINTE_WAKIE, CANINTE_WAKIE);
 535         mcp251x_write_bits(spi, CANINTF, CANINTF_WAKIF, CANINTF_WAKIF);
 536
 537         /* Wait until the device is awake */
 538         if (!wait_for_completion_timeout(&priv->awake, HZ))
 539                 dev_err(&spi->dev, "MCP251x didn't wake-up\n");
 540 }
 541
 542 static int mcp251x_hard_start_xmit(struct sk_buff *skb, struct net_device *net)
 543 {
 544         struct mcp251x_priv *priv = netdev_priv(net);
 545         struct spi_device *spi = priv->spi;
 546
 547         dev_dbg(&spi->dev, "%s\n", __func__);
 548
 549         if (priv->tx_skb) {
 550                 dev_warn(&spi->dev, "hard_xmit called with not null tx_skb\n");
 551                 return NETDEV_TX_BUSY;
 552         }
 553
 554         if (skb->len != sizeof(struct can_frame)) {
 555                 dev_dbg(&spi->dev, "dropping packet - bad length\n");
 556                 dev_kfree_skb(skb);
 557                 net->stats.tx_dropped++;
 558                 return 0;
 559         }
 560
 561         netif_stop_queue(net);
 562         priv->tx_skb = skb;
 563         net->trans_start = jiffies;
 564         queue_work(priv->wq, &priv->tx_work);
 565
 566         return NETDEV_TX_OK;
 567 }
 568
 569 static int mcp251x_do_set_mode(struct net_device *net, enum can_mode mode)
 570 {
 571         struct mcp251x_priv *priv = netdev_priv(net);
 572         struct spi_device *spi = priv->spi;
 573
 574         dev_dbg(&spi->dev, "%s (unimplemented)\n", __func__);
 575
 576         switch (mode) {
 577         default:
 578                 return -EOPNOTSUPP;
 579         }
 580
 581         return 0;
 582 }
 583
 584 static void mcp251x_set_normal_mode(struct spi_device *spi)
 585 {
 586         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 587         unsigned long timeout;
 588
 589         /* Enable interrupts */
 590         mcp251x_write_reg(spi, CANINTE,
 591                 CANINTE_ERRIE | CANINTE_TX2IE | CANINTE_TX1IE |
 592                 CANINTE_TX0IE | CANINTE_RX1IE | CANINTE_RX0IE);
 593
 594         if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
 595                 /* Put device into loopback mode */
 596                 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LOOPBACK);
 597         } else {
 598                 /* Put device into normal mode */
 599                 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
 600
 601                 /* Wait for the device to enter normal mode */
 602                 timeout = jiffies + HZ;
 603                 while (mcp251x_read_reg(spi, CANSTAT) & 0xE0) {
 604                         udelay(10);
 605                         if (time_after(jiffies, timeout)) {
 606                                 dev_err(&spi->dev, "MCP251x didn't"
 607                                         " enter in normal mode\n");
 608                                 break;
 609                         }
 610                 }
 611         }
 612 }
 613
 614 static int mcp251x_do_set_bittiming(struct net_device *net)
 615 {
 616         struct mcp251x_priv *priv = netdev_priv(net);
 617         struct can_bittiming *bt = &priv->can.bittiming;
 618         struct spi_device *spi = priv->spi;
 619         u8 state;
 620
 621         dev_dbg(&spi->dev, "%s: BRP = %d, PropSeg = %d, PS1 = %d,"
 622                 " PS2 = %d, SJW = %d\n", __func__, bt->brp,
 623                 bt->prop_seg, bt->phase_seg1, bt->phase_seg2,
 624                 bt->sjw);
 625
 626         /* Store original mode and set mode to config */
 627         state = mcp251x_read_reg(spi, CANCTRL);
 628         state = mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK;
 629         mcp251x_write_bits(spi, CANCTRL, CANCTRL_REQOP_MASK,
 630                            CANCTRL_REQOP_CONF);
 631
 632         mcp251x_write_reg(spi, CNF1, ((bt->sjw - 1) << 6) | (bt->brp - 1));
 633         mcp251x_write_reg(spi, CNF2, CNF2_BTLMODE |
 634                           ((bt->phase_seg1 - 1) << 3) |
 635                           (bt->prop_seg - 1));
 636         mcp251x_write_bits(spi, CNF3, CNF3_PHSEG2_MASK,
 637                            (bt->phase_seg2 - 1));
 638
 639         /* Restore original state */
 640         mcp251x_write_bits(spi, CANCTRL, CANCTRL_REQOP_MASK, state);
 641
 642         return 0;
 643 }
 644
 645 static void mcp251x_setup(struct net_device *net, struct mcp251x_priv *priv,
 646                           struct spi_device *spi)
 647 {
 648         int ret;
 649
 650         /* Set initial baudrate. Make sure that registers are updated
 651            always by explicitly calling mcp251x_do_set_bittiming */
 652         ret = can_set_bittiming(net);
 653         if (ret)
 654                 dev_err(&spi->dev, "unable to set initial baudrate!\n");
 655         else
 656                 mcp251x_do_set_bittiming(net);
 657
 658         /* Enable RX0->RX1 buffer roll over and disable filters */
 659         mcp251x_write_bits(spi, RXBCTRL(0),
 660                            RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1,
 661                            RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1);
 662         mcp251x_write_bits(spi, RXBCTRL(1),
 663                            RXBCTRL_RXM0 | RXBCTRL_RXM1,
 664                            RXBCTRL_RXM0 | RXBCTRL_RXM1);
 665
 666         dev_dbg(&spi->dev, "%s RXBCTL 0 and 1: %02x %02x\n", __func__,
 667                 mcp251x_read_reg(spi, RXBCTRL(0)),
 668                 mcp251x_read_reg(spi, RXBCTRL(1)));
 669 }
 670
 671 static void mcp251x_hw_reset(struct spi_device *spi)
 672 {
 673         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 674         int ret;
 675
 676         mutex_lock(&priv->spi_lock);
 677
 678         priv->spi_tx_buf[0] = INSTRUCTION_RESET;
 679
 680         ret = spi_write(spi, priv->spi_tx_buf, 1);
 681
 682         mutex_unlock(&priv->spi_lock);
 683
 684         if (ret < 0)
 685                 dev_dbg(&spi->dev, "%s: failed: ret = %d\n", __func__, ret);
 686         /* wait for reset to finish */
 687         mdelay(10);
 688 }
 689
 690 static int mcp251x_open(struct net_device *net)
 691 {
 692         struct mcp251x_priv *priv = netdev_priv(net);
 693         struct spi_device *spi = priv->spi;
 694         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 695
 696         dev_dbg(&spi->dev, "%s\n", __func__);
 697
 698         if (pdata->transceiver_enable)
 699                 pdata->transceiver_enable(1);
 700
 701         priv->force_quit = 0;
 702         priv->tx_skb = NULL;
 703         enable_irq(spi->irq);
 704         mcp251x_hw_wakeup(spi);
 705         mcp251x_hw_reset(spi);
 706         mcp251x_setup(net, priv, spi);
 707         mcp251x_set_normal_mode(spi);
 708         netif_wake_queue(net);
 709
 710         return 0;
 711 }
 712
 713 static int mcp251x_stop(struct net_device *net)
 714 {
 715         struct mcp251x_priv *priv = netdev_priv(net);
 716         struct spi_device *spi = priv->spi;
 717         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 718
 719         dev_dbg(&spi->dev, "%s\n", __func__);
 720
 721         /* Disable and clear pending interrupts */
 722         mcp251x_write_reg(spi, CANINTE, 0x00);
 723         mcp251x_write_reg(spi, CANINTF, 0x00);
 724
 725         priv->force_quit = 1;
 726         disable_irq(spi->irq);
 727         flush_workqueue(priv->wq);
 728
 729         mcp251x_write_reg(spi, TXBCTRL(0), 0);
 730         if (priv->tx_skb) {
 731                 net->stats.tx_errors++;
 732                 dev_kfree_skb(priv->tx_skb);
 733                 priv->tx_skb = NULL;
 734         }
 735
 736         mcp251x_hw_sleep(spi);
 737
 738         if (pdata->transceiver_enable)
 739                 pdata->transceiver_enable(0);
 740
 741         return 0;
 742 }
 743
 744 static int mcp251x_do_get_state(struct net_device *net, enum can_state  *state)
 745 {
 746         struct mcp251x_priv *priv = netdev_priv(net);
 747         struct spi_device *spi = priv->spi;
 748         u8 eflag;
 749
 750         eflag = mcp251x_read_reg(spi, EFLG);
 751
 752         if (eflag & EFLG_TXBO)
 753                 *state = CAN_STATE_BUS_OFF;
 754         else if (eflag & (EFLG_RXEP | EFLG_TXEP))
 755                 *state = CAN_STATE_BUS_PASSIVE;
 756         else if (eflag & EFLG_EWARN)
 757                 *state = CAN_STATE_BUS_WARNING;
 758         else
 759                 *state = CAN_STATE_ACTIVE;
 760
 761         return 0;
 762 }
 763
 764 static void mcp251x_tx_work_handler(struct work_struct *ws)
 765 {
 766         struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
 767                                                  tx_work);
 768         struct spi_device *spi = priv->spi;
 769         struct can_frame *frame;;
 770
 771         dev_dbg(&spi->dev, "%s\n", __func__);
 772
 773         if (priv->tx_skb) {
 774                 frame = (struct can_frame *)priv->tx_skb->data;
 775                 if (frame->can_dlc > CAN_FRAME_MAX_DATA_LEN)
 776                         frame->can_dlc = CAN_FRAME_MAX_DATA_LEN;
 777                 mcp251x_hw_tx(spi, frame, 0);
 778         }
 779 }
 780
 781 static void mcp251x_irq_work_handler(struct work_struct *ws)
 782 {
 783         struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
 784                                                  irq_work);
 785         struct spi_device *spi = priv->spi;
 786         struct net_device *net = priv->net;
 787         u8 intf;
 788         u8 txbnctrl;
 789         /* the next limitation is needed so we give some time to the
 790          * tx workqueue */
 791 #define MAX_LOOPS 10
 792         int loops;
 793
 794         if (priv->after_suspend) {
 795                 /* Wait whilst the device wakes up */
 796                 mdelay(10);
 797                 mcp251x_hw_reset(spi);
 798                 mcp251x_setup(net, priv, spi);
 799                 if (priv->after_suspend & AFTER_SUSPEND_UP) {
 800                         netif_device_attach(net);
 801                         /* clear since we lost tx buffer */
 802                         if (priv->tx_skb) {
 803                                 net->stats.tx_errors++;
 804                                 dev_kfree_skb(priv->tx_skb);
 805                                 priv->tx_skb = NULL;
 806                                 netif_wake_queue(net);
 807                         }
 808                         mcp251x_set_normal_mode(spi);
 809                 } else
 810                         mcp251x_hw_sleep(spi);
 811                 priv->after_suspend = 0;
 812                 return;
 813         }
 814
 815         loops = 0;
 816         while (!priv->force_quit && !freezing(current) && loops < MAX_LOOPS) {
 817                 if (priv->restart_tx) {
 818                         priv->restart_tx = 0;
 819                         dev_warn(&spi->dev,
 820                                  "timeout in txing a packet, restarting\n");
 821                         mcp251x_write_reg(spi, TXBCTRL(0), 0);
 822                         if (priv->tx_skb) {
 823                                 net->stats.tx_errors++;
 824                                 dev_kfree_skb(priv->tx_skb);
 825                                 priv->tx_skb = NULL;
 826                         }
 827                         netif_wake_queue(net);
 828                 }
 829
 830                 if (priv->wake) {
 831                         /* Wait whilst the device wakes up */
 832                         mdelay(10);
 833                         priv->wake = 0;
 834                 }
 835
 836                 intf = mcp251x_read_reg(spi, CANINTF);
 837                 if (intf == 0x00)
 838                         break;
 839                 mcp251x_write_bits(spi, CANINTF, intf, 0x00);
 840
 841                 dev_dbg(&spi->dev, "interrupt:%s%s%s%s%s%s%s%s\n",
 842                         (intf & CANINTF_MERRF) ? " MERR" : "",
 843                         (intf & CANINTF_WAKIF) ? " WAK" : "",
 844                         (intf & CANINTF_ERRIF) ? " ERR" : "",
 845                         (intf & CANINTF_TX2IF) ? " TX2" : "",
 846                         (intf & CANINTF_TX1IF) ? " TX1" : "",
 847                         (intf & CANINTF_TX0IF) ? " TX0" : "",
 848                         (intf & CANINTF_RX1IF) ? " RX1" : "",
 849                         (intf & CANINTF_RX0IF) ? " RX0" : "");
 850
 851                 if (intf & CANINTF_WAKIF)
 852                         complete(&priv->awake);
 853
 854                 if (intf & CANINTF_MERRF) {
 855                         /* if there are no pending Tx buffers, restart queue */
 856                         txbnctrl = mcp251x_read_reg(spi, TXBCTRL(0));
 857                         if (!(txbnctrl & TXBCTRL_TXREQ)) {
 858                                 if (priv->tx_skb) {
 859                                         net->stats.tx_errors++;
 860                                         dev_kfree_skb(priv->tx_skb);
 861                                         priv->tx_skb = NULL;
 862                                 }
 863                                 netif_wake_queue(net);
 864                         }
 865                 }
 866
 867                 if (intf & CANINTF_ERRIF) {
 868                         struct sk_buff *skb;
 869                         struct can_frame *frame = NULL;
 870                         u8 eflag = mcp251x_read_reg(spi, EFLG);
 871
 872                         dev_dbg(&spi->dev, "EFLG = 0x%02x\n", eflag);
 873
 874                         /* Create error frame */
 875                         skb = dev_alloc_skb(sizeof(struct can_frame));
 876                         if (skb) {
 877                                 frame = (struct can_frame *)
 878                                         skb_put(skb, sizeof(struct can_frame));
 879                                 frame->can_id = CAN_ERR_FLAG;
 880                                 frame->can_dlc = CAN_ERR_DLC;
 881
 882                                 skb->dev = net;
 883                                 skb->protocol = __constant_htons(ETH_P_CAN);
 884                                 skb->pkt_type = PACKET_BROADCAST;
 885                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 886
 887                                 /* Set error frame flags based on bus state */
 888                                 if (eflag & EFLG_TXBO) {
 889                                         frame->can_id |= CAN_ERR_BUSOFF;
 890                                 } else if (eflag & EFLG_TXEP) {
 891                                         frame->can_id |= CAN_ERR_CRTL;
 892                                         frame->data[1] |=
 893                                           CAN_ERR_CRTL_TX_PASSIVE;
 894                                 } else if (eflag & EFLG_RXEP) {
 895                                         frame->can_id |= CAN_ERR_CRTL;
 896                                         frame->data[1] |=
 897                                           CAN_ERR_CRTL_RX_PASSIVE;
 898                                 } else if (eflag & EFLG_TXWAR) {
 899                                         frame->can_id |= CAN_ERR_CRTL;
 900                                         frame->data[1] |=
 901                                           CAN_ERR_CRTL_TX_WARNING;
 902                                 } else if (eflag & EFLG_RXWAR) {
 903                                         frame->can_id |= CAN_ERR_CRTL;
 904                                         frame->data[1] |=
 905                                           CAN_ERR_CRTL_RX_WARNING;
 906                                 }
 907                         }
 908
 909                         if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR)) {
 910                                 if (eflag & EFLG_RX0OVR)
 911                                         net->stats.rx_over_errors++;
 912                                 if (eflag & EFLG_RX1OVR)
 913                                         net->stats.rx_over_errors++;
 914                                 if (frame) {
 915                                         frame->can_id |= CAN_ERR_CRTL;
 916                                         frame->data[1] =
 917                                           CAN_ERR_CRTL_RX_OVERFLOW;
 918                                 }
 919                         }
 920                         mcp251x_write_reg(spi, EFLG, 0x00);
 921
 922                         if (skb)
 923                                 netif_rx(skb);
 924                 }
 925
 926                 if (intf & (CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)) {
 927                         if (priv->tx_skb) {
 928                                 net->stats.tx_packets++;
 929                                 net->stats.tx_bytes +=
 930                                         ((struct can_frame *)
 931                                          (priv->tx_skb->data))->can_dlc;
 932                                 dev_kfree_skb(priv->tx_skb);
 933                                 priv->tx_skb = NULL;
 934                         }
 935                         netif_wake_queue(net);
 936                 }
 937
 938                 if (intf & CANINTF_RX0IF)
 939                         mcp251x_hw_rx(spi, 0);
 940
 941                 if (intf & CANINTF_RX1IF)
 942                         mcp251x_hw_rx(spi, 1);
 943
 944                 loops++;
 945         }
 946
 947         mcp251x_read_reg(spi, CANSTAT);
 948
 949         dev_dbg(&spi->dev, "interrupt ended\n");
 950 }
 951
 952 static irqreturn_t mcp251x_can_isr(int irq, void *dev_id)
 953 {
 954         struct net_device *net = (struct net_device *)dev_id;
 955         struct mcp251x_priv *priv = netdev_priv(net);
 956
 957         dev_dbg(&priv->spi->dev, "%s: irq\n", __func__);
 958         /* Schedule bottom half */
 959         if (!work_pending(&priv->irq_work))
 960                 queue_work(priv->wq, &priv->irq_work);
 961
 962         return IRQ_HANDLED;
 963 }
 964
 965 static void mcp251x_tx_timeout(struct net_device *net)
 966 {
 967         struct mcp251x_priv *priv = netdev_priv(net);
 968
 969         priv->restart_tx = 1;
 970         queue_work(priv->wq, &priv->irq_work);
 971 }
 972
 973 static struct net_device *alloc_mcp251x_netdev(int sizeof_priv)
 974 {
 975         struct net_device *net;
 976         struct mcp251x_priv *priv;
 977
 978         net = alloc_candev(sizeof_priv);
 979         if (!net)
 980                 return NULL;
 981
 982         priv = netdev_priv(net);
 983
 984         net->open               = mcp251x_open;
 985         net->stop               = mcp251x_stop;
 986         net->hard_start_xmit    = mcp251x_hard_start_xmit;
 987         net->tx_timeout         = mcp251x_tx_timeout;
 988         net->watchdog_timeo     = HZ;
 989
 990         priv->can.bittiming_const = &mcp251x_bittiming_const;
 991         priv->can.do_get_state    = mcp251x_do_get_state;
 992         priv->can.do_set_mode     = mcp251x_do_set_mode;
 993
 994         priv->net = net;
 995
 996         return net;
 997 }
 998
 999 static int __devinit mcp251x_can_probe(struct spi_device *spi)
1000 {
1001         struct net_device *net;
1002         struct mcp251x_priv *priv;
1003         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1004         int ret = -ENODEV;
1005
1006         if (!pdata) {
1007                 /* Platform data is required for osc freq */
1008                 goto error_out;
1009         }
1010
1011         /* Allocate can/net device */
1012         net = alloc_mcp251x_netdev(sizeof(struct mcp251x_priv));
1013         if (!net) {
1014                 ret = -ENOMEM;
1015                 goto error_alloc;
1016         }
1017
1018         priv = netdev_priv(net);
1019         dev_set_drvdata(&spi->dev, priv);
1020
1021         priv->spi = spi;
1022         mutex_init(&priv->spi_lock);
1023
1024         priv->can.bittiming.clock = pdata->oscillator_frequency / 2;
1025
1026         /* If requested, allocate DMA buffers */
1027         if (mcp251x_enable_dma) {
1028                 spi->dev.coherent_dma_mask = DMA_32BIT_MASK;
1029
1030                 /* Minimum coherent DMA allocation is PAGE_SIZE, so allocate
1031                    that much and share it between Tx and Rx DMA buffers. */
1032                 priv->spi_tx_buf = dma_alloc_coherent(&spi->dev,
1033                         PAGE_SIZE, &priv->spi_tx_dma, GFP_DMA);
1034
1035                 if (priv->spi_tx_buf) {
1036                         priv->spi_rx_buf = (u8 *)(priv->spi_tx_buf +
1037                                 (PAGE_SIZE / 2));
1038                         priv->spi_rx_dma = (dma_addr_t)(priv->spi_tx_dma +
1039                                 (PAGE_SIZE / 2));
1040                 } else {
1041                         /* Fall back to non-DMA */
1042                         mcp251x_enable_dma = 0;
1043                 }
1044         }
1045
1046         /* Allocate non-DMA buffers */
1047         if (!mcp251x_enable_dma) {
1048                 priv->spi_tx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1049                 if (!priv->spi_tx_buf) {
1050                         ret = -ENOMEM;
1051                         goto error_tx_buf;
1052                 }
1053                 priv->spi_rx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1054                 if (!priv->spi_tx_buf) {
1055                         ret = -ENOMEM;
1056                         goto error_rx_buf;
1057                 }
1058         }
1059
1060         if (pdata->power_enable)
1061                 pdata->power_enable(1);
1062
1063         /* Call out to platform specific setup */
1064         if (pdata->board_specific_setup)
1065                 pdata->board_specific_setup(spi);
1066
1067         SET_NETDEV_DEV(net, &spi->dev);
1068
1069         priv->wq = create_freezeable_workqueue("mcp251x_wq");
1070
1071         INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
1072         INIT_WORK(&priv->irq_work, mcp251x_irq_work_handler);
1073
1074         init_completion(&priv->awake);
1075
1076         /* Configure the SPI bus */
1077         spi->mode = SPI_MODE_0;
1078         spi->bits_per_word = 8;
1079         spi_setup(spi);
1080
1081         /* Register IRQ */
1082         if (request_irq(spi->irq, mcp251x_can_isr,
1083                         IRQF_TRIGGER_FALLING, DEVICE_NAME, net) < 0) {
1084                 dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
1085                 goto error_irq;
1086         }
1087         disable_irq(spi->irq);
1088
1089         mcp251x_hw_reset(spi);
1090         mcp251x_hw_sleep(spi);
1091
1092         if (pdata->transceiver_enable)
1093                 pdata->transceiver_enable(0);
1094
1095         ret = register_netdev(net);
1096         if (ret >= 0) {
1097                 dev_info(&spi->dev, "probed\n");
1098                 return ret;
1099         }
1100
1101         free_irq(spi->irq, net);
1102 error_irq:
1103         if (!mcp251x_enable_dma)
1104                 kfree(priv->spi_rx_buf);
1105 error_rx_buf:
1106         if (!mcp251x_enable_dma)
1107                 kfree(priv->spi_tx_buf);
1108 error_tx_buf:
1109         free_candev(net);
1110         if (mcp251x_enable_dma) {
1111                 dma_free_coherent(&spi->dev, PAGE_SIZE,
1112                         priv->spi_tx_buf, priv->spi_tx_dma);
1113         }
1114 error_alloc:
1115         dev_err(&spi->dev, "probe failed\n");
1116 error_out:
1117         return ret;
1118 }
1119
1120 static int __devexit mcp251x_can_remove(struct spi_device *spi)
1121 {
1122         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1123         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1124         struct net_device *net = priv->net;
1125
1126         free_irq(spi->irq, net);
1127         priv->force_quit = 1;
1128         flush_workqueue(priv->wq);
1129         destroy_workqueue(priv->wq);
1130
1131         if (mcp251x_enable_dma) {
1132                 dma_free_coherent(&spi->dev, PAGE_SIZE,
1133                         priv->spi_tx_buf, priv->spi_tx_dma);
1134         } else {
1135                 kfree(priv->spi_tx_buf);
1136                 kfree(priv->spi_rx_buf);
1137         }
1138
1139         unregister_netdev(net);
1140         free_candev(net);
1141
1142         if (pdata->power_enable)
1143                 pdata->power_enable(0);
1144
1145         return 0;
1146 }
1147
1148 #ifdef CONFIG_PM
1149 static int mcp251x_can_suspend(struct spi_device *spi, pm_message_t state)
1150 {
1151         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1152         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1153         struct net_device *net = priv->net;
1154
1155         if (netif_running(net)) {
1156                 netif_device_detach(net);
1157
1158                 mcp251x_hw_sleep(spi);
1159                 if (pdata->transceiver_enable)
1160                         pdata->transceiver_enable(0);
1161                 priv->after_suspend = AFTER_SUSPEND_UP;
1162         } else
1163                 priv->after_suspend = AFTER_SUSPEND_DOWN;
1164
1165         if (pdata->power_enable) {
1166                 pdata->power_enable(0);
1167                 priv->after_suspend |= AFTER_SUSPEND_POWER;
1168         }
1169
1170         return 0;
1171 }
1172
1173 static int mcp251x_can_resume(struct spi_device *spi)
1174 {
1175         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1176         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1177
1178         if (priv->after_suspend & AFTER_SUSPEND_POWER) {
1179                 pdata->power_enable(1);
1180                 queue_work(priv->wq, &priv->irq_work);
1181         } else {
1182                 if (priv->after_suspend & AFTER_SUSPEND_UP) {
1183                         if (pdata->transceiver_enable)
1184                                 pdata->transceiver_enable(1);
1185                         queue_work(priv->wq, &priv->irq_work);
1186                 } else
1187                         priv->after_suspend = 0;
1188         }
1189         return 0;
1190 }
1191 #else
1192 #define mcp251x_can_suspend NULL
1193 #define mcp251x_can_resume NULL
1194 #endif
1195
1196 static struct spi_driver mcp251x_can_driver = {
1197         .driver = {
1198                 .name           = DEVICE_NAME,
1199                 .bus            = &spi_bus_type,
1200                 .owner          = THIS_MODULE,
1201         },
1202
1203         .probe          = mcp251x_can_probe,
1204         .remove         = __devexit_p(mcp251x_can_remove),
1205         .suspend        = mcp251x_can_suspend,
1206         .resume         = mcp251x_can_resume,
1207 };
1208
1209 static int __init mcp251x_can_init(void)
1210 {
1211         return spi_register_driver(&mcp251x_can_driver);
1212 }
1213
1214 static void __exit mcp251x_can_exit(void)
1215 {
1216         spi_unregister_driver(&mcp251x_can_driver);
1217 }
1218
1219 module_init(mcp251x_can_init);
1220 module_exit(mcp251x_can_exit);
1221
1222 MODULE_AUTHOR("Chris Elston <celston@katalix.com>, "
1223               "Christian Pellegrin <chripell@evolware.org>");
1224 MODULE_DESCRIPTION("Microchip 251x CAN driver");
1225 MODULE_LICENSE("GPL v2");