kernel/2.6/drivers/net/can/mcp251x.c

   1 /*
   2  * CAN bus driver for Microchip 251x CAN Controller with SPI Interface
   3  *
   4  * MCP2510 support and bug fixes by Christian Pellegrin
   5  * <chripell@evolware.org>
   6  *
   7  * Copyright 2007 Raymarine UK, Ltd. All Rights Reserved.
   8  * Written under contract by:
   9  *   Chris Elston, Katalix Systems, Ltd.
  10  *
  11  * Based on Microchip MCP251x CAN controller driver written by
  12  * David Vrabel, Copyright 2006 Arcom Control Systems Ltd.
  13  *
  14  * Based on CAN bus driver for the CCAN controller written by
  15  * - Sascha Hauer, Marc Kleine-Budde, Pengutronix
  16  * - Simon Kallweit, intefo AG
  17  * Copyright 2007
  18  *
  19  * This program is free software; you can redistribute it and/or modify
  20  * it under the terms of the version 2 of the GNU General Public License
  21  * as published by the Free Software Foundation
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  31  *
  32  *
  33  *
  34  * Your platform definition file should specify something like:
  35  *
  36  * static struct mcp251x_platform_data mcp251x_info = {
  37  *         .oscillator_frequency = 8000000,
  38  *         .board_specific_setup = &mcp251x_setup,
  39  *         .model = CAN_MCP251X_MCP2510,
  40  *         .power_enable = mcp251x_power_enable,
  41  *         .transceiver_enable = NULL,
  42  * };
  43  *
  44  * static struct spi_board_info spi_board_info[] = {
  45  *         {
  46  *                 .modalias      = "mcp251x",
  47  *                 .platform_data = &mcp251x_info,
  48  *                 .irq           = IRQ_EINT13,
  49  *                 .max_speed_hz  = 2*1000*1000,
  50  *                 .chip_select   = 2,
  51  *         },
  52  * };
  53  *
  54  * Please see mcp251x.h for a description of the fields in
  55  * struct mcp251x_platform_data.
  56  *
  57  */
  58
  59 #include <linux/device.h>
  60 #include <linux/kernel.h>
  61 #include <linux/module.h>
  62 #include <linux/interrupt.h>
  63 #include <linux/platform_device.h>
  64 #include <linux/netdevice.h>
  65 #include <socketcan/can.h>
  66 #include <linux/spi/spi.h>
  67 #include <socketcan/can/dev.h>
  68 #include <socketcan/can/core.h>
  69 #include <linux/if_arp.h>
  70 #include <linux/dma-mapping.h>
  71 #include <linux/delay.h>
  72 #include <linux/completion.h>
  73 #include <linux/freezer.h>
  74 #include <linux/uaccess.h>
  75 #include <linux/io.h>
  76 #include <socketcan/can/platform/mcp251x.h>
  77
  78 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
  79 #error This driver does not support Kernel versions < 2.6.22
  80 #endif
  81
  82 /* SPI interface instruction set */
  83 #define INSTRUCTION_WRITE       0x02
  84 #define INSTRUCTION_READ        0x03
  85 #define INSTRUCTION_BIT_MODIFY  0x05
  86 #define INSTRUCTION_LOAD_TXB(n) (0x40 + 2 * (n))
  87 #define INSTRUCTION_READ_RXB(n) (((n) == 0) ? 0x90 : 0x94)
  88 #define INSTRUCTION_RESET       0xC0
  89
  90 /* MPC251x registers */
  91 #define CANSTAT       0x0e
  92 #define CANCTRL       0x0f
  93 #  define CANCTRL_REQOP_MASK        0xe0
  94 #  define CANCTRL_REQOP_CONF        0x80
  95 #  define CANCTRL_REQOP_LISTEN_ONLY 0x60
  96 #  define CANCTRL_REQOP_LOOPBACK    0x40
  97 #  define CANCTRL_REQOP_SLEEP       0x20
  98 #  define CANCTRL_REQOP_NORMAL      0x00
  99 #  define CANCTRL_OSM               0x08
 100 #  define CANCTRL_ABAT              0x10
 101 #define TEC           0x1c
 102 #define REC           0x1d
 103 #define CNF1          0x2a
 104 #define CNF2          0x29
 105 #  define CNF2_BTLMODE  0x80
 106 #define CNF3          0x28
 107 #  define CNF3_SOF         0x08
 108 #  define CNF3_WAKFIL      0x04
 109 #  define CNF3_PHSEG2_MASK 0x07
 110 #define CANINTE       0x2b
 111 #  define CANINTE_MERRE 0x80
 112 #  define CANINTE_WAKIE 0x40
 113 #  define CANINTE_ERRIE 0x20
 114 #  define CANINTE_TX2IE 0x10
 115 #  define CANINTE_TX1IE 0x08
 116 #  define CANINTE_TX0IE 0x04
 117 #  define CANINTE_RX1IE 0x02
 118 #  define CANINTE_RX0IE 0x01
 119 #define CANINTF       0x2c
 120 #  define CANINTF_MERRF 0x80
 121 #  define CANINTF_WAKIF 0x40
 122 #  define CANINTF_ERRIF 0x20
 123 #  define CANINTF_TX2IF 0x10
 124 #  define CANINTF_TX1IF 0x08
 125 #  define CANINTF_TX0IF 0x04
 126 #  define CANINTF_RX1IF 0x02
 127 #  define CANINTF_RX0IF 0x01
 128 #define EFLG          0x2d
 129 #  define EFLG_EWARN    0x01
 130 #  define EFLG_RXWAR    0x02
 131 #  define EFLG_TXWAR    0x04
 132 #  define EFLG_RXEP     0x08
 133 #  define EFLG_TXEP     0x10
 134 #  define EFLG_TXBO     0x20
 135 #  define EFLG_RX0OVR   0x40
 136 #  define EFLG_RX1OVR   0x80
 137 #define TXBCTRL(n)  ((n * 0x10) + 0x30)
 138 #  define TXBCTRL_ABTF  0x40
 139 #  define TXBCTRL_MLOA  0x20
 140 #  define TXBCTRL_TXERR 0x10
 141 #  define TXBCTRL_TXREQ 0x08
 142 #define RXBCTRL(n)  ((n * 0x10) + 0x60)
 143 #  define RXBCTRL_BUKT  0x04
 144 #  define RXBCTRL_RXM0  0x20
 145 #  define RXBCTRL_RXM1  0x40
 146
 147 /* Buffer size required for the largest SPI transfer (i.e., reading a
 148  * frame). */
 149 #define CAN_FRAME_MAX_DATA_LEN  8
 150 #define SPI_TRANSFER_BUF_LEN    (2*(6 + CAN_FRAME_MAX_DATA_LEN))
 151 #define CAN_FRAME_MAX_BITS      128
 152
 153 #define TX_ECHO_SKB_MAX 1
 154
 155 #define DEVICE_NAME "mcp251x"
 156
 157 static int mcp251x_enable_dma; /* Enable SPI DMA. Default: 0 (Off) */
 158 module_param(mcp251x_enable_dma, int, S_IRUGO);
 159 MODULE_PARM_DESC(mcp251x_enable_dma, "Enable SPI DMA. Default: 0 (Off)");
 160
 161 static struct can_bittiming_const mcp251x_bittiming_const = {
 162         .tseg1_min = 3,
 163         .tseg1_max = 16,
 164         .tseg2_min = 2,
 165         .tseg2_max = 8,
 166         .sjw_max = 4,
 167         .brp_min = 1,
 168         .brp_max = 64,
 169         .brp_inc = 1,
 170 };
 171
 172 struct mcp251x_priv {
 173         struct can_priv    can;
 174         struct net_device *net;
 175         struct spi_device *spi;
 176
 177         struct mutex spi_lock; /* SPI buffer lock */
 178         u8 *spi_tx_buf;
 179         u8 *spi_rx_buf;
 180         dma_addr_t spi_tx_dma;
 181         dma_addr_t spi_rx_dma;
 182
 183         struct sk_buff *tx_skb;
 184         int tx_len;
 185         struct workqueue_struct *wq;
 186         struct work_struct tx_work;
 187         struct work_struct irq_work;
 188         struct completion awake;
 189         int wake;
 190         int force_quit;
 191         int after_suspend;
 192 #define AFTER_SUSPEND_UP 1
 193 #define AFTER_SUSPEND_DOWN 2
 194 #define AFTER_SUSPEND_POWER 4
 195         int restart_tx;
 196 };
 197
 198 static void mcp251x_clean(struct mcp251x_priv *priv)
 199 {
 200         if (priv->tx_skb)
 201                 dev_kfree_skb(priv->tx_skb);
 202         if (priv->tx_len)
 203                 can_free_echo_skb(priv->net, 0);
 204         priv->tx_skb = NULL;
 205         priv->tx_len = 0;
 206 }
 207
 208 /*
 209   Note about handling of error return of mcp251x_spi_trans: accessing
 210   registers via SPI is not really different conceptually than using
 211   normal I/O assembler instructions, although it's much more
 212   complicated from a practical POV. So it's not advisable to always
 213   check the return value of this function. Imagine that every
 214   read{b,l}, write{b,l} and friends would be bracketed in "if ( < 0)
 215   error();", it would be a great mess (well there are some situation
 216   when exception handling C++ like could be useful after all). So we
 217   just check that transfers are OK at the beginning of our
 218   conversation with the chip and to avoid doing really nasty things
 219   (like injecting bogus packets in the network stack).
 220  */
 221 static int mcp251x_spi_trans(struct spi_device *spi, int len)
 222 {
 223         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 224         struct spi_transfer t = {
 225                 .tx_buf = priv->spi_tx_buf,
 226                 .rx_buf = priv->spi_rx_buf,
 227                 .len = len,
 228                 .cs_change = 0,
 229         };
 230         struct spi_message m;
 231         int ret;
 232
 233         spi_message_init(&m);
 234
 235         if (mcp251x_enable_dma) {
 236                 t.tx_dma = priv->spi_tx_dma;
 237                 t.rx_dma = priv->spi_rx_dma;
 238                 m.is_dma_mapped = 1;
 239         }
 240
 241         spi_message_add_tail(&t, &m);
 242
 243         ret = spi_sync(spi, &m);
 244         if (ret < 0)
 245                 dev_err(&spi->dev, "%s: failed: ret = %d\n", __func__, ret);
 246         return ret;
 247 }
 248
 249 static u8 mcp251x_read_reg(struct spi_device *spi, uint8_t reg)
 250 {
 251         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 252         u8 val = 0;
 253
 254         mutex_lock(&priv->spi_lock);
 255
 256         priv->spi_tx_buf[0] = INSTRUCTION_READ;
 257         priv->spi_tx_buf[1] = reg;
 258
 259         mcp251x_spi_trans(spi, 3);
 260         val = priv->spi_rx_buf[2];
 261
 262         mutex_unlock(&priv->spi_lock);
 263
 264         return val;
 265 }
 266
 267 static void mcp251x_write_reg(struct spi_device *spi, u8 reg, uint8_t val)
 268 {
 269         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 270
 271         mutex_lock(&priv->spi_lock);
 272
 273         priv->spi_tx_buf[0] = INSTRUCTION_WRITE;
 274         priv->spi_tx_buf[1] = reg;
 275         priv->spi_tx_buf[2] = val;
 276
 277         mcp251x_spi_trans(spi, 3);
 278
 279         mutex_unlock(&priv->spi_lock);
 280 }
 281
 282 static void mcp251x_write_bits(struct spi_device *spi, u8 reg,
 283                                u8 mask, uint8_t val)
 284 {
 285         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 286
 287         mutex_lock(&priv->spi_lock);
 288
 289         priv->spi_tx_buf[0] = INSTRUCTION_BIT_MODIFY;
 290         priv->spi_tx_buf[1] = reg;
 291         priv->spi_tx_buf[2] = mask;
 292         priv->spi_tx_buf[3] = val;
 293
 294         mcp251x_spi_trans(spi, 4);
 295
 296         mutex_unlock(&priv->spi_lock);
 297 }
 298
 299 static void mcp251x_hw_tx(struct spi_device *spi, struct can_frame *frame,
 300                           int tx_buf_idx)
 301 {
 302         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 303         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 304         u32 sid, eid, exide, rtr;
 305
 306         exide = (frame->can_id & CAN_EFF_FLAG) ? 1 : 0; /* Extended ID Enable */
 307         if (exide)
 308                 sid = (frame->can_id & CAN_EFF_MASK) >> 18;
 309         else
 310                 sid = frame->can_id & CAN_SFF_MASK; /* Standard ID */
 311         eid = frame->can_id & CAN_EFF_MASK; /* Extended ID */
 312         rtr = (frame->can_id & CAN_RTR_FLAG) ? 1 : 0; /* Remote transmission */
 313
 314         if (pdata->model == CAN_MCP251X_MCP2510) {
 315                 int i;
 316
 317                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 1, sid >> 3);
 318                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 2,
 319                                   ((sid & 7) << 5) | (exide << 3) |
 320                                   ((eid >> 16) & 3));
 321                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 3,
 322                                   (eid >> 8) & 0xff);
 323                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 4, eid & 0xff);
 324                 mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 5,
 325                                   (rtr << 6) | frame->can_dlc);
 326
 327                 for (i = 0; i < frame->can_dlc ; i++) {
 328                         mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx) + 6 + i,
 329                                           frame->data[i]);
 330                 }
 331         } else {
 332                 u8 *tx_buf = priv->spi_tx_buf;
 333
 334                 mutex_lock(&priv->spi_lock);
 335
 336                 tx_buf[0] = INSTRUCTION_LOAD_TXB(tx_buf_idx);
 337                 tx_buf[1] = sid >> 3;
 338                 tx_buf[2] = ((sid & 7) << 5) | (exide << 3) |
 339                   ((eid >> 16) & 3);
 340                 tx_buf[3] = (eid >> 8) & 0xff;
 341                 tx_buf[4] = eid & 0xff;
 342                 tx_buf[5] = (rtr << 6) | frame->can_dlc;
 343
 344                 memcpy(tx_buf + 6, frame->data, frame->can_dlc);
 345
 346                 mcp251x_spi_trans(spi, 6 + CAN_FRAME_MAX_DATA_LEN);
 347
 348                 mutex_unlock(&priv->spi_lock);
 349         }
 350         mcp251x_write_reg(spi, TXBCTRL(tx_buf_idx), TXBCTRL_TXREQ);
 351 }
 352
 353 static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx)
 354 {
 355         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 356         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 357         struct sk_buff *skb;
 358         struct can_frame *frame;
 359
 360         skb = dev_alloc_skb(sizeof(struct can_frame));
 361         if (!skb) {
 362                 dev_err(&spi->dev, "%s: out of memory for Rx'd frame\n",
 363                         __func__);
 364                 priv->net->stats.rx_dropped++;
 365                 return;
 366         }
 367         skb->dev = priv->net;
 368         frame = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
 369
 370         if (pdata->model == CAN_MCP251X_MCP2510) {
 371                 int i;
 372                 u8 rx_buf[6];
 373
 374                 rx_buf[1] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 1);
 375                 rx_buf[2] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 2);
 376                 rx_buf[3] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 3);
 377                 rx_buf[4] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 4);
 378                 rx_buf[5] = mcp251x_read_reg(spi, RXBCTRL(buf_idx) + 5);
 379
 380                 if ((rx_buf[2] >> 3) & 0x1) {
 381                         /* Extended ID format */
 382                         frame->can_id = CAN_EFF_FLAG;
 383                         frame->can_id |= ((rx_buf[2] & 3) << 16) |
 384                           (rx_buf[3] << 8) | rx_buf[4] |
 385                           (((rx_buf[1] << 3) | (rx_buf[2] >> 5)) << 18);
 386                 } else {
 387                         /* Standard ID format */
 388                         frame->can_id = (rx_buf[1] << 3) | (rx_buf[2] >> 5);
 389                 }
 390
 391                 if ((rx_buf[5] >> 6) & 0x1) {
 392                         /* Remote transmission request */
 393                         frame->can_id |= CAN_RTR_FLAG;
 394                 }
 395
 396                 /* Data length */
 397                 frame->can_dlc = rx_buf[5] & 0x0f;
 398                 if (frame->can_dlc > 8) {
 399                         dev_warn(&spi->dev, "invalid frame recevied\n");
 400                         priv->net->stats.rx_errors++;
 401                         dev_kfree_skb(skb);
 402                         return;
 403                 }
 404
 405                 for (i = 0; i < frame->can_dlc; i++) {
 406                         frame->data[i] = mcp251x_read_reg(spi,
 407                                                           RXBCTRL(buf_idx) +
 408                                                           6 + i);
 409                 }
 410         } else {
 411                 u8 *tx_buf = priv->spi_tx_buf;
 412                 u8 *rx_buf = priv->spi_rx_buf;
 413                 int ret;
 414
 415                 mutex_lock(&priv->spi_lock);
 416
 417                 tx_buf[0] = INSTRUCTION_READ_RXB(buf_idx);
 418
 419                 ret = mcp251x_spi_trans(spi, 14);
 420                 if (ret < 0) {
 421                         priv->net->stats.rx_errors++;
 422                         mutex_unlock(&priv->spi_lock);
 423                         return;
 424                 }
 425
 426                 if ((rx_buf[2] >> 3) & 0x1) {
 427                         /* Extended ID format */
 428                         frame->can_id = CAN_EFF_FLAG;
 429                         frame->can_id |= ((rx_buf[2] & 3) << 16) |
 430                           (rx_buf[3] << 8) | rx_buf[4] |
 431                           (((rx_buf[1] << 3) | (rx_buf[2] >> 5)) << 18);
 432                 } else {
 433                         /* Standard ID format */
 434                         frame->can_id = (rx_buf[1] << 3) | (rx_buf[2] >> 5);
 435                 }
 436
 437                 if ((rx_buf[5] >> 6) & 0x1) {
 438                         /* Remote transmission request */
 439                         frame->can_id |= CAN_RTR_FLAG;
 440                 }
 441
 442                 /* Data length */
 443                 frame->can_dlc = rx_buf[5] & 0x0f;
 444                 if (frame->can_dlc > 8) {
 445                         dev_warn(&spi->dev, "invalid frame recevied\n");
 446                         priv->net->stats.rx_errors++;
 447                         dev_kfree_skb(skb);
 448                         mutex_unlock(&priv->spi_lock);
 449                         return;
 450                 }
 451
 452                 memcpy(frame->data, rx_buf + 6, CAN_FRAME_MAX_DATA_LEN);
 453
 454                 mutex_unlock(&priv->spi_lock);
 455         }
 456
 457         priv->net->stats.rx_packets++;
 458         priv->net->stats.rx_bytes += frame->can_dlc;
 459
 460         skb->protocol = __constant_htons(ETH_P_CAN);
 461         skb->pkt_type = PACKET_BROADCAST;
 462         skb->ip_summed = CHECKSUM_UNNECESSARY;
 463         netif_rx(skb);
 464 }
 465
 466 static void mcp251x_hw_sleep(struct spi_device *spi)
 467 {
 468         mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_SLEEP);
 469 }
 470
 471 static void mcp251x_hw_wakeup(struct spi_device *spi)
 472 {
 473         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 474
 475         priv->wake = 1;
 476
 477         /* Can only wake up by generating a wake-up interrupt. */
 478         mcp251x_write_bits(spi, CANINTE, CANINTE_WAKIE, CANINTE_WAKIE);
 479         mcp251x_write_bits(spi, CANINTF, CANINTF_WAKIF, CANINTF_WAKIF);
 480
 481         /* Wait until the device is awake */
 482         if (!wait_for_completion_timeout(&priv->awake, HZ))
 483                 dev_err(&spi->dev, "MCP251x didn't wake-up\n");
 484 }
 485
 486 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)
 487 static int mcp251x_hard_start_xmit(struct sk_buff *skb, struct net_device *net)
 488 #else
 489 static netdev_tx_t mcp251x_hard_start_xmit(struct sk_buff *skb,
 490                         struct net_device *net)
 491 #endif
 492 {
 493         struct mcp251x_priv *priv = netdev_priv(net);
 494         struct spi_device *spi = priv->spi;
 495
 496         if (priv->tx_skb || priv->tx_len) {
 497                 dev_warn(&spi->dev, "hard_xmit called while tx busy\n");
 498                 netif_stop_queue(net);
 499                 return NETDEV_TX_BUSY;
 500         }
 501
 502         if (skb->len != sizeof(struct can_frame)) {
 503                 dev_err(&spi->dev, "dropping packet - bad length\n");
 504                 dev_kfree_skb(skb);
 505                 net->stats.tx_dropped++;
 506                 return 0;
 507         }
 508
 509         netif_stop_queue(net);
 510         priv->tx_skb = skb;
 511         net->trans_start = jiffies;
 512         queue_work(priv->wq, &priv->tx_work);
 513
 514         return NETDEV_TX_OK;
 515 }
 516
 517 static int mcp251x_do_set_mode(struct net_device *net, enum can_mode mode)
 518 {
 519         struct mcp251x_priv *priv = netdev_priv(net);
 520
 521         switch (mode) {
 522         case CAN_MODE_START:
 523                 /* we have to delay work since SPI I/O may sleep */
 524                 priv->restart_tx = 1;
 525                 queue_work(priv->wq, &priv->irq_work);
 526                 break;
 527         default:
 528                 return -EOPNOTSUPP;
 529         }
 530
 531         return 0;
 532 }
 533
 534 static void mcp251x_set_normal_mode(struct spi_device *spi)
 535 {
 536         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 537         unsigned long timeout;
 538
 539         /* Enable interrupts */
 540         mcp251x_write_reg(spi, CANINTE,
 541                 CANINTE_ERRIE | CANINTE_TX2IE | CANINTE_TX1IE |
 542                 CANINTE_TX0IE | CANINTE_RX1IE | CANINTE_RX0IE);
 543
 544         if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
 545                 /* Put device into loopback mode */
 546                 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_LOOPBACK);
 547         } else {
 548                 /* Put device into normal mode */
 549                 mcp251x_write_reg(spi, CANCTRL, CANCTRL_REQOP_NORMAL);
 550
 551                 /* Wait for the device to enter normal mode */
 552                 timeout = jiffies + HZ;
 553                 while (mcp251x_read_reg(spi, CANSTAT) & 0xE0) {
 554                         schedule();
 555                         if (time_after(jiffies, timeout)) {
 556                                 dev_err(&spi->dev, "MCP251x didn't"
 557                                         " enter in normal mode\n");
 558                                 return;
 559                         }
 560                 }
 561         }
 562         priv->can.state = CAN_STATE_ERROR_ACTIVE;
 563 }
 564
 565 static int mcp251x_do_set_bittiming(struct net_device *net)
 566 {
 567         struct mcp251x_priv *priv = netdev_priv(net);
 568         struct can_bittiming *bt = &priv->can.bittiming;
 569         struct spi_device *spi = priv->spi;
 570         u8 state;
 571
 572         dev_dbg(&spi->dev, "%s: BRP = %d, PropSeg = %d, PS1 = %d,"
 573                 " PS2 = %d, SJW = %d\n", __func__, bt->brp,
 574                 bt->prop_seg, bt->phase_seg1, bt->phase_seg2,
 575                 bt->sjw);
 576
 577         /* Store original mode and set mode to config */
 578         state = mcp251x_read_reg(spi, CANCTRL);
 579         state = mcp251x_read_reg(spi, CANSTAT) & CANCTRL_REQOP_MASK;
 580         mcp251x_write_bits(spi, CANCTRL, CANCTRL_REQOP_MASK,
 581                            CANCTRL_REQOP_CONF);
 582
 583         mcp251x_write_reg(spi, CNF1, ((bt->sjw - 1) << 6) | (bt->brp - 1));
 584         mcp251x_write_reg(spi, CNF2, CNF2_BTLMODE |
 585                           ((bt->phase_seg1 - 1) << 3) |
 586                           (bt->prop_seg - 1));
 587         mcp251x_write_bits(spi, CNF3, CNF3_PHSEG2_MASK,
 588                            (bt->phase_seg2 - 1));
 589
 590         /* Restore original state */
 591         mcp251x_write_bits(spi, CANCTRL, CANCTRL_REQOP_MASK, state);
 592
 593         return 0;
 594 }
 595
 596 static int mcp251x_setup(struct net_device *net, struct mcp251x_priv *priv,
 597                           struct spi_device *spi)
 598 {
 599         int ret;
 600
 601         /* Set initial baudrate. Make sure that registers are updated
 602            always by explicitly calling mcp251x_do_set_bittiming */
 603         ret = open_candev(net);
 604         if (ret) {
 605                 dev_err(&spi->dev, "unable to set initial baudrate!\n");
 606                 return ret;
 607         }
 608
 609         /* Enable RX0->RX1 buffer roll over and disable filters */
 610         mcp251x_write_bits(spi, RXBCTRL(0),
 611                            RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1,
 612                            RXBCTRL_BUKT | RXBCTRL_RXM0 | RXBCTRL_RXM1);
 613         mcp251x_write_bits(spi, RXBCTRL(1),
 614                            RXBCTRL_RXM0 | RXBCTRL_RXM1,
 615                            RXBCTRL_RXM0 | RXBCTRL_RXM1);
 616         return 0;
 617 }
 618
 619 static void mcp251x_hw_reset(struct spi_device *spi)
 620 {
 621         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
 622         int ret;
 623
 624         mutex_lock(&priv->spi_lock);
 625
 626         priv->spi_tx_buf[0] = INSTRUCTION_RESET;
 627
 628         ret = spi_write(spi, priv->spi_tx_buf, 1);
 629
 630         mutex_unlock(&priv->spi_lock);
 631
 632         if (ret < 0)
 633                 dev_err(&spi->dev, "%s: failed: ret = %d\n", __func__, ret);
 634         /* wait for reset to finish */
 635         mdelay(10);
 636 }
 637
 638 static int mcp251x_hw_probe(struct spi_device *spi)
 639 {
 640         int st1, st2;
 641
 642         mcp251x_hw_reset(spi);
 643
 644         st1 = mcp251x_read_reg(spi, CANSTAT) & 0xEE;
 645         st2 = mcp251x_read_reg(spi, CANCTRL) & 0x17;
 646
 647         dev_dbg(&spi->dev, "%s: 0x%02x - 0x%02x\n", __func__,
 648                 st1, st2);
 649
 650         /* check for power up default values */
 651         return (st1 == 0x80 && st2 == 0x07) ? 1 : 0;
 652 }
 653
 654 static int mcp251x_open(struct net_device *net)
 655 {
 656         struct mcp251x_priv *priv = netdev_priv(net);
 657         struct spi_device *spi = priv->spi;
 658         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 659         int ret;
 660
 661         if (pdata->transceiver_enable)
 662                 pdata->transceiver_enable(1);
 663
 664         priv->force_quit = 0;
 665         priv->tx_skb = NULL;
 666         priv->tx_len = 0;
 667         enable_irq(spi->irq);
 668         mcp251x_hw_wakeup(spi);
 669         mcp251x_hw_reset(spi);
 670         ret = mcp251x_setup(net, priv, spi);
 671         if (ret < 0) {
 672                 disable_irq(spi->irq);
 673                 return ret;
 674         }
 675         mcp251x_set_normal_mode(spi);
 676         netif_wake_queue(net);
 677
 678         return 0;
 679 }
 680
 681 static int mcp251x_stop(struct net_device *net)
 682 {
 683         struct mcp251x_priv *priv = netdev_priv(net);
 684         struct spi_device *spi = priv->spi;
 685         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 686
 687         /* Disable and clear pending interrupts */
 688         mcp251x_write_reg(spi, CANINTE, 0x00);
 689         mcp251x_write_reg(spi, CANINTF, 0x00);
 690
 691         priv->force_quit = 1;
 692         disable_irq(spi->irq);
 693         flush_workqueue(priv->wq);
 694
 695         mcp251x_write_reg(spi, TXBCTRL(0), 0);
 696         if (priv->tx_skb || priv->tx_len) {
 697                 net->stats.tx_errors++;
 698                 mcp251x_clean(priv);
 699         }
 700
 701         mcp251x_hw_sleep(spi);
 702
 703         if (pdata->transceiver_enable)
 704                 pdata->transceiver_enable(0);
 705
 706         priv->can.state = CAN_STATE_STOPPED;
 707         close_candev(net);
 708
 709         return 0;
 710 }
 711
 712 static void mcp251x_tx_work_handler(struct work_struct *ws)
 713 {
 714         struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
 715                                                  tx_work);
 716         struct spi_device *spi = priv->spi;
 717         struct net_device *net = priv->net;
 718         struct can_frame *frame;
 719
 720         WARN_ON(!priv->tx_skb);
 721         WARN_ON(priv->tx_len);
 722         if (priv->tx_skb) {
 723                 frame = (struct can_frame *)priv->tx_skb->data;
 724                 if (frame->can_dlc > CAN_FRAME_MAX_DATA_LEN)
 725                         frame->can_dlc = CAN_FRAME_MAX_DATA_LEN;
 726                 mcp251x_hw_tx(spi, frame, 0);
 727                 priv->tx_len = 1 + frame->can_dlc;
 728                 can_put_echo_skb(priv->tx_skb, net, 0);
 729                 priv->tx_skb = NULL;
 730         }
 731 }
 732
 733 static void mcp251x_irq_work_handler(struct work_struct *ws)
 734 {
 735         struct mcp251x_priv *priv = container_of(ws, struct mcp251x_priv,
 736                                                  irq_work);
 737         struct spi_device *spi = priv->spi;
 738         struct net_device *net = priv->net;
 739         u8 intf;
 740         u8 txbnctrl;
 741         enum can_state new_state;
 742
 743         if (priv->after_suspend) {
 744                 /* Wait whilst the device wakes up WARN_ON */
 745                 mdelay(10);
 746                 mcp251x_hw_reset(spi);
 747                 mcp251x_setup(net, priv, spi);
 748                 if (priv->after_suspend & AFTER_SUSPEND_UP) {
 749                         netif_device_attach(net);
 750                         /* clear since we lost tx buffer */
 751                         if (priv->tx_skb || priv->tx_len) {
 752                                 net->stats.tx_errors++;
 753                                 mcp251x_clean(priv);
 754                                 netif_wake_queue(net);
 755                         }
 756                         mcp251x_set_normal_mode(spi);
 757                 } else
 758                         mcp251x_hw_sleep(spi);
 759                 priv->after_suspend = 0;
 760                 return;
 761         }
 762
 763         while (!priv->force_quit && !freezing(current)) {
 764                 if (priv->restart_tx) {
 765                         priv->restart_tx = 0;
 766                         dev_dbg(&spi->dev,
 767                                 "timeout in txing a packet, restarting\n");
 768                         mcp251x_write_reg(spi, TXBCTRL(0), 0);
 769                         if (priv->tx_skb || priv->tx_len) {
 770                                 net->stats.tx_errors++;
 771                                 mcp251x_clean(priv);
 772                         }
 773                         priv->can.can_stats.restarts++;
 774                         netif_wake_queue(net);
 775                 }
 776
 777                 if (priv->wake) {
 778                         /* Wait whilst the device wakes up */
 779                         mdelay(10);
 780                         priv->wake = 0;
 781                 }
 782
 783                 intf = mcp251x_read_reg(spi, CANINTF);
 784                 if (intf == 0x00)
 785                         break;
 786                 mcp251x_write_bits(spi, CANINTF, intf, 0x00);
 787
 788                 if (intf & CANINTF_WAKIF)
 789                         complete(&priv->awake);
 790
 791                 if (intf & CANINTF_MERRF) {
 792                         /* if there are pending Tx buffers, restart queue */
 793                         txbnctrl = mcp251x_read_reg(spi, TXBCTRL(0));
 794                         if (!(txbnctrl & TXBCTRL_TXREQ)) {
 795                                 WARN_ON(priv->tx_skb);
 796                                 WARN_ON(!priv->tx_len);
 797                                 if (priv->tx_skb || priv->tx_len) {
 798                                         net->stats.tx_errors++;
 799                                         mcp251x_clean(priv);
 800                                 }
 801                                 netif_wake_queue(net);
 802                         }
 803                 }
 804
 805                 if (intf & CANINTF_ERRIF) {
 806                         struct sk_buff *skb;
 807                         struct can_frame *frame = NULL;
 808                         u8 eflag = mcp251x_read_reg(spi, EFLG);
 809
 810                         /* create error frame */
 811                         skb = dev_alloc_skb(sizeof(struct can_frame));
 812                         if (skb) {
 813                                 frame = (struct can_frame *)
 814                                         skb_put(skb, sizeof(struct can_frame));
 815                                 *(unsigned long long *)&frame->data = 0ULL;
 816                                 frame->can_id = CAN_ERR_FLAG;
 817                                 frame->can_dlc = CAN_ERR_DLC;
 818
 819                                 skb->dev = net;
 820                                 skb->protocol = __constant_htons(ETH_P_CAN);
 821                                 skb->pkt_type = PACKET_BROADCAST;
 822                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
 823
 824                                 /* Set error frame flags based on bus state */
 825                                 if (eflag & EFLG_TXBO) {
 826                                         frame->can_id |= CAN_ERR_BUSOFF;
 827                                 } else if (eflag & EFLG_TXEP) {
 828                                         frame->can_id |= CAN_ERR_CRTL;
 829                                         frame->data[1] |=
 830                                           CAN_ERR_CRTL_TX_PASSIVE;
 831                                 } else if (eflag & EFLG_RXEP) {
 832                                         frame->can_id |= CAN_ERR_CRTL;
 833                                         frame->data[1] |=
 834                                           CAN_ERR_CRTL_RX_PASSIVE;
 835                                 } else if (eflag & EFLG_TXWAR) {
 836                                         frame->can_id |= CAN_ERR_CRTL;
 837                                         frame->data[1] |=
 838                                           CAN_ERR_CRTL_TX_WARNING;
 839                                 } else if (eflag & EFLG_RXWAR) {
 840                                         frame->can_id |= CAN_ERR_CRTL;
 841                                         frame->data[1] |=
 842                                           CAN_ERR_CRTL_RX_WARNING;
 843                                 }
 844                         }
 845
 846                         /* update net stats */
 847                         if (eflag & (EFLG_RX0OVR | EFLG_RX1OVR)) {
 848                                 if (eflag & EFLG_RX0OVR)
 849                                         net->stats.rx_over_errors++;
 850                                 if (eflag & EFLG_RX1OVR)
 851                                         net->stats.rx_over_errors++;
 852                                 if (frame) {
 853                                         frame->can_id |= CAN_ERR_CRTL;
 854                                         frame->data[1] =
 855                                           CAN_ERR_CRTL_RX_OVERFLOW;
 856                                 }
 857                         }
 858
 859                         /* update can state */
 860                         if (eflag & EFLG_TXBO) {
 861                                 new_state = CAN_STATE_BUS_OFF;
 862                                 can_bus_off(net);
 863                         } else if (eflag & EFLG_TXEP)
 864                                 new_state = CAN_STATE_ERROR_PASSIVE;
 865                         else if (eflag & EFLG_RXEP)
 866                                 new_state = CAN_STATE_ERROR_PASSIVE;
 867                         else if (eflag & EFLG_TXWAR)
 868                                 new_state = CAN_STATE_ERROR_WARNING;
 869                         else if (eflag & EFLG_RXWAR)
 870                                 new_state = CAN_STATE_ERROR_WARNING;
 871                         else
 872                                 new_state = CAN_STATE_ERROR_ACTIVE;
 873
 874                         mcp251x_write_reg(spi, EFLG, 0x00);
 875
 876                         if (skb)
 877                                 netif_rx(skb);
 878                 } else
 879                         new_state = CAN_STATE_ERROR_ACTIVE;
 880
 881                 /* update can state statistics */
 882                 switch (priv->can.state) {
 883                 case CAN_STATE_ERROR_ACTIVE:
 884                         if (new_state >= CAN_STATE_ERROR_WARNING &&
 885                             new_state <= CAN_STATE_BUS_OFF)
 886                                 priv->can.can_stats.error_warning++;
 887                 case CAN_STATE_ERROR_WARNING:   /* fallthrough */
 888                         if (new_state >= CAN_STATE_ERROR_PASSIVE &&
 889                             new_state <= CAN_STATE_BUS_OFF)
 890                                 priv->can.can_stats.error_passive++;
 891                         break;
 892                 case CAN_STATE_BUS_OFF:
 893                         if (new_state <= CAN_STATE_ERROR_PASSIVE)
 894                                 netif_carrier_on(net);
 895                         break;
 896                 default:
 897                         break;
 898                 }
 899                 priv->can.state = new_state;
 900
 901                 if (intf & (CANINTF_TX2IF | CANINTF_TX1IF | CANINTF_TX0IF)) {
 902                         net->stats.tx_packets++;
 903                         net->stats.tx_bytes += priv->tx_len - 1;
 904                         WARN_ON(priv->tx_skb);
 905                         WARN_ON(!priv->tx_len);
 906                         if (priv->tx_len) {
 907                                 can_get_echo_skb(net, 0);
 908                                 priv->tx_len = 0;
 909                         }
 910                         mcp251x_clean(priv);
 911                         netif_wake_queue(net);
 912                 }
 913
 914                 if (intf & CANINTF_RX0IF)
 915                         mcp251x_hw_rx(spi, 0);
 916
 917                 if (intf & CANINTF_RX1IF)
 918                         mcp251x_hw_rx(spi, 1);
 919
 920         }
 921
 922         mcp251x_read_reg(spi, CANSTAT);
 923 }
 924
 925 static irqreturn_t mcp251x_can_isr(int irq, void *dev_id)
 926 {
 927         struct net_device *net = (struct net_device *)dev_id;
 928         struct mcp251x_priv *priv = netdev_priv(net);
 929
 930         /* Schedule bottom half */
 931         if (!work_pending(&priv->irq_work))
 932                 queue_work(priv->wq, &priv->irq_work);
 933
 934         return IRQ_HANDLED;
 935 }
 936
 937 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28)
 938 static const struct net_device_ops mcp251x_netdev_ops = {
 939         .ndo_open       = mcp251x_open,
 940         .ndo_stop       = mcp251x_stop,
 941         .ndo_start_xmit = mcp251x_hard_start_xmit,
 942 };
 943 #endif
 944
 945 static struct net_device *alloc_mcp251x_netdev(int sizeof_priv,
 946                                 struct mcp251x_platform_data *pdata)
 947 {
 948         struct net_device *net;
 949         struct mcp251x_priv *priv;
 950
 951         net = alloc_candev(sizeof_priv, TX_ECHO_SKB_MAX);
 952         if (!net)
 953                 return NULL;
 954
 955         priv = netdev_priv(net);
 956
 957 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28)
 958         net->netdev_ops         = &mcp251x_netdev_ops;
 959 #else
 960         net->open               = mcp251x_open;
 961         net->stop               = mcp251x_stop;
 962         net->hard_start_xmit    = mcp251x_hard_start_xmit;
 963 #endif
 964         net->flags              |= IFF_ECHO;
 965
 966         priv->can.bittiming_const = &mcp251x_bittiming_const;
 967         priv->can.do_set_mode     = mcp251x_do_set_mode;
 968         priv->can.clock.freq      = pdata->oscillator_frequency / 2;
 969         priv->can.do_set_bittiming      = mcp251x_do_set_bittiming;
 970
 971         priv->net = net;
 972
 973         return net;
 974 }
 975
 976 static int __devinit mcp251x_can_probe(struct spi_device *spi)
 977 {
 978         struct net_device *net;
 979         struct mcp251x_priv *priv;
 980         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
 981         int ret = -ENODEV;
 982
 983         if (!pdata) {
 984                 /* Platform data is required for osc freq */
 985                 goto error_out;
 986         }
 987
 988         /* Allocate can/net device */
 989         net = alloc_mcp251x_netdev(sizeof(struct mcp251x_priv), pdata);
 990         if (!net) {
 991                 ret = -ENOMEM;
 992                 goto error_alloc;
 993         }
 994
 995         priv = netdev_priv(net);
 996         dev_set_drvdata(&spi->dev, priv);
 997
 998         priv->spi = spi;
 999         mutex_init(&priv->spi_lock);
1000
1001         /* If requested, allocate DMA buffers */
1002         if (mcp251x_enable_dma) {
1003                 spi->dev.coherent_dma_mask = DMA_32BIT_MASK;
1004
1005                 /* Minimum coherent DMA allocation is PAGE_SIZE, so allocate
1006                    that much and share it between Tx and Rx DMA buffers. */
1007                 priv->spi_tx_buf = dma_alloc_coherent(&spi->dev,
1008                         PAGE_SIZE, &priv->spi_tx_dma, GFP_DMA);
1009
1010                 if (priv->spi_tx_buf) {
1011                         priv->spi_rx_buf = (u8 *)(priv->spi_tx_buf +
1012                                 (PAGE_SIZE / 2));
1013                         priv->spi_rx_dma = (dma_addr_t)(priv->spi_tx_dma +
1014                                 (PAGE_SIZE / 2));
1015                 } else {
1016                         /* Fall back to non-DMA */
1017                         mcp251x_enable_dma = 0;
1018                 }
1019         }
1020
1021         /* Allocate non-DMA buffers */
1022         if (!mcp251x_enable_dma) {
1023                 priv->spi_tx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1024                 if (!priv->spi_tx_buf) {
1025                         ret = -ENOMEM;
1026                         goto error_tx_buf;
1027                 }
1028                 priv->spi_rx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
1029                 if (!priv->spi_tx_buf) {
1030                         ret = -ENOMEM;
1031                         goto error_rx_buf;
1032                 }
1033         }
1034
1035         if (pdata->power_enable)
1036                 pdata->power_enable(1);
1037
1038         /* Call out to platform specific setup */
1039         if (pdata->board_specific_setup)
1040                 pdata->board_specific_setup(spi);
1041
1042         SET_NETDEV_DEV(net, &spi->dev);
1043
1044         priv->wq = create_freezeable_workqueue("mcp251x_wq");
1045
1046         INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
1047         INIT_WORK(&priv->irq_work, mcp251x_irq_work_handler);
1048
1049         init_completion(&priv->awake);
1050
1051         /* Configure the SPI bus */
1052         spi->mode = SPI_MODE_0;
1053         spi->bits_per_word = 8;
1054         spi_setup(spi);
1055
1056         /* Register IRQ */
1057         if (request_irq(spi->irq, mcp251x_can_isr,
1058                         IRQF_TRIGGER_FALLING, DEVICE_NAME, net) < 0) {
1059                 dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
1060                 goto error_irq;
1061         }
1062         disable_irq(spi->irq);
1063
1064         if (!mcp251x_hw_probe(spi)) {
1065                 dev_info(&spi->dev, "Probe failed\n");
1066                 goto error_probe;
1067         }
1068         mcp251x_hw_sleep(spi);
1069
1070         if (pdata->transceiver_enable)
1071                 pdata->transceiver_enable(0);
1072
1073         ret = register_candev(net);
1074         if (ret >= 0) {
1075                 dev_info(&spi->dev, "probed\n");
1076                 return ret;
1077         }
1078 error_probe:
1079         free_irq(spi->irq, net);
1080 error_irq:
1081         if (!mcp251x_enable_dma)
1082                 kfree(priv->spi_rx_buf);
1083 error_rx_buf:
1084         if (!mcp251x_enable_dma)
1085                 kfree(priv->spi_tx_buf);
1086 error_tx_buf:
1087         free_candev(net);
1088         if (mcp251x_enable_dma) {
1089                 dma_free_coherent(&spi->dev, PAGE_SIZE,
1090                         priv->spi_tx_buf, priv->spi_tx_dma);
1091         }
1092 error_alloc:
1093         dev_err(&spi->dev, "probe failed\n");
1094 error_out:
1095         return ret;
1096 }
1097
1098 static int __devexit mcp251x_can_remove(struct spi_device *spi)
1099 {
1100         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1101         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1102         struct net_device *net = priv->net;
1103
1104         unregister_candev(net);
1105         free_candev(net);
1106
1107         free_irq(spi->irq, net);
1108         priv->force_quit = 1;
1109         flush_workqueue(priv->wq);
1110         destroy_workqueue(priv->wq);
1111
1112         if (mcp251x_enable_dma) {
1113                 dma_free_coherent(&spi->dev, PAGE_SIZE,
1114                         priv->spi_tx_buf, priv->spi_tx_dma);
1115         } else {
1116                 kfree(priv->spi_tx_buf);
1117                 kfree(priv->spi_rx_buf);
1118         }
1119
1120         if (pdata->power_enable)
1121                 pdata->power_enable(0);
1122
1123         return 0;
1124 }
1125
1126 #ifdef CONFIG_PM
1127 static int mcp251x_can_suspend(struct spi_device *spi, pm_message_t state)
1128 {
1129         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1130         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1131         struct net_device *net = priv->net;
1132
1133         if (netif_running(net)) {
1134                 netif_device_detach(net);
1135
1136                 mcp251x_hw_sleep(spi);
1137                 if (pdata->transceiver_enable)
1138                         pdata->transceiver_enable(0);
1139                 priv->after_suspend = AFTER_SUSPEND_UP;
1140         } else
1141                 priv->after_suspend = AFTER_SUSPEND_DOWN;
1142
1143         if (pdata->power_enable) {
1144                 pdata->power_enable(0);
1145                 priv->after_suspend |= AFTER_SUSPEND_POWER;
1146         }
1147
1148         return 0;
1149 }
1150
1151 static int mcp251x_can_resume(struct spi_device *spi)
1152 {
1153         struct mcp251x_platform_data *pdata = spi->dev.platform_data;
1154         struct mcp251x_priv *priv = dev_get_drvdata(&spi->dev);
1155
1156         if (priv->after_suspend & AFTER_SUSPEND_POWER) {
1157                 pdata->power_enable(1);
1158                 queue_work(priv->wq, &priv->irq_work);
1159         } else {
1160                 if (priv->after_suspend & AFTER_SUSPEND_UP) {
1161                         if (pdata->transceiver_enable)
1162                                 pdata->transceiver_enable(1);
1163                         queue_work(priv->wq, &priv->irq_work);
1164                 } else
1165                         priv->after_suspend = 0;
1166         }
1167         return 0;
1168 }
1169 #else
1170 #define mcp251x_can_suspend NULL
1171 #define mcp251x_can_resume NULL
1172 #endif
1173
1174 static struct spi_driver mcp251x_can_driver = {
1175         .driver = {
1176                 .name           = DEVICE_NAME,
1177                 .bus            = &spi_bus_type,
1178                 .owner          = THIS_MODULE,
1179         },
1180
1181         .probe          = mcp251x_can_probe,
1182         .remove         = __devexit_p(mcp251x_can_remove),
1183         .suspend        = mcp251x_can_suspend,
1184         .resume         = mcp251x_can_resume,
1185 };
1186
1187 static int __init mcp251x_can_init(void)
1188 {
1189         return spi_register_driver(&mcp251x_can_driver);
1190 }
1191
1192 static void __exit mcp251x_can_exit(void)
1193 {
1194         spi_unregister_driver(&mcp251x_can_driver);
1195 }
1196
1197 module_init(mcp251x_can_init);
1198 module_exit(mcp251x_can_exit);
1199
1200 MODULE_AUTHOR("Chris Elston <celston@katalix.com>, "
1201               "Christian Pellegrin <chripell@evolware.org>");
1202 MODULE_DESCRIPTION("Microchip 251x CAN driver");
1203 MODULE_LICENSE("GPL v2");