2 * @brief SCI Driver Definition File
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8 /* (c) Texas Instruments 2009-2012, All rights reserved. */
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14 #include "sys_common.h"
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18 /** @enum sciIntFlags
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19 * @brief Interrupt Flag Definitions
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21 * Used with sciEnableNotification, sciDisableNotification
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25 SCI_FE_INT = 0x04000000, /* framming error */
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26 SCI_OE_INT = 0x02000000, /* overrun error */
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27 SCI_PE_INT = 0x01000000, /* parity error */
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28 SCI_RX_INT = 0x00000200, /* receive buffer ready */
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29 SCI_TX_INT = 0x00000100, /* transmit buffer ready */
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30 SCI_WAKE_INT = 0x00000002, /* wakeup */
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31 SCI_BREAK_INT = 0x00000001 /* break detect */
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36 * @brief SCI Register Definition
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38 * This structure is used to access the SCI module egisters.
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40 /** @typedef sciBASE_t
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41 * @brief SCI Register Frame Type Definition
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43 * This type is used to access the SCI Registers.
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53 * @brief SCI Base Register Definition
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55 * This structure is used to access the SCI module egisters.
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57 /** @typedef sciBASE_t
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58 * @brief SCI Register Frame Type Definition
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60 * This type is used to access the SCI Registers.
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62 typedef volatile struct sciBase
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64 uint32_t GCR0; /**< 0x0000 Global Control Register 0 */
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65 uint32_t GCR1; /**< 0x0004 Global Control Register 1 */
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66 uint32_t GCR2; /**< 0x0008 Global Control Register 2 */
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67 uint32_t SETINT; /**< 0x000C Set Interrupt Enable Register */
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68 uint32_t CLRINT; /**< 0x0010 Clear Interrupt Enable Register */
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69 uint32_t SETINTLVL; /**< 0x0014 Set Interrupt Level Register */
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70 uint32_t CLRINTLVL; /**< 0x0018 Set Interrupt Level Register */
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71 uint32_t FLR; /**< 0x001C Interrupt Flag Register */
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72 uint32_t INTVECT0; /**< 0x0020 Interrupt Vector Offset 0 */
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73 uint32_t INTVECT1; /**< 0x0024 Interrupt Vector Offset 1 */
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74 uint32_t LENGTH; /**< 0x0028 Format Control Register */
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75 uint32_t BAUD; /**< 0x002C Baud Rate Selection Register */
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76 #if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
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77 uint8_t ED; /**< 0x0033 Emulation Register */
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79 uint8_t RD; /**< 0x0037 Receive Data Buffer */
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81 uint8_t TD; /**< 0x003B Transmit Data Buffer */
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85 uint8_t ED; /**< 0x0033 Emulation Register */
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87 uint8_t RD; /**< 0x0037 Receive Data Buffer */
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89 uint8_t TD; /**< 0x003B Transmit Data Buffer */
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91 uint32_t FUN; /**< 0x003C Pin Function Register */
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92 uint32_t DIR; /**< 0x0040 Pin Direction Register */
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93 uint32_t DIN; /**< 0x0044 Pin Data In Register */
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94 uint32_t DOUT; /**< 0x0048 Pin Data Out Register */
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95 uint32_t SET; /**< 0x004C Pin Data Set Register */
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96 uint32_t CLR; /**< 0x0050 Pin Data Clr Register */
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97 uint32_t ODR; /**< 0x0054: Pin Open Drain Output Enable Register */
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98 uint32_t PD; /**< 0x0058: Pin Pullup/Pulldown Disable Register */
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99 uint32_t PSL; /**< 0x005C: Pin Pullup/Pulldown Selection Register */
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100 uint32_t : 32U; /**< 0x060: Reserved */
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101 uint32_t : 32U; /**< 0x064: Reserved */
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102 uint32_t : 32U; /**< 0x068: Reserved */
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103 uint32_t : 32U; /**< 0x06C: Reserved */
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104 uint32_t : 32U; /**< 0x070: Reserved */
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105 uint32_t : 32U; /**< 0x074: Reserved */
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106 uint32_t : 32U; /**< 0x078: Reserved */
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107 uint32_t : 32U; /**< 0x07C: Reserved */
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108 uint32_t : 32U; /**< 0x080: Reserved */
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109 uint32_t : 32U; /**< 0x084: Reserved */
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110 uint32_t : 32U; /**< 0x088: Reserved */
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111 uint32_t : 32U; /**< 0x08C: Reserved */
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112 uint32_t IODFTCTRL; /**< 0x0090: I/O Error Enable Register */
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117 * @brief Register Frame Pointer
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119 * This pointer is used by the SCI driver to access the sci module registers.
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121 #define sciREG ((sciBASE_t *)0xFFF7E500U)
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125 * @brief SCI GIO Port Register Pointer
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127 * Pointer used by the GIO driver to access I/O PORT of SCI
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128 * (use the GIO drivers to access the port pins).
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130 #define sciPORT ((gioPORT_t *)0xFFF7E540U)
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134 * @brief SCILIN (LIN - Compatibility Mode) Register Frame Pointer
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136 * This pointer is used by the SCI driver to access the sci module registers.
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138 #define scilinREG ((sciBASE_t *)0xFFF7E400U)
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141 /** @def scilinPORT
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142 * @brief SCILIN (LIN - Compatibility Mode) Register Frame Pointer
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144 * Pointer used by the GIO driver to access I/O PORT of LIN
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145 * (use the GIO drivers to access the port pins).
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147 #define scilinPORT ((gioPORT_t *)0xFFF7E440U)
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150 /* SCI Interface Functions */
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151 void sciInit(void);
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152 void sciSetFunctional(sciBASE_t *sci, uint32_t port);
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153 void sciSetBaudrate(sciBASE_t *sci, uint32_t baud);
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154 int sciIsTxReady(sciBASE_t *sci);
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155 void sciSendByte(sciBASE_t *sci, uint8_t byte);
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156 void sciSend(sciBASE_t *sci, uint32_t length, uint8_t *data);
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157 int sciIsRxReady(sciBASE_t *sci);
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158 int sciRxError(sciBASE_t *sci);
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159 int sciReceiveByte(sciBASE_t *sci);
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160 void sciReceive(sciBASE_t *sci, uint32_t length, uint8_t *data);
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161 void sciEnableNotification(sciBASE_t *sci, uint32_t flags);
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162 void sciDisableNotification(sciBASE_t *sci, uint32_t flags);
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163 void sciEnableLoopback(sciBASE_t *sci, Loopbacktype_t Loopbacktype);
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164 void sciDisableLoopback(sciBASE_t *sci);
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166 /** @fn void sciNotification(sciBASE_t *sci, uint32_t flags)
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167 * @brief Interrupt callback
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168 * @param[in] sci - sci module base address
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169 * @param[in] flags - copy of error interrupt flags
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171 * This is a callback that is provided by the application and is called apon
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172 * an interrupt. The parameter passed to the callback is a copy of the
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173 * interrupt flag register.
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175 void sciNotification(sciBASE_t *sci, uint32_t flags);
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