2 * @brief HET Driver Definition File
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8 /* (c) Texas Instruments 2009-2012, All rights reserved. */
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14 #include "sys_common.h"
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18 /* USER CODE BEGIN (0) */
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22 * @brief Pwm signal 0
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24 * Alias for pwm signal 0
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29 * @brief Pwm signal 1
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31 * Alias for pwm signal 1
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36 * @brief Pwm signal 2
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38 * Alias for pwm signal 2
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43 * @brief Pwm signal 3
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45 * Alias for pwm signal 3
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50 * @brief Pwm signal 4
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52 * Alias for pwm signal 4
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57 * @brief Pwm signal 5
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59 * Alias for pwm signal 5
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64 * @brief Pwm signal 6
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66 * Alias for pwm signal 6
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71 * @brief Pwm signal 7
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73 * Alias for pwm signal 7
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79 * @brief Edge signal 0
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81 * Alias for edge signal 0
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86 * @brief Edge signal 1
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88 * Alias for edge signal 1
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93 * @brief Edge signal 2
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95 * Alias for edge signal 2
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100 * @brief Edge signal 3
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102 * Alias for edge signal 3
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107 * @brief Edge signal 4
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109 * Alias for edge signal 4
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114 * @brief Edge signal 5
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116 * Alias for edge signal 5
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121 * @brief Edge signal 6
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123 * Alias for edge signal 6
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128 * @brief Edge signal 7
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130 * Alias for edge signal 7
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136 * @brief Capture signal 0
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138 * Alias for capture signal 0
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143 * @brief Capture signal 1
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145 * Alias for capture signal 1
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150 * @brief Capture signal 2
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152 * Alias for capture signal 2
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157 * @brief Capture signal 3
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159 * Alias for capture signal 3
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164 * @brief Capture signal 4
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166 * Alias for capture signal 4
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171 * @brief Capture signal 5
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173 * Alias for capture signal 5
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178 * @brief Capture signal 6
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180 * Alias for capture signal 6
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185 * @brief Capture signal 7
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187 * Alias for capture signal 7
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191 /** @def pwmEND_OF_DUTY
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192 * @brief Pwm end of duty
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194 * Alias for pwm end of duty notification
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196 #define pwmEND_OF_DUTY 2U
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198 /** @def pwmEND_OF_PERIOD
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199 * @brief Pwm end of period
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201 * Alias for pwm end of period notification
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203 #define pwmEND_OF_PERIOD 4U
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205 /** @def pwmEND_OF_BOTH
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206 * @brief Pwm end of duty and period
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208 * Alias for pwm end of duty and period notification
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210 #define pwmEND_OF_BOTH 6U
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212 /* USER CODE BEGIN (1) */
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213 /* USER CODE END */
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215 /** @struct hetBase
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216 * @brief HET Register Definition
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218 * This structure is used to access the HET module egisters.
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220 /** @typedef hetBASE_t
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221 * @brief HET Register Frame Type Definition
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223 * This type is used to access the HET Registers.
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262 /** @struct hetBase
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263 * @brief HET Base Register Definition
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265 * This structure is used to access the HET module egisters.
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267 /** @typedef hetBASE_t
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268 * @brief HET Register Frame Type Definition
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270 * This type is used to access the HET Registers.
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273 typedef volatile struct hetBase
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275 uint32_t GCR; /**< 0x0000: Global control register */
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276 uint32_t PFR; /**< 0x0004: Prescale factor register */
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277 uint32_t ADDR; /**< 0x0008: Current address register */
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278 uint32_t OFF1; /**< 0x000C: Interrupt offset register 1 */
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279 uint32_t OFF2; /**< 0x0010: Interrupt offset register 2 */
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280 uint32_t INTENAS; /**< 0x0014: Interrupt enable set register */
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281 uint32_t INTENAC; /**< 0x0018: Interrupt enable clear register */
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282 uint32_t EXC1; /**< 0x001C: Exeption control register 1 */
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283 uint32_t EXC2; /**< 0x0020: Exeption control register 2 */
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284 uint32_t PRY; /**< 0x0024: Interrupt priority register */
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285 uint32_t FLG; /**< 0x0028: Interrupt flag register */
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286 uint32_t AND; /**< 0x002C: AND share control register */
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287 uint32_t : 32U; /**< 0x0030: Reserved */
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288 uint32_t HRSH; /**< 0x0034: High resoltion share register */
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289 uint32_t XOR; /**< 0x0038: XOR share register */
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290 uint32_t REQENS; /**< 0x003C: Request enable set register */
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291 uint32_t REQENC; /**< 0x0040: Request enable clear register */
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292 uint32_t REQDS; /**< 0x0044: Request destination select register */
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293 uint32_t : 32U; /**< 0x0048: Reserved */
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294 uint32_t DIR; /**< 0x004C: Direction register */
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295 uint32_t DIN; /**< 0x0050: Data input register */
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296 uint32_t DOUT; /**< 0x0054: Data output register */
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297 uint32_t DSET; /**< 0x0058: Data output set register */
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298 uint32_t DCLR; /**< 0x005C: Data output clear register */
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299 uint32_t PDR; /**< 0x0060: Open drain register */
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300 uint32_t PULDIS; /**< 0x0064: Pull disable register */
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301 uint32_t PSL; /**< 0x0068: Pull select register */
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302 uint32_t : 32U; /**< 0x006C: Reserved */
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303 uint32_t : 32U; /**< 0x0070: Reserved */
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304 uint32_t PCREG; /**< 0x0074: Parity control register */
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305 uint32_t PAR; /**< 0x0078: Parity address register */
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306 uint32_t PPR; /**< 0x007C: Parity pin select register */
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307 uint32_t SFPRLD; /**< 0x0080: Suppression filter preload register */
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308 uint32_t SFENA; /**< 0x0084: Suppression filter enable register */
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309 uint32_t : 32U; /**< 0x0088: Reserved */
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310 uint32_t LBPSEL; /**< 0x008C: Loop back pair select register */
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311 uint32_t LBPDIR; /**< 0x0090: Loop back pair direction register */
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312 uint32_t PINDIS; /**< 0x0094: Pin disable register */
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313 uint32_t : 32U; /**< 0x0098: Reserved */
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314 uint32_t HWAPINSEL;/**< 0x009C: HWAG Pin select register */
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315 uint32_t HWAGCR0; /**< 0x00A0: HWAG Global control register 0 */
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316 uint32_t HWAGCR1; /**< 0x00A4: HWAG Global control register 1 */
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317 uint32_t HWAGCR2; /**< 0x00A8: HWAG Global control register 2 */
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318 uint32_t HWAENASET;/**< 0x00AC: HWAG Interrupt enable set register */
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319 uint32_t HWAENACLR;/**< 0x00B0: HWAG Interrupt enable clear register*/
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320 uint32_t HWALVLSET;/**< 0x00B4: HWAG Interrupt level set register */
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321 uint32_t HWALVLCLR;/**< 0x00B8: HWAG Interrupt level clear register */
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322 uint32_t HWAFLG; /**< 0x00BC: HWAG Interrupt flag register */
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323 uint32_t HWAOFF1; /**< 0x00C0: HWAG Interrupt offset 1 register */
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324 uint32_t HWAOFF2; /**< 0x00C4: HWAG Interrupt offset 2 register */
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325 uint32_t HWAACNT; /**< 0x00C8: HWAG Angle value register */
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326 uint32_t HWAPCNT1; /**< 0x00CC: HWAG Period value register 1 */
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327 uint32_t HWAPCNT; /**< 0x00D0: HWAG Period value register */
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328 uint32_t HWASTWD; /**< 0x00D4: HWAG Step width register */
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329 uint32_t HWATHNB; /**< 0x00D8: HWAG Teeth number register */
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330 uint32_t HWATHVL; /**< 0x00DC: HWAG Teeth Value register */
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331 uint32_t HWAFIL; /**< 0x00E0: HWAG Filter register */
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332 uint32_t : 32U; /**< 0x00E4: Reserved */
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333 uint32_t HWAFIL2; /**< 0x00E8: HWAG Second filter register */
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334 uint32_t : 32U; /**< 0x00EC: Reserved */
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335 uint32_t HWAANGI; /**< 0x00F0: HWAG Angle increment register */
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340 * @brief HET Register Frame Pointer
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342 * This pointer is used by the HET driver to access the het module registers.
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344 #define hetREG1 ((hetBASE_t *)0xFFF7B800U)
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348 * @brief HET GIO Port Register Pointer
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350 * Pointer used by the GIO driver to access I/O PORT of HET1
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351 * (use the GIO drivers to access the port pins).
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353 #define hetPORT1 ((gioPORT_t *)0xFFF7B84CU)
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357 * @brief HET2 Register Frame Pointer
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359 * This pointer is used by the HET driver to access the het module registers.
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361 #define hetREG2 ((hetBASE_t *)0xFFF7B900U)
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365 * @brief HET2 GIO Port Register Pointer
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367 * Pointer used by the GIO driver to access I/O PORT of HET2
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368 * (use the GIO drivers to access the port pins).
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370 #define hetPORT2 ((gioPORT_t *)0xFFF7B94CU)
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374 /** @struct hetInstructionBase
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375 * @brief HET Instruction Definition
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377 * This structure is used to access the HET RAM.
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379 /** @typedef hetINSTRUCTION_t
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380 * @brief HET Instruction Type Definition
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382 * This type is used to access a HET Instruction.
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384 typedef volatile struct hetInstructionBase
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390 } hetINSTRUCTION_t;
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393 /** @struct hetRamBase
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394 * @brief HET RAM Definition
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396 * This structure is used to access the HET RAM.
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398 /** @typedef hetRAMBASE_t
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399 * @brief HET RAM Type Definition
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401 * This type is used to access the HET RAM.
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403 typedef volatile struct het1RamBase
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405 hetINSTRUCTION_t Instruction[160U];
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409 #define hetRAM1 ((hetRAMBASE_t *)0xFF460000U)
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411 #define hetRAM2 ((hetRAMBASE_t *)0xFF440000U)
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413 #define NHET1RAMPARLOC (*(unsigned int *)0xFF462000U)
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414 #define NHET1RAMLOC (*(unsigned int *)0xFF460000U)
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416 #define NHET2RAMPARLOC (*(unsigned int *)0xFF442000U)
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417 #define NHET2RAMLOC (*(unsigned int *)0xFF440000U)
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419 /** @struct hetSignal
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420 * @brief HET Signal Definition
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422 * This structure is used to define a pwm signal.
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424 /** @typedef hetSIGNAL_t
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425 * @brief HET Signal Type Definition
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427 * This type is used to access HET Signal Information.
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429 typedef struct hetSignal
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431 uint32_t duty; /**< Duty cycle in % of the period */
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432 double period; /**< Period in us */
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436 /* HET Interface Functions */
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437 void hetInit(void);
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439 /* PWM Interface Functions */
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440 void pwmStart(hetRAMBASE_t * hetRAM,uint32_t pwm);
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441 void pwmStop(hetRAMBASE_t * hetRAM,uint32_t pwm);
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442 void pwmSetDuty(hetRAMBASE_t * hetRAM,uint32_t pwm, uint32_t duty);
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443 void pwmSetSignal(hetRAMBASE_t * hetRAM,uint32_t pwm, hetSIGNAL_t signal);
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444 hetSIGNAL_t pwmGetSignal(hetRAMBASE_t * hetRAM,uint32_t pwm);
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445 void pwmEnableNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification);
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446 void pwmDisableNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification);
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447 void pwmNotification(hetBASE_t * hetREG,uint32_t pwm, uint32_t notification);
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449 /* Edge Interface Functions */
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450 void edgeResetCounter(hetRAMBASE_t * hetRAM,uint32_t edge);
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451 uint32_t edgeGetCounter(hetRAMBASE_t * hetRAM,uint32_t edge);
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452 void edgeEnableNotification(hetBASE_t * hetREG,uint32_t edge);
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453 void edgeDisableNotification(hetBASE_t * hetREG,uint32_t edge);
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454 void edgeNotification(hetBASE_t * hetREG,uint32_t edge);
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456 /* Captured Signal Interface Functions */
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457 hetSIGNAL_t capGetSignal(hetRAMBASE_t * hetRAM,uint32_t cap);
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459 /* Timestamp Interface Functions */
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460 void hetResetTimestamp(hetRAMBASE_t * hetRAM);
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461 uint32_t hetGetTimestamp(hetRAMBASE_t * hetRAM);
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463 /** @fn void hetNotification(hetBASE_t *het, uint32_t offset)
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464 * @brief het interrupt callback
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465 * @param[in] het - Het module base address
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466 * - hetREG1: HET1 module base address pointer
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467 * - hetREG2: HET2 module base address pointer
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468 * @param[in] offset - het interrupt offset / Source number
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470 * @note This function has to be provide by the user.
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472 * This is a interrupt callback that is provided by the application and is call upon
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473 * an het interrupt. The paramer passed to the callback is a copy of the interrupt
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474 * offset register which is used to decode the interrupt source.
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476 void hetNotification(hetBASE_t *het, uint32_t offset);
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478 /* USER CODE BEGIN (3) */
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479 /* USER CODE END */
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