File digital_io.h mixed two concepts - digital IOs and so called ports.
Ports can be used to access digital IOs but also SPI and ADC. We
therefore spit this file into two independent one.
File gio.h defines access to digital IO on the MCU. The definition of
pins will be provided per target. Applications do not access this
definition directly but via two files: pin names are accessed via
gio_pin_names.h and the definition and related functions via
gio_pin_tab.h.
File port.h defines access to ports.
This commit only changes the interface (.h files). Target specific port
and pin definitions and changes in other files are in subsequent
commits.
rpp/src/rpp/gio.c \
rpp/src/rpp/sci.c \
rpp/src/drv/_$(TARGET)/adc.c \
+ rpp/src/drv/gio.c \
+ rpp/src/drv/gio_tab.c \
rpp/src/drv/sci.c \
- rpp/src/drv/_$(TARGET)/digital_io_def.c \
- rpp/src/drv/digital_io.c \
rpp/src/sys/asm/dabort.asm \
rpp/src/sys/asm/sys_core.asm \
rpp/src/sys/asm/sys_intvecs.asm \
#ifndef __DRV_DAC_H
#define __DRV_DAC_H
-#include "drv/digital_io.h"
+#include "drv/gio.h"
/**
+++ /dev/null
-/**
- * Hardware Abstraction Layer library interface file.
- *
- * @file hal.h
- *
- * @copyright Copyright (C) 2013, 2015 Czech Technical University in Prague
- *
- * @author Carlos Jenkins <carlos@jenkins.co.cr>
- */
-
-#ifndef __HAL_H
-#define __HAL_H
-
-#include "sys/sys.h"
-#include "drv/digital_io_def.h"
-
-typedef struct dio_pin_map_element {
- const char *pin_name; // Pin name
- uint32_t pin_desc; // Pin descriptor assigned to the pin name
-} dio_pin_map_element_t;
-
-enum dio_port_interface_type {
- ADC = 1,
- SPI,
- GPIO
-};
-
-/**
- * @brief Port descriptor
- *
- * The structure describes the port. Port here means set of IO pins on the board.
- * The API is designed to provide an interface for setting and reading from ports connected to the MCU by SPI, GPIO or ADC.
- */
-typedef struct dio_port_desc_st {
- uint32_t *config; /**< Configuration of the port. An arry of values, which meaning differs for the interface type:
- for SPI: address, chip-select
- for GPIO: descriptors for pins (defined in gpio_tms570_def.h)
- for ADC: ADC base address, ADC group number, Peripheral type (HOUTIFBK or ADC)
- */
- uint32_t numValues; /**< Size of the data to be read from or written on the port. Meaning differs for the interface type:
- for SPI: size of the command in bytes
- for GPIO: number of pins on the port
- for ADC: number of channels to be read from ADC.
- */
- enum dio_port_interface_type interfaceType; /**< Type of the interface to which the port or its controller is connected.
- Can be SPI, ADC or GPIO
- */
- uint32_t (*port_getfnc_ptr)(uint32_t *config, uint32_t num_val, uint32_t *values); /**< Pointer to a getter function. If it is NULL, than port is write only.
- All SPI ports are write only, because command has to be sent to obtain actual response.
- It is allowed to read values from an output port.
- */
- uint32_t (*port_setfnc_ptr)(uint32_t *config, uint32_t num_val, const uint32_t *values); /**< Pointer to a setter function. If it is NULL, than port is read only.
- All ADC ports are read only.
- It is not allowed to write values on an input port.
- */
-} dio_port_desc_t;
-
-/**
- * Maps port descriptor to the port name
- */
-typedef struct dio_port_def_st {
- char *name;
- dio_port_desc_t *desc;
-} dio_port_def_t;
-
-#define DIO_PORT_CONF_MASK 0xff000000
-
-#define DIO_PORT_CONF_DIR_MASK 0x01000000
-#define DIO_PORT_CONF_DIR_IN (0x00000000 | DIO_PORT_CONF_SET_DIR)
-#define DIO_PORT_CONF_DIR_OUT (0x01000000 | DIO_PORT_CONF_SET_DIR)
-
-#define DIO_PORT_CONF_INIT_MASK 0x02000000
-#define DIO_PORT_CONF_INIT_LOW 0x00000000
-#define DIO_PORT_CONF_INIT_HIGH 0x02000000
-
-#define DIO_PORT_CONF_OD_MASK 0x04000000
-#define DIO_PORT_CONF_OD_OFF 0x00000000
-#define DIO_PORT_CONF_OD_ON 0x04000000
-
-#define DIO_PORT_CONF_SET_DIR 0x08000000
-
-#define DIO_PORT_CONF_MODE_MASK 0x30000000
-#define DIO_PORT_CONF_MODE_PTYPE_MASK 0x10000000
-#define DIO_PORT_CONF_MODE_PEN_MASK 0x20000000
-#define DIO_PORT_CONF_MODE_PU 0x10000000 // Pull-up
-#define DIO_PORT_CONF_MODE_PD 0x00000000 // Pull-down
-#define DIO_PORT_CONF_MODE_PEN 0x00000000 // Pull resistor enable
-#define DIO_PORT_CONF_MODE_PDIS 0x20000000 // Pull resistor disable
-
-#define DIO_PORT_CONF_FNC_MASK 0xc0000000
-#define DIO_PORT_CONF_FNC_GPIO 0x00000000
-#define DIO_PORT_CONF_FNC_0 0x00000000
-#define DIO_PORT_CONF_FNC_1 0x40000000
-#define DIO_PORT_CONF_FNC_2 0x80000000
-#define DIO_PORT_CONF_FNC_3 0xc0000000
-
-/* Port indexes to portmap */
-#define DIO_PORT_ID_DMM 0x0
-#define DIO_PORT_ID_GIOA 0x1
-#define DIO_PORT_ID_GIOB 0x2
-#define DIO_PORT_ID_HET1 0x3
-#define DIO_PORT_ID_HET2 0x4
-
-uint8_t dio_gpio_get_pin_cnt();
-
-dio_pin_map_element_t* dio_gpio_get_pin_map();
-
-/**
- * Get port base assigned to port number
- * @param[in] port_num Port number <0;4>
- * @return Pointer to port registers
- */
-gioPORT_t *dio_gpio_get_port_base(uint32_t port_num);
-
-/**
- * Get port number assigned to pin in its descriptor
- * @param[in] pin descriptor
- * @return Index of port
- */
-uint32_t dio_gpio_pin_get_port_num(uint32_t pin_dsc);
-
-/**
- * Get port base from pin descriptor
- * Combines two upper defined functions
- * @param[in] pin_dcs Pin descriptor
- * @return Pointer to port registers
- */
-gioPORT_t *dio_gpio_pin_get_port_base(uint32_t pin_dsc);
-
-/**
- * Get pin descriptor assigned to pin name.
- * @param[in] pin_name Pointer to string - the name of the pin.
- * @param[in] len Length of the name, if terminated by '/0', then len=-1
- * @return Pin descriptor or NULL if not found
- */
-uint32_t *dio_gpio_pin_get_dsc(const char *pin_name, int len);
-
-/**
- * Get value from GPIO pin
- * @param[in] pin_dsc pin descriptor
- * @return value read from specified gpio pin
- */
-uint32_t dio_gpio_pin_get_value(uint32_t pin_dsc);
-
-/**
- * Set value to gpio pin
- * @param[in] pin_dsc pin descriptor
- * @param[in] value value to be assigned to the pin
- */
-void dio_gpio_pin_set_value(uint32_t pin_dsc, uint32_t value);
-
-/**
- * Set pin direction to input
- * @param[in] pin_dsc pin descriptor
- * @return always 0
- */
-int dio_gpio_pin_set_dir_in(uint32_t pin_dsc);
-
-/**
- * Set pin direction to output
- * @param[in] pin_dsc pin descriptor
- * @return always 0
- */
-int dio_gpio_pin_set_dir_out(uint32_t pin_dsc, uint32_t value);
-
-/**
- * Get pin direction
- * @param[in] pin_dsc pin descriptor
- * @return 1 - output, 0 - input
- */
-int dio_gpio_pin_get_dir(uint32_t pin_dsc);
-
-/**
- * Set pin as pull down or pull up and pull resistor enabled or disabled.
- * @param[in] pin_dsc Descriptor of the pin
- * @param[in] Mode on which pin will be configured to.
- * PORT_CONF_MODE_PU - pull up
- * PORT_CONF_MODE_PD - pull down
- * must be | with
- * PORT_CONF_MODE_PEN - pull resistor enable
- * PORT_CONF_MODE_PDIS - pull resistor disable
- * @return always 0
- */
-uint32_t dio_gpio_pin_set_mode(uint32_t pin_dsc, uint32_t mode);
-
-/**
- * Configure pin to be open drain or not
- * @param[in] pin_dsc Descriptor of the pin
- * @param[in] Mode on which pin will be configured to.
- * PORT_CONF_OD_OFF - open-drain disabled
- * PORT_CONF_OD_ON - open drain enabled
- *
- * @return always 0
- */
-uint32_t dio_gpio_pin_set_od(uint32_t pin_dsc, uint32_t od);
-
-/**
- * Configure pin
- * @param[in] pin_dsc Descriptor of the pin
- * @param[in] Mode on which pin will be configured to.
- * PORT_CONF_OD_OFF - open-drain disabled
- * PORT_CONF_OD_ON - open drain enabled
- *
- * PORT_CONF_MODE_PU - pull up
- * PORT_CONF_MODE_PD - pull down
- *
- * PORT_CONF_MODE_PEN - pull resistor enable
- * PORT_CONF_MODE_PDIS - pull resistor disable
- *
- * PORT_CONF_DIR_IN - direction input
- * PORT_CONF_DIR_OUT - direction output
- *
- * PORT_CONF_INIT_LOW - init value 0
- * PORT_CONF_INIT_HIGH - init value 1
- *
- * PORT_CONF_FNC_GPIO - port function GPIO
- * PORT_CONF_FNC_FNCX - port alternate function X
- *
- * @return always 0
- */
-uint32_t dio_gpio_pin_set_config(uint32_t pin_dsc, uint32_t conf);
-
-/**
- * Do the initial pin configuration according values in pin descriptor
- * @param[in] pin_dsc pin descriptor
- * @return always 0;
- */
-uint32_t dio_gpio_pin_configure(uint32_t pin_dsc);
-
-/**
- * Get values of all pins of given port.
- * @param[in] config Pointer to array of pin descriptors
- * @param[in] num_val Number of pins assigned to the port
- * @param[out] values Stored values of all pins of the port. 1st bit -> pin0, 2nd bit -> pin1...
- * @return always 0
- */
-uint32_t dio_gpio_port_get_val(uint32_t *config, uint32_t num_val, uint32_t *values);
-
-/**
- * Set values to all pins of given port.
- * @param[in] config Pointer to array of pin descriptors
- * @param[in] num_val Number of pins assigned to the port
- * @param[in] values Stored values of all pins of the port. 1st bit -> pin0, 2nd bit -> pin1...
- * @return always 0
- */
-uint32_t dio_gpio_port_set_val(uint32_t *config, uint32_t num_val, const uint32_t *values);
-
-/**
- * Get port descriptor assigned to port name.
- * @param[in] port_name Pointer to string - the name of the port.
- * @param[in] len Length of the name, if terminated by '/0', then len=-1
- * @return Port descriptor or NULL if not found
- */
-const dio_port_def_t *dio_port_get_map();
-
-/**
- * Get port descriptor assigned to port name.
- * @param[in] port_name Pointer to string - the name of the port.
- * @param[in] len Length of the name, if terminated by '/0', then len=-1
- * @return Port descriptor or NULL if not found
- */
-dio_port_desc_t *dio_port_get_dsc(const char *port_name, int len);
-
-uint32_t dio_port_get_val_cnt(const dio_port_desc_t* port_desc);
-
-/**
- * Transfer command through the spi
- * @param[in] config Address of the SPI
- * @param[in] num_bytes Number of bytes to be trasfered
- * @param[in] commands SPI command to be sent
- * @return spi response
- */
-uint32_t dio_spi_port_transfer_command(uint32_t *config, uint32_t num_bytes, const uint32_t *commands);
-
-
-#endif /* __HAL_H */
+++ /dev/null
-/*
- * digital_io_def.h
- *
- * Created on: 20.7.2015
- * Author: michal
- */
-
-#ifndef DIGITAL_IO_DEF_H_
-#define DIGITAL_IO_DEF_H_
-
-#if defined(TARGET_POSIX)
-#include "drv/_rm48_hdk/digital_io_def.h"
-#elif defined(TARGET_RM48_HDK)
-#include "drv/_rm48_hdk/digital_io_def.h"
-#elif defined(TARGET_TMS570_HDK)
-#include "drv/_tms570_hdk/digital_io_def.h"
-#elif defined(TARGET_TMS570_HYDCTR)
-#include "drv/_tms570_hydctr/digital_io_def.h"
-#elif defined(TARGET_TMS570_RPP)
-#include "drv/_tms570_rpp/digital_io_def.h"
-#else
-#error No supported target specified!
-#endif
-
-#endif /* DIGITAL_IO_DEF_H_ */
#ifndef __DRV_H
#define __DRV_H
-#include "drv/digital_io.h"
-
#include "drv/adc.h"
+#include "drv/gio.h"
#include "drv/sci.h"
#ifdef TARGET_TMS570_RPP
--- /dev/null
+/**
+ * Digital I/O handling
+ *
+ * @file digital_io.h
+ *
+ * @copyright Copyright (C) 2013, 2015 Czech Technical University in Prague
+ *
+ * @author Carlos Jenkins <carlos@jenkins.co.cr>
+ */
+
+#ifndef DRV_DIGITAL_IO_H
+#define DRV_DIGITAL_IO_H
+
+#include "sys/sys.h"
+
+/* Pin configuration constants */
+#define GIO_PIN_CONF_MASK 0xff000000
+
+#define GIO_PIN_CONF_DIR_MASK 0x01000000
+#define GIO_PIN_CONF_DIR_IN (0x00000000 | GIO_PIN_CONF_SET_DIR)
+#define GIO_PIN_CONF_DIR_OUT (0x01000000 | GIO_PIN_CONF_SET_DIR)
+
+#define GIO_PIN_CONF_INIT_MASK 0x02000000
+#define GIO_PIN_CONF_INIT_LOW 0x00000000
+#define GIO_PIN_CONF_INIT_HIGH 0x02000000
+
+#define GIO_PIN_CONF_OD_MASK 0x04000000
+#define GIO_PIN_CONF_OD_OFF 0x00000000
+#define GIO_PIN_CONF_OD_ON 0x04000000
+
+#define GIO_PIN_CONF_SET_DIR 0x08000000
+
+#define GIO_PIN_CONF_MODE_MASK 0x30000000
+#define GIO_PIN_CONF_MODE_PTYPE_MASK 0x10000000
+#define GIO_PIN_CONF_MODE_PEN_MASK 0x20000000
+#define GIO_PIN_CONF_MODE_PU 0x10000000 // Pull-up
+#define GIO_PIN_CONF_MODE_PD 0x00000000 // Pull-down
+#define GIO_PIN_CONF_MODE_PEN 0x00000000 // Pull resistor enable
+#define GIO_PIN_CONF_MODE_PDIS 0x20000000 // Pull resistor disable
+
+#define GIO_PIN_CONF_FNC_MASK 0xc0000000
+#define GIO_PIN_CONF_FNC_GPIO 0x00000000
+#define GIO_PIN_CONF_FNC_0 0x00000000
+#define GIO_PIN_CONF_FNC_1 0x40000000
+#define GIO_PIN_CONF_FNC_2 0x80000000
+#define GIO_PIN_CONF_FNC_3 0xc0000000
+
+/* Port indexes to portmap */
+enum gio_port {
+ GIO_PORT_DMM,
+ GIO_PORT_GIOA,
+ GIO_PORT_GIOB,
+ GIO_PORT_HET1,
+ GIO_PORT_HET2,
+};
+
+#define GIO_PORT_SHIFT 5
+#define GIO_PORT_MASK (0xf << GIO_PORT_SHIFT)
+#define GIO_PIN_NUM_MASK ((1 << GIO_PORT_SHIFT) - 1)
+
+/* Computes pin descriptor from port, pin number and pin configuration */
+#define GIO_PIN_DESC(port,n,conf) (((port)<<GIO_PORT_SHIFT) | (n) | (conf))
+
+void gio_setup(uint32_t pin_dsc);
+
+boolean_t gio_get(uint32_t pin_dsc);
+void gio_set(uint32_t pin_dsc, boolean_t value);
+
+static inline uint32_t gio_port(uint32_t pin_dsc)
+{
+ return (pin_dsc & GIO_PORT_MASK) >> GIO_PORT_SHIFT;
+}
+
+#endif /* __HAL_H */
--- /dev/null
+/**
+ * @file gio_def.h
+ * @author Michal Sojka <sojkam1@fel.cvut.cz>
+ * @date Fri Jul 24 18:05:16 2015
+ *
+ * @brief Description of pin configurattion for current board.
+ *
+ * This file defines pins and their configuration by using
+ * GIO_PIN_DEF_GEN macro. This file is included at several places
+ * with different definition of GIO_PIN_DEF_GEN macro to generate
+ * different information.
+ */
+
+
+#if defined(TARGET_POSIX)
+#include "drv/_rm48_hdk/gio_def.h"
+#elif defined(TARGET_RM48_HDK)
+#include "drv/_rm48_hdk/gio_def.h"
+#elif defined(TARGET_TMS570_HDK)
+#include "drv/_tms570_hdk/gio_def.h"
+#elif defined(TARGET_TMS570_HYDCTR)
+#include "drv/_tms570_hydctr/gio_def.h"
+#elif defined(TARGET_TMS570_RPP)
+#include "drv/_tms570_rpp/gio_def.h"
+#else
+#error No supported target specified!
+#endif
--- /dev/null
+#ifndef DRV_PIN_NAMES_H
+#define DRV_PIN_NAMES_H
+
+enum pin_name {
+
+ #define GIO_PIN_DEF_GEN(name, port, pin, conf) PIN_##name,
+ #include "drv/gio_def.h"
+ #undef GIO_PIN_DEF_GEN
+
+ _PIN_COUNT,
+ _PIN_INVALID = -1
+};
+
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2015 Czech Technical University in Prague
+ *
+ * Authors:
+ * - Michal Sojka <sojkam1@fel.cvut.cz>
+ *
+ * This document contains proprietary information belonging to Czech
+ * Technical University in Prague. Passing on and copying of this
+ * document, and communication of its contents is not permitted
+ * without prior written authorization.
+ *
+ */
+
+#ifndef DRV_GIO_PIN_TAB_H
+#define DRV_GIO_PIN_TAB_H
+
+#include "drv/gio.h"
+#include "drv/gio_names.h"
+#include "drv/port.h"
+
+struct gio_pin {
+ const char *pin_name; // Pin name
+ uint32_t pin_dsc; // Pin descriptor computed with GIO_PIN_DESC
+};
+
+extern const struct gio_pin gio_table[_PIN_COUNT];
+
+/*
+ * We don't use enum pin_name here, because it prevents us doing
+ * arithmetic operations like (PIN_DIN8 + 1). The enum is used in the
+ * rpp layer, where it protects users from doing stupid things.
+ */
+static inline void gio_tab_set(/* enum pin_name */int pin, boolean_t val)
+{
+ gio_set(gio_table[pin].pin_dsc, val);
+}
+
+static inline boolean_t gio_tab_get(/* enum pin_name */int pin)
+{
+ return gio_get(gio_table[pin].pin_dsc);
+}
+
+int8_t port_gioset_get(const struct port_desc *port, void *values, size_t size);
+int8_t port_gioset_set(const struct port_desc *port, void *values, size_t size);
+
+
+#endif
#ifndef __DRV_MOUT_H
#define __DRV_MOUT_H
-#include "drv/digital_io.h"
+#include "drv/gio.h"
// FIXME Document.
int8_t drv_mout_set(uint8_t pin, uint8_t val);
--- /dev/null
+/*
+ * Copyright (C) 2015 Czech Technical University in Prague
+ *
+ * Authors:
+ * - Michal Sojka <sojkam1@fel.cvut.cz>
+ *
+ * This document contains proprietary information belonging to Czech
+ * Technical University in Prague. Passing on and copying of this
+ * document, and communication of its contents is not permitted
+ * without prior written authorization.
+ *
+ */
+
+/**
+ * @file port.h
+ * @author Michal Sojka <sojkam1@fel.cvut.cz>
+ * @date Sat Jul 25 23:03:40 2015
+ *
+ * @brief Port related stuff
+ *
+ * Port is a set of I/O (pins) that are somehow related together. Port
+ * can be on a MCU or attached over SPI or similar bus. Ports can be
+ * of different types, e.g. digital I/O or ADC.
+ */
+
+
+#ifndef DRV_PORT_H
+#define DRV_PORT_H
+
+#include "sys/ti_drv_gio.h"
+#include "sys/ti_drv_adc.h"
+#include "drv/port_def.h"
+
+/**
+ * Port descriptor.
+ *
+ * The structure describes the port. Port here means set of IO pins on
+ * the board. The API is designed to provide an interface for setting
+ * and reading from ports connected to the MCU by SPI, GPIO or ADC.
+ */
+struct port_desc {
+ char *name;
+ uint16_t numchn; /**< Number of channels/pins */
+ uint16_t bpch; /**< Bits per channel */
+ /**
+ * Getter function. If NULL, the port is write only. All SPI ports
+ * are write only, because a command has to be sent to obtain an
+ * response.
+ *
+ * @param[out] values Pointer to memory where to store the values
+ * get from the port. If bpch == 1, the memory is uint32_t,
+ * otherwise it is an array of numch bpch-wide elements.
+ *
+ * @param[out] size Size of the memory pointed by @a values.
+ */
+ int8_t (*get)(const struct port_desc *port, void *values, size_t size);
+ /**
+ * Setter function. If NULL, the port is read only.
+ *
+ * @param[out] values Pointer to memory specifying how to set the
+ * port channels. If bpch == 1, the memory is uint32_t, otherwise
+ * it is an array of numch bpch-wide elements. The function is
+ * allowed to modify this memory and return there some information
+ * e.g. current or previous values of the port (this is usually
+ * the case for SPI-based ports).
+ *
+ * @param[out] size Size of the memory pointed by @a values.
+ */
+ int8_t (*set)(const struct port_desc *port, void *values, size_t size);
+
+ union {
+ struct {
+ enum pin_name *pins;
+ } gioset;
+ struct {
+ uint8_t ifc; /**< SPI interface */
+ uint8_t cs; /**< SPI chipselect */
+ } spi;
+ struct {
+ adcBASE_t *reg;
+ uint32_t group;
+ uint32_t sem; /* TODO: Remove this. This is the same information as group. */
+ } adc;
+ gioPORT_t *gio_reg;
+ } cfg;
+};
+
+extern const struct port_desc port_desc[_PORT_COUNT];
+
+#endif
--- /dev/null
+/*
+ * Copyright (C) 2015 Czech Technical University in Prague
+ *
+ * Authors:
+ * - Michal Sojka <sojkam1@fel.cvut.cz>
+ *
+ * This document contains proprietary information belonging to Czech
+ * Technical University in Prague. Passing on and copying of this
+ * document, and communication of its contents is not permitted
+ * without prior written authorization.
+ *
+ */
+
+#ifndef DRV_PORT_DEF_H
+#define DRV_PORT_DEF_H
+
+/* Definition of port names (enum port_id) */
+
+#if defined(TARGET_POSIX)
+#include "drv/_rm48_hdk/port_def.h"
+#elif defined(TARGET_RM48_HDK)
+#include "drv/_rm48_hdk/port_def.h"
+#elif defined(TARGET_TMS570_HDK)
+#include "drv/_tms570_hdk/port_def.h"
+#elif defined(TARGET_TMS570_HYDCTR)
+#include "drv/_tms570_hydctr/port_def.h"
+#elif defined(TARGET_TMS570_RPP)
+#include "drv/_tms570_rpp/port_def.h"
+#else
+#error No supported target specified!
+#endif
+
+#endif
#define _SPI_DRV_H_
#include "drv/spi_tms570.h"
+#include "drv/port.h"
UL_LIST_CUST_DEC(spi_rq_queue, spi_drv_t, spi_msg_head_t, rq_queue, node)
#define PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
#define PORT_CONF_GPIO_IN_LO_PU_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
-/* Pins descriptors */
+/* Pin definition generators */
#define PIN_DSC_GIOA0 PORT_PIN(DIO_PORT_ID_GIOA, 0, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PIN_DSC_GIOA1 PORT_PIN(DIO_PORT_ID_GIOA, 1, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PIN_DSC_GIOA2 PORT_PIN(DIO_PORT_ID_GIOA, 2, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
#define PORT_CONF_GPIO_IN_LO_PU_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
-/* Pins descriptors */
+/* Pin definition generators */
#define PIN_DSC_GIOA0 PORT_PIN(DIO_PORT_ID_GIOA, 0, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PIN_DSC_GIOA1 PORT_PIN(DIO_PORT_ID_GIOA, 1, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PIN_DSC_GIOA2 PORT_PIN(DIO_PORT_ID_GIOA, 2, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
#define PORT_CONF_GPIO_IN_LO_PU_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
-/* Pins descriptors */
+/* Pin definition generators */
#define PIN_DSC_GIOA0 PORT_PIN(DIO_PORT_ID_GIOA, 0, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PIN_DSC_GIOA1 PORT_PIN(DIO_PORT_ID_GIOA, 1, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PIN_DSC_GIOA2 PORT_PIN(DIO_PORT_ID_GIOA, 2, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
#define PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
#define PORT_CONF_GPIO_IN_LO_PU_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
-/* Pins descriptors */
+/* Pin definition generators */
#define PIN_DSC_FANCTRL PORT_PIN(DIO_PORT_ID_DMM, 0, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
#define PIN_DSC_ETHRST PORT_PIN(DIO_PORT_ID_DMM, 1, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF)
#define PIN_DSC_VBAT1EN PORT_PIN(DIO_PORT_ID_DMM, 2, PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON)
+++ /dev/null
-/*
- * digital_io.c
- *
- * Created on: 17.7.2015
- * Author: michal
- */
-
-#include "drv/digital_io.h"
-#include "drv/spi.h"
-
-extern gioPORT_t *dio_port_id_map[DIO_MAX_PORT_CNT];
-extern dio_pin_map_element_t dio_pin_map[DIO_MAX_PIN_CNT];
-extern dio_port_def_t dio_port_definition[DIO_PORT_CNT];
-
-#define SPI_PORT_BUF_LEN 4
-/** Buffer for spi command to be sent */
-uint8_t spi_port_buf_tx[SPI_PORT_BUF_LEN];
-/** Buffer for spi response */
-uint8_t spi_port_buf_rx[SPI_PORT_BUF_LEN];
-
-uint8_t dio_gpio_get_pin_cnt() {
- return DIO_MAX_PIN_CNT;
-}
-
-dio_pin_map_element_t* dio_gpio_get_pin_map() {
- return dio_pin_map;
-}
-
-gioPORT_t *dio_gpio_get_port_base(uint32_t port_num)
-{
- return dio_port_id_map[port_num];
-}
-
-uint32_t dio_gpio_pin_get_port_num(uint32_t pin_dsc)
-{
-
- return (pin_dsc & ~DIO_PORT_CONF_MASK) >> DIO_PORT_SHIFT;
-}
-
-gioPORT_t *dio_gpio_pin_get_port_base(uint32_t pin_dsc)
-{
- return dio_gpio_get_port_base(dio_gpio_pin_get_port_num(pin_dsc));
-}
-
-
-uint32_t *dio_gpio_pin_get_dsc(const char *pin_name, int len)
-{
- uint32_t i;
- const char *pin_name_ptr;
- char pin_name_term[32];
-
- if (len != -1) { // pin name not terminated by '\0'
- strncpy(pin_name_term, pin_name, len);
- pin_name_term[len] = '\0';
- pin_name_ptr = pin_name_term;
- }
- else pin_name_ptr = pin_name;
-
- for (i = 0; i < DIO_MAX_PIN_CNT; i++) {
- if (strcmp(pin_name_ptr, dio_pin_map[i].pin_name) == 0)
- return &dio_pin_map[i].pin_desc;
- }
- return NULL;
-}
-
-
-uint32_t dio_gpio_pin_get_value(uint32_t pin_dsc)
-{
- return ((dio_gpio_pin_get_port_base(pin_dsc)->DIN) >> (pin_dsc & 0x1f)) & 1;
-}
-
-
-void dio_gpio_pin_set_value(uint32_t pin_dsc, uint32_t value)
-{
- if (value)
- dio_gpio_pin_get_port_base(pin_dsc)->DSET = 1 << (pin_dsc & 0x1f);
- else
- dio_gpio_pin_get_port_base(pin_dsc)->DCLR = 1 << (pin_dsc & 0x1f);
-}
-
-
-int dio_gpio_pin_set_dir_in(uint32_t pin_dsc)
-{
- dio_gpio_pin_get_port_base(pin_dsc)->DIR &= ~(1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-int dio_gpio_pin_set_dir_out(uint32_t pin_dsc, uint32_t value)
-{
- dio_gpio_pin_set_value(pin_dsc, value);
- dio_gpio_pin_get_port_base(pin_dsc)->DIR |= (1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-int dio_gpio_pin_get_dir(uint32_t pin_dsc)
-{
- return (dio_gpio_pin_get_port_base(pin_dsc)->DIR >> (pin_dsc & 0x1f)) & 1;
-}
-
-
-uint32_t dio_gpio_pin_set_mode(uint32_t pin_dsc, uint32_t mode)
-{
- gioPORT_t *gioPort = dio_gpio_pin_get_port_base(pin_dsc);
-
- if (mode & DIO_PORT_CONF_MODE_PTYPE_MASK)
- gioPort->PSL |= (1 << (pin_dsc & 0x1f));
- else
- gioPort->PSL &= ~(1 << (pin_dsc & 0x1f));
- if (mode & DIO_PORT_CONF_MODE_PEN_MASK)
- gioPort->PULDIS |= (1 << (pin_dsc & 0x1f));
- else
- gioPort->PULDIS &= ~(1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-
-uint32_t dio_gpio_pin_set_od(uint32_t pin_dsc, uint32_t od)
-{
- gioPORT_t *gioPort = dio_gpio_pin_get_port_base(pin_dsc);
-
- if (od & DIO_PORT_CONF_OD_ON)
- gioPort->PDR |= (1 << (pin_dsc & 0x1f));
- else
- gioPort->PDR &= ~(1 << (pin_dsc & 0x1f));
- return 0;
-}
-
-
-uint32_t dio_gpio_pin_set_config(uint32_t pin_dsc, uint32_t conf)
-{
- pin_dsc &= ~DIO_PORT_CONF_MASK;
- dio_gpio_pin_set_mode(pin_dsc, conf & DIO_PORT_CONF_MODE_MASK);
- dio_gpio_pin_set_od(pin_dsc, conf & DIO_PORT_CONF_OD_MASK);
- if (conf & DIO_PORT_CONF_SET_DIR) {
- if ((conf & DIO_PORT_CONF_DIR_MASK) == (DIO_PORT_CONF_DIR_IN & DIO_PORT_CONF_DIR_MASK))
- dio_gpio_pin_set_dir_in(pin_dsc);
- else
- dio_gpio_pin_set_dir_out(pin_dsc, conf & DIO_PORT_CONF_INIT_HIGH);
- }
-
- return 0;
-}
-
-uint32_t dio_gpio_pin_configure(uint32_t pin_dsc)
-{
- return dio_gpio_pin_set_config(pin_dsc, pin_dsc);
-}
-
-
-uint32_t dio_gpio_port_get_val(uint32_t *config, uint32_t num_val, uint32_t *values)
-{
- uint32_t i;
-
- for (i = 0; i < num_val; i++) {
- values[i] = dio_gpio_pin_get_value(config[i]);
- }
- return 0;
-}
-
-uint32_t dio_gpio_port_set_val(uint32_t *config, uint32_t num_val, const uint32_t *values)
-{
- uint32_t i;
-
- for (i = 0; i < num_val; i++) {
- dio_gpio_pin_set_value(config[i], (values[i/8] >> i%8) & 0x1);
- }
- return 0;
-}
-
-const dio_port_def_t *dio_port_get_map()
-{
- return (const dio_port_def_t *)dio_port_definition;
-}
-
-dio_port_desc_t *dio_port_get_dsc(const char *port_name, int len)
-{
- uint32_t i;
- const char *port_name_ptr;
- char port_name_term[32];
-
- if (len != -1) { // port name not terminated by '\0'
- strncpy(port_name_term, port_name, len);
- port_name_term[len] = '\0';
- port_name_ptr = port_name_term;
- }
- else port_name_ptr = port_name;
-
- for (i = 0; i < DIO_PORT_CNT; i++) {
- if (strcmp(port_name_ptr, dio_port_definition[i].name) == 0)
- return dio_port_definition[i].desc;
- }
- return NULL;
-}
-
-uint32_t dio_port_get_val_cnt(const dio_port_desc_t* port_desc) {
- if (port_desc != NULL) {
- return port_desc->numValues;
- }
- else {
- return 0;
- }
-}
-
-uint32_t dio_spi_port_transfer_command(uint32_t *config, uint32_t num_bytes, const uint32_t *commands)
-{
- spi_drv_t *ifc;
- int i;
- uint32_t ret;
-
- for (i = 0; i < num_bytes; i++)
- spi_port_buf_tx[i] = commands[i];
-
- ifc = spi_find_drv(NULL, config[0]);
- if (ifc == NULL)
- return 0;
-
- if (!(ifc->flags & SPI_IFC_ON))
- return 0;
-
- spi_transfer(ifc, config[1], num_bytes, spi_port_buf_tx, spi_port_buf_rx);
- ret = 0;
- for (i = 0; i < num_bytes; i++)
- ret |= spi_port_buf_rx[i] << i*8;
- return ret;
-}
--- /dev/null
+/*
+ * gio.c
+ *
+ * Created on: 17.7.2015
+ * Author: michal
+ */
+
+#include "drv/gio.h"
+
+static gioPORT_t *gio_reg[] = {
+#ifdef TARGET_HAS_DMM
+ [GIO_PORT_DMM] = dmmPORT,
+#endif
+ [GIO_PORT_GIOA] = gioPORTA,
+ [GIO_PORT_GIOB] = gioPORTB,
+ [GIO_PORT_HET1] = hetPORT1,
+ [GIO_PORT_HET2] = hetPORT2,
+};
+
+void gio_set(uint32_t pin_dsc, boolean_t value)
+{
+ if (value)
+ gio_reg[gio_port(pin_dsc)]->DSET = (1 << (pin_dsc & GIO_PIN_NUM_MASK));
+ else
+ gio_reg[gio_port(pin_dsc)]->DCLR = (1 << (pin_dsc & GIO_PIN_NUM_MASK));
+}
+
+boolean_t gio_get(uint32_t pin_dsc)
+{
+ return ((gio_reg[gio_port(pin_dsc)]->DIN) >> (pin_dsc & GIO_PIN_NUM_MASK)) & 1;
+}
+
+void gio_setup(uint32_t pin_dsc)
+{
+ gioPORT_t *gioPort = gio_reg[gio_port(pin_dsc)];
+ uint32_t pin_bit = 1 << (pin_dsc & GIO_PIN_NUM_MASK);
+
+ if (pin_dsc & GIO_PIN_CONF_OD_MASK)
+ gioPort->PDR |= pin_bit;
+ else
+ gioPort->PDR &= ~pin_bit;
+
+ if (pin_dsc & GIO_PIN_CONF_INIT_HIGH)
+ gioPort->DSET |= pin_bit;
+ else
+ gioPort->DCLR |= pin_bit;
+
+ if (pin_dsc & GIO_PIN_CONF_MODE_PTYPE_MASK)
+ gioPort->PSL |= pin_bit;
+ else
+ gioPort->PSL &= ~pin_bit;
+
+ if (pin_dsc & GIO_PIN_CONF_MODE_PEN_MASK)
+ gioPort->PULDIS |= pin_bit;
+ else
+ gioPort->PULDIS &= ~pin_bit;
+
+ if (pin_dsc & GIO_PIN_CONF_SET_DIR) {
+ if ((pin_dsc & GIO_PIN_CONF_DIR_MASK) ==
+ (GIO_PIN_CONF_DIR_OUT & GIO_PIN_CONF_DIR_MASK))
+ gioPort->DIR |= pin_bit;
+ else
+ gioPort->DIR &= ~pin_bit;
+ }
+}
--- /dev/null
+/*
+ * Copyright (C) 2015 Czech Technical University in Prague
+ *
+ * Authors:
+ * - Michal Sojka <sojkam1@fel.cvut.cz>
+ *
+ * This document contains proprietary information belonging to Czech
+ * Technical University in Prague. Passing on and copying of this
+ * document, and communication of its contents is not permitted
+ * without prior written authorization.
+ *
+ */
+
+#include "drv/gio_tab.h"
+
+const struct gio_pin gio_table[_PIN_COUNT] = {
+ #define GIO_PIN_DEF_GEN(name, port, pin, conf) { .pin_name = #name, .pin_dsc = GIO_PIN_DESC(GIO_PORT_##port, pin, conf) },
+ #include "drv/gio_def.h"
+ #undef GIO_PIN_DEF_GEN
+};
+
+int8_t port_gioset_get(const struct port_desc *port, void *values, size_t size)
+{
+ int i;
+ uint32_t val = 0;
+
+ if (size != sizeof(uint32_t) ||
+ port->numchn > 32 ||
+ port->bpch != 1)
+ return FAILURE;
+
+ for (i = 0; i < port->numchn; i++)
+ val |= gio_tab_get(port->cfg.gioset.pins[i]) ? (1 << i) : 0;
+
+ *(uint32_t*)values = val;
+ return SUCCESS;
+}
+
+int8_t port_gioset_set(const struct port_desc *port, void *values, size_t size)
+{
+ int i;
+
+ if (size != sizeof(uint32_t) ||
+ port->numchn > 32 ||
+ port->bpch != 1)
+ return FAILURE;
+
+ for (i = 0; i < port->numchn; i++)
+ gio_tab_set(port->cfg.gioset.pins[i], *(uint32_t*)values & (1 << i));
+
+ return SUCCESS;
+}
projects / pes-rpp / rpp-lib.git / commitdiff