1 /* Copyright (C) 2012-2013 Czech Technical University in Prague
4 * - Michal Horn <hornmich@fel.cvut.cz>
6 * This document contains proprietary information belonging to Czech
7 * Technical University in Prague. Passing on and copying of this
8 * document, and communication of its contents is not permitted
9 * without prior written authorization.
12 * This file contains gpio pins definitions
14 * On TMS570 MCU pins can operates as GIO on ports DMM, GIOA, GIOB,
15 * HET1 and HET2. Those pins, that are defined in this file, can be
16 * accessed directly as GPIO by hal_gpio_set_value and
17 * hal_gpio_get_value. Pin configuration can be modified by functions
18 * defined in hal_gpio_tms570 source and header files.
20 * NOTE: Although the configuration functions are implemented and
21 * should be ready to use, they were only slightly tested and are not
22 * used by the RPP software yet.
25 #include "drv/_rm48_hdk/digital_io_def.h"
26 #include "drv/digital_io.h"
28 #include "drv/_rm48_hdk/adc.h"
31 #define PORT_PIN(p,n,conf) (((p)<<DIO_PORT_SHIFT) | (n) | (conf))
33 #define PORT_CONF_GPIO_OUT_HI_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_HIGH|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
34 #define PORT_CONF_GPIO_OUT_LO_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
35 #define PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
36 #define PORT_CONF_GPIO_OUT_LO_PD_PEN_ODON DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_ON
37 #define PORT_CONF_GPIO_OUT_LO_PD_PDIS_ODON DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_ON
38 #define PORT_CONF_GPIO_OUT_LO_PD_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
39 #define PORT_CONF_GPIO_OUT_LO_PU_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_OUT|DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
40 #define PORT_CONF_GPIO_IN_HI_PU_PEN_ODON DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_HIGH|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_ON
41 #define PORT_CONF_GPIO_IN_HI_PU_PDIS_ODON DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_HIGH|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PU|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_ON
42 #define PORT_CONF_GPIO_IN_LO_PD_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
43 #define PORT_CONF_GPIO_IN_LO_PD_PEN_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PEN|DIO_PORT_CONF_OD_OFF
44 #define PORT_CONF_GPIO_IN_LO_PU_PDIS_ODOFF DIO_PORT_CONF_FNC_GPIO|DIO_PORT_CONF_INIT_LOW|DIO_PORT_CONF_DIR_IN|DIO_PORT_CONF_MODE_PD|DIO_PORT_CONF_MODE_PDIS|DIO_PORT_CONF_OD_OFF
46 /* Pin definition generators */
47 #define PIN_DSC_GIOA0 PORT_PIN(DIO_PORT_ID_GIOA, 0, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
48 #define PIN_DSC_GIOA1 PORT_PIN(DIO_PORT_ID_GIOA, 1, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
49 #define PIN_DSC_GIOA2 PORT_PIN(DIO_PORT_ID_GIOA, 2, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
50 #define PIN_DSC_GIOA3 PORT_PIN(DIO_PORT_ID_GIOA, 3, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
51 #define PIN_DSC_GIOA4 PORT_PIN(DIO_PORT_ID_GIOA, 4, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
52 #define PIN_DSC_GIOA5 PORT_PIN(DIO_PORT_ID_GIOA, 5, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
53 #define PIN_DSC_GIOA6 PORT_PIN(DIO_PORT_ID_GIOA, 6, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
54 #define PIN_DSC_GIOA7 PORT_PIN(DIO_PORT_ID_GIOA, 7, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
56 #define PIN_DSC_GIOB0 PORT_PIN(DIO_PORT_ID_GIOB, 0, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
57 #define PIN_DSC_GIOB1 PORT_PIN(DIO_PORT_ID_GIOB, 1, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
58 #define PIN_DSC_GIOB2 PORT_PIN(DIO_PORT_ID_GIOB, 2, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
59 #define PIN_DSC_GIOB3 PORT_PIN(DIO_PORT_ID_GIOB, 3, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
60 #define PIN_DSC_GIOB4 PORT_PIN(DIO_PORT_ID_GIOB, 4, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
61 #define PIN_DSC_GIOB5 PORT_PIN(DIO_PORT_ID_GIOB, 5, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
62 #define PIN_DSC_GIOB6 PORT_PIN(DIO_PORT_ID_GIOB, 6, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
63 #define PIN_DSC_GIOB7 PORT_PIN(DIO_PORT_ID_GIOB, 7, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
65 #define PIN_DSC_NHET1_0 PORT_PIN(DIO_PORT_ID_HET1, 0, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
66 #define PIN_DSC_NHET1_1 PORT_PIN(DIO_PORT_ID_HET1, 1, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
67 #define PIN_DSC_NHET1_2 PORT_PIN(DIO_PORT_ID_HET1, 2, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
68 #define PIN_DSC_NHET1_3 PORT_PIN(DIO_PORT_ID_HET1, 3, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
69 #define PIN_DSC_NHET1_4 PORT_PIN(DIO_PORT_ID_HET1, 4, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
70 #define PIN_DSC_NHET1_5 PORT_PIN(DIO_PORT_ID_HET1, 5, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
71 #define PIN_DSC_NHET1_6 PORT_PIN(DIO_PORT_ID_HET1, 6, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
72 #define PIN_DSC_NHET1_7 PORT_PIN(DIO_PORT_ID_HET1, 7, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
73 #define PIN_DSC_NHET1_8 PORT_PIN(DIO_PORT_ID_HET1, 8, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
74 #define PIN_DSC_NHET1_9 PORT_PIN(DIO_PORT_ID_HET1, 9, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
75 #define PIN_DSC_NHET1_10 PORT_PIN(DIO_PORT_ID_HET1, 10, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
76 #define PIN_DSC_NHET1_11 PORT_PIN(DIO_PORT_ID_HET1, 11, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
77 #define PIN_DSC_NHET1_12 PORT_PIN(DIO_PORT_ID_HET1, 12, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
78 #define PIN_DSC_NHET1_13 PORT_PIN(DIO_PORT_ID_HET1, 13, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
79 #define PIN_DSC_NHET1_14 PORT_PIN(DIO_PORT_ID_HET1, 14, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
80 #define PIN_DSC_NHET1_15 PORT_PIN(DIO_PORT_ID_HET1, 15, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
81 #define PIN_DSC_NHET1_16 PORT_PIN(DIO_PORT_ID_HET1, 16, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
82 #define PIN_DSC_NHET1_17 PORT_PIN(DIO_PORT_ID_HET1, 17, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
83 #define PIN_DSC_NHET1_18 PORT_PIN(DIO_PORT_ID_HET1, 18, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
84 #define PIN_DSC_NHET1_19 PORT_PIN(DIO_PORT_ID_HET1, 19, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
85 #define PIN_DSC_NHET1_20 PORT_PIN(DIO_PORT_ID_HET1, 20, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
86 #define PIN_DSC_NHET1_21 PORT_PIN(DIO_PORT_ID_HET1, 21, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
87 #define PIN_DSC_NHET1_22 PORT_PIN(DIO_PORT_ID_HET1, 22, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
88 #define PIN_DSC_NHET1_23 PORT_PIN(DIO_PORT_ID_HET1, 23, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
89 #define PIN_DSC_NHET1_24 PORT_PIN(DIO_PORT_ID_HET1, 24, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
90 #define PIN_DSC_NHET1_25 PORT_PIN(DIO_PORT_ID_HET1, 25, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
91 #define PIN_DSC_NHET1_26 PORT_PIN(DIO_PORT_ID_HET1, 26, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
92 #define PIN_DSC_NHET1_27 PORT_PIN(DIO_PORT_ID_HET1, 27, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
93 #define PIN_DSC_NHET1_28 PORT_PIN(DIO_PORT_ID_HET1, 28, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
94 #define PIN_DSC_NHET1_29 PORT_PIN(DIO_PORT_ID_HET1, 29, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
95 #define PIN_DSC_NHET1_30 PORT_PIN(DIO_PORT_ID_HET1, 30, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
96 #define PIN_DSC_NHET1_31 PORT_PIN(DIO_PORT_ID_HET1, 31, PORT_CONF_GPIO_OUT_LO_PU_PEN_ODOFF)
99 * Array of ports used as GPIO. Thanks to that array, we can
100 * determine port just by index in pin_desc at 5th bit */
101 gioPORT_t *dio_port_id_map[DIO_MAX_PORT_CNT] = {
102 (gioPORT_t *)dmmPORT,
103 (gioPORT_t *)gioPORTA,
104 (gioPORT_t *)gioPORTB,
105 (gioPORT_t *)hetPORT1,
106 (gioPORT_t *)hetPORT2
109 /* Some pins are commented out, because they are pinmuxed with SCI. */
111 * Map of pin names to pin descriptors. Each pin can be then easily
112 * found just by its name given as a string to hal_gpio_get_pin_dsc
114 dio_pin_map_element_t dio_pin_map[DIO_MAX_PIN_CNT] = {
115 { .pin_name = DIO_PIN_NAME_GIOA0, .pin_desc = PIN_DSC_GIOA0 },
116 { .pin_name = DIO_PIN_NAME_GIOA1, .pin_desc = PIN_DSC_GIOA1 },
117 { .pin_name = DIO_PIN_NAME_GIOA2, .pin_desc = PIN_DSC_GIOA2 },
118 { .pin_name = DIO_PIN_NAME_GIOA3, .pin_desc = PIN_DSC_GIOA3 },
119 { .pin_name = DIO_PIN_NAME_GIOA4, .pin_desc = PIN_DSC_GIOA4 },
120 { .pin_name = DIO_PIN_NAME_GIOA5, .pin_desc = PIN_DSC_GIOA5 },
121 { .pin_name = DIO_PIN_NAME_GIOA6, .pin_desc = PIN_DSC_GIOA6 },
122 { .pin_name = DIO_PIN_NAME_GIOA7, .pin_desc = PIN_DSC_GIOA7 },
123 { .pin_name = DIO_PIN_NAME_GIOB0, .pin_desc = PIN_DSC_GIOB0 },
124 { .pin_name = DIO_PIN_NAME_GIOB1, .pin_desc = PIN_DSC_GIOB1 },
125 { .pin_name = DIO_PIN_NAME_GIOB2, .pin_desc = PIN_DSC_GIOB2 },
126 { .pin_name = DIO_PIN_NAME_GIOB3, .pin_desc = PIN_DSC_GIOB3 },
127 { .pin_name = DIO_PIN_NAME_GIOB4, .pin_desc = PIN_DSC_GIOB4 },
128 { .pin_name = DIO_PIN_NAME_GIOB5, .pin_desc = PIN_DSC_GIOB5 },
129 { .pin_name = DIO_PIN_NAME_GIOB6, .pin_desc = PIN_DSC_GIOB6 },
130 { .pin_name = DIO_PIN_NAME_GIOB7, .pin_desc = PIN_DSC_GIOB7 },
131 { .pin_name = DIO_PIN_NAME_NHET1_0, .pin_desc = PIN_DSC_NHET1_0 },
132 { .pin_name = DIO_PIN_NAME_NHET1_1, .pin_desc = PIN_DSC_NHET1_1 },
133 { .pin_name = DIO_PIN_NAME_NHET1_2, .pin_desc = PIN_DSC_NHET1_2 },
134 { .pin_name = DIO_PIN_NAME_NHET1_3, .pin_desc = PIN_DSC_NHET1_3 },
135 { .pin_name = DIO_PIN_NAME_NHET1_4, .pin_desc = PIN_DSC_NHET1_4 },
136 { .pin_name = DIO_PIN_NAME_NHET1_5, .pin_desc = PIN_DSC_NHET1_5 },
137 /*{ .pin_name = DIO_PIN_NAME_NHET1_6, .pin_desc = PIN_DSC_NHET1_6 },*/
138 { .pin_name = DIO_PIN_NAME_NHET1_7, .pin_desc = PIN_DSC_NHET1_7 },
139 { .pin_name = DIO_PIN_NAME_NHET1_8, .pin_desc = PIN_DSC_NHET1_8 },
140 { .pin_name = DIO_PIN_NAME_NHET1_9, .pin_desc = PIN_DSC_NHET1_9 },
141 { .pin_name = DIO_PIN_NAME_NHET1_10, .pin_desc = PIN_DSC_NHET1_10 },
142 { .pin_name = DIO_PIN_NAME_NHET1_11, .pin_desc = PIN_DSC_NHET1_11 },
143 { .pin_name = DIO_PIN_NAME_NHET1_12, .pin_desc = PIN_DSC_NHET1_12 },
144 /*{ .pin_name = DIO_PIN_NAME_NHET1_13, .pin_desc = PIN_DSC_NHET1_13 },*/
145 { .pin_name = DIO_PIN_NAME_NHET1_14, .pin_desc = PIN_DSC_NHET1_14 },
146 { .pin_name = DIO_PIN_NAME_NHET1_15, .pin_desc = PIN_DSC_NHET1_15 },
147 { .pin_name = DIO_PIN_NAME_NHET1_16, .pin_desc = PIN_DSC_NHET1_16 },
148 { .pin_name = DIO_PIN_NAME_NHET1_17, .pin_desc = PIN_DSC_NHET1_17 },
149 { .pin_name = DIO_PIN_NAME_NHET1_18, .pin_desc = PIN_DSC_NHET1_18 },
150 { .pin_name = DIO_PIN_NAME_NHET1_19, .pin_desc = PIN_DSC_NHET1_19 },
151 { .pin_name = DIO_PIN_NAME_NHET1_20, .pin_desc = PIN_DSC_NHET1_20 },
152 { .pin_name = DIO_PIN_NAME_NHET1_21, .pin_desc = PIN_DSC_NHET1_21 },
153 { .pin_name = DIO_PIN_NAME_NHET1_22, .pin_desc = PIN_DSC_NHET1_22 },
154 { .pin_name = DIO_PIN_NAME_NHET1_23, .pin_desc = PIN_DSC_NHET1_23 },
155 { .pin_name = DIO_PIN_NAME_NHET1_24, .pin_desc = PIN_DSC_NHET1_24 },
156 { .pin_name = DIO_PIN_NAME_NHET1_25, .pin_desc = PIN_DSC_NHET1_25 },
157 { .pin_name = DIO_PIN_NAME_NHET1_26, .pin_desc = PIN_DSC_NHET1_26 },
158 { .pin_name = DIO_PIN_NAME_NHET1_27, .pin_desc = PIN_DSC_NHET1_27 },
159 { .pin_name = DIO_PIN_NAME_NHET1_28, .pin_desc = PIN_DSC_NHET1_28 },
160 { .pin_name = DIO_PIN_NAME_NHET1_29, .pin_desc = PIN_DSC_NHET1_29 },
161 { .pin_name = DIO_PIN_NAME_NHET1_30, .pin_desc = PIN_DSC_NHET1_30 },
162 { .pin_name = DIO_PIN_NAME_NHET1_31, .pin_desc = PIN_DSC_NHET1_31 },
163 /* FIXME: add definitions of all unused pins DMM, HET2, SCI... */
166 // FIXME Upper layer dependency/coupling
167 // Declared in drv/adc.h
168 extern uint32_t adc_get_port_val(uint32_t *config, uint32_t num_channels, uint32_t *values);
170 // Lists of pins assigned to the ports
171 static uint32_t port_cfg_gioa[] = {
172 PIN_DSC_GIOA0, PIN_DSC_GIOA1, PIN_DSC_GIOA2, PIN_DSC_GIOA3,
173 PIN_DSC_GIOA4, PIN_DSC_GIOA5, PIN_DSC_GIOA6, PIN_DSC_GIOA7
175 static uint32_t port_cfg_giob[] = {
176 PIN_DSC_GIOB0, PIN_DSC_GIOB1, PIN_DSC_GIOB2, PIN_DSC_GIOB3,
177 PIN_DSC_GIOB4, PIN_DSC_GIOB5, PIN_DSC_GIOB6, PIN_DSC_GIOB7
179 static uint32_t port_cfg_nhet1[] = {
180 PIN_DSC_NHET1_0, PIN_DSC_NHET1_1, PIN_DSC_NHET1_2,
181 PIN_DSC_NHET1_3, PIN_DSC_NHET1_4, PIN_DSC_NHET1_5,
182 PIN_DSC_NHET1_7, PIN_DSC_NHET1_8, PIN_DSC_NHET1_9,
183 PIN_DSC_NHET1_10, PIN_DSC_NHET1_11, PIN_DSC_NHET1_12,
184 PIN_DSC_NHET1_14, PIN_DSC_NHET1_15, PIN_DSC_NHET1_16,
185 PIN_DSC_NHET1_17, PIN_DSC_NHET1_18, PIN_DSC_NHET1_19,
186 PIN_DSC_NHET1_20, PIN_DSC_NHET1_21, PIN_DSC_NHET1_22,
187 PIN_DSC_NHET1_23, PIN_DSC_NHET1_24, PIN_DSC_NHET1_25,
188 PIN_DSC_NHET1_26, PIN_DSC_NHET1_27, PIN_DSC_NHET1_28,
189 PIN_DSC_NHET1_29, PIN_DSC_NHET1_30, PIN_DSC_NHET1_31
191 static uint32_t port_cfg_adc[] = { (uint32_t)adcREG1, adcGROUP1, 1 };
194 static dio_port_desc_t port_desc_gioa = {
195 .config = port_cfg_gioa,
197 .interfaceType = GPIO,
198 .port_getfnc_ptr = &dio_gpio_port_get_val,
199 .port_setfnc_ptr = &dio_gpio_port_set_val,
201 static dio_port_desc_t port_desc_giob = {
202 .config = port_cfg_giob,
204 .interfaceType = GPIO,
205 .port_getfnc_ptr = &dio_gpio_port_get_val,
206 .port_setfnc_ptr = &dio_gpio_port_set_val,
208 static dio_port_desc_t port_desc_nhet1 = {
209 .config = port_cfg_nhet1,
211 .interfaceType = GPIO,
212 .port_getfnc_ptr = &dio_gpio_port_get_val,
213 .port_setfnc_ptr = &dio_gpio_port_set_val,
215 static dio_port_desc_t port_desc_adc = {
216 .config = port_cfg_adc,
218 .interfaceType = ADC,
219 .port_getfnc_ptr = &adc_get_port_val,
220 .port_setfnc_ptr = ((void *)0),
224 // Maps of port names to port descriptors
225 dio_port_def_t dio_port_definition[DIO_PORT_CNT] = {
226 {.name = DIO_PORT_NAME_GIOA, .desc = &port_desc_gioa},
227 {.name = DIO_PORT_NAME_GIOB, .desc = &port_desc_giob},
228 {.name = DIO_PORT_NAME_NHET1, .desc = &port_desc_nhet1},
229 {.name = DIO_PORT_NAME_ADC, .desc = &port_desc_adc}