/*
* UIO driver fo Humusoft MF624 DAQ card.
- * Copyright (C) 2011 Rostislav Lisovy <lisovy@gmail.com>
- *
+ * Copyright (C) 2011 Rostislav Lisovy <lisovy@gmail.com>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
#define INTCSR_ADINT_STATUS (1 << 2)
#define INTCSR_CTR4INT_STATUS (1 << 5)
-typedef enum {ADC, CTR4, ALL} mf624_interrupt_source_t;
+enum mf624_interrupt_source {ADC, CTR4, ALL};
-void mf624_disable_interrupt(mf624_interrupt_source_t source, struct uio_info *info)
+void mf624_disable_interrupt(enum mf624_interrupt_source source,
+ struct uio_info *info)
{
- u32 *INTCSR_reg = ((u32*) info->mem[0].internal_addr) + INTCSR;
+ u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
switch (source) {
- case ADC:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
- INTCSR_reg);
- break;
- case CTR4:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
- case ALL:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
- default:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
+ case ADC:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
+ INTCSR_reg);
+ break;
+ case CTR4:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
+ INTCSR_reg);
+ break;
+ case ALL:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
+ INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ break;
+ default:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
+ INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ break;
}
}
-void mf624_enable_interrupt(mf624_interrupt_source_t source, struct uio_info *info)
+void mf624_enable_interrupt(enum mf624_interrupt_source source,
+ struct uio_info *info)
{
- u32 *INTCSR_reg = ((u32*) info->mem[0].internal_addr) + INTCSR;
+ u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
switch (source) {
- case ADC:
- iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE),
- INTCSR_reg);
- break;
- case CTR4:
- iowrite32(ioread32(INTCSR_reg) | (INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
- case ALL:
- iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
- default:
- iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
+ case ADC:
+ iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE),
+ INTCSR_reg);
+ break;
+ case CTR4:
+ iowrite32(ioread32(INTCSR_reg) | (INTCSR_CTR4INT_ENABLE),
+ INTCSR_reg);
+ break;
+ case ALL:
+ iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE |
+ INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ break;
+ default:
+ iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE |
+ INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ break;
}
}
static irqreturn_t mf624_irq_handler(int irq, struct uio_info *info)
{
- u32 *INTCSR_reg = ((u32*) info->mem[0].internal_addr) + INTCSR;
+ u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
- if (((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE) > 0)
- && ((ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS) > 0))
- {
- //disable interrupt
+ if (((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE) > 0)
+ && ((ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS) > 0)) {
+ /* disable interrupt */
mf624_disable_interrupt(ADC, info);
return IRQ_HANDLED;
}
- if (((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE) > 0)
- && ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS) > 0))
- {
- //disable interrupt
+ if (((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE) > 0)
+ && ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS) > 0)) {
+ /* disable interrupt */
mf624_disable_interrupt(CTR4, info);
return IRQ_HANDLED;
}
static int mf624_irqcontrol(struct uio_info *info, s32 irq_on)
{
- if (irq_on == 0) { // Disable interrupts
+ if (irq_on == 0) { /* Disable interrupts */
mf624_disable_interrupt(ALL, info);
- }
- else if (irq_on == 1) {
+ } else if (irq_on == 1) {
mf624_enable_interrupt(ALL, info);
}
}
static int __devinit mf624_pci_probe(struct pci_dev *dev,
- const struct pci_device_id *id)
+ const struct pci_device_id *id)
{
struct uio_info *info;
info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
if (!info)
return -ENOMEM;
-
+
if (pci_enable_device(dev))
goto out_free;
if (pci_request_regions(dev, "mf624"))
goto out_disable;
-
+
info->name = "mf624";
info->version = "0.0.1";
- // BAR0
- info->mem[0].name = "PCI chipset, interrupts, status bits, special functions";
+ /* BAR0 */
+ info->mem[0].name = "PCI chipset, interrupts, status "
+ "bits, special functions";
info->mem[0].addr = pci_resource_start(dev, 0);
if (!info->mem[0].addr)
goto out_release;
goto out_release;
- //BAR2
+ /* BAR2 */
info->mem[1].name = "ADC, DAC, DIO";
info->mem[1].addr = pci_resource_start(dev, 2);
if (!info->mem[1].addr)
goto out_release;
- //BAR4
+ /* BAR4 */
info->mem[2].name = "Counter/timer chip";
info->mem[2].addr = pci_resource_start(dev, 4);
if (!info->mem[2].addr)
if (!info->mem[2].internal_addr)
goto out_release;
-
+
info->irq = dev->irq;
info->irq_flags = IRQF_SHARED;
info->handler = mf624_irq_handler;
info->irqcontrol = mf624_irqcontrol;
- if(uio_register_device(&dev->dev, info))
+ if (uio_register_device(&dev->dev, info))
goto out_unmap;
pci_set_drvdata(dev, info);
static void mf624_pci_remove(struct pci_dev *dev)
{
struct uio_info *info = pci_get_drvdata(dev);
-
+
mf624_disable_interrupt(ALL, info);
-
+
uio_unregister_device(info);
pci_release_regions(dev);
pci_disable_device(dev);
static struct pci_driver mf624_pci_driver = {
.name = "mf624",
.id_table = mf624_pci_id,
- .probe = mf624_pci_probe,
+ .probe = mf624_pci_probe,
.remove = mf624_pci_remove,
};
MODULE_DEVICE_TABLE(pci, mf624_pci_driver);