- case ADC:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
- INTCSR_reg);
- break;
- case CTR4:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
- case ALL:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
- default:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
- INTCSR_reg);
- break;
+ case ADC:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
+ INTCSR_reg);
+ break;
+ case CTR4:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
+ INTCSR_reg);
+ break;
+ case ALL:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
+ INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ break;
+ default:
+ iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
+ INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ break;