#include <linux/kernel.h>
#include <linux/uio_driver.h>
-
#define PCI_VENDOR_ID_HUMUSOFT 0x186c
#define PCI_DEVICE_ID_MF624 0x0624
#define PCI_SUBVENDOR_ID_HUMUSOFT 0x186c
#define PCI_SUBDEVICE_DEVICE 0x0624
+/* BAR0 Interrupt control/status register */
#define INTCSR 0x4C
#define INTCSR_ADINT_ENABLE (1 << 0)
#define INTCSR_CTR4INT_ENABLE (1 << 3)
enum mf624_interrupt_source {ADC, CTR4, ALL};
-
void mf624_disable_interrupt(enum mf624_interrupt_source source,
- struct uio_info *info)
+ struct uio_info *info)
{
- u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
+ void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
switch (source) {
case ADC:
iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
INTCSR_reg);
break;
+
case CTR4:
iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
INTCSR_reg);
break;
+
case ALL:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
- INTCSR_CTR4INT_ENABLE), INTCSR_reg);
- break;
default:
- iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
- INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ iowrite32(ioread32(INTCSR_reg)
+ & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
+ INTCSR_reg);
break;
}
}
void mf624_enable_interrupt(enum mf624_interrupt_source source,
- struct uio_info *info)
+ struct uio_info *info)
{
- u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
+ void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
switch (source) {
case ADC:
iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE),
INTCSR_reg);
break;
+
case CTR4:
iowrite32(ioread32(INTCSR_reg) | (INTCSR_CTR4INT_ENABLE),
INTCSR_reg);
break;
+
case ALL:
- iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE |
- INTCSR_CTR4INT_ENABLE), INTCSR_reg);
- break;
default:
- iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE |
- INTCSR_CTR4INT_ENABLE), INTCSR_reg);
+ iowrite32(ioread32(INTCSR_reg)
+ | (INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
+ INTCSR_reg);
break;
}
}
{
u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
- if (((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE) > 0)
- && ((ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS) > 0)) {
- /* disable interrupt */
+ if ((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE)
+ && (ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS)) {
mf624_disable_interrupt(ADC, info);
return IRQ_HANDLED;
}
- if (((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE) > 0)
- && ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS) > 0)) {
- /* disable interrupt */
+ if ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE)
+ && (ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS)) {
mf624_disable_interrupt(CTR4, info);
return IRQ_HANDLED;
}
static int mf624_irqcontrol(struct uio_info *info, s32 irq_on)
{
- if (irq_on == 0) { /* Disable interrupts */
+ if (irq_on == 0)
mf624_disable_interrupt(ALL, info);
- } else if (irq_on == 1) {
+ else if (irq_on == 1)
mf624_enable_interrupt(ALL, info);
- }
return 0;
}
-static int __devinit mf624_pci_probe(struct pci_dev *dev,
- const struct pci_device_id *id)
+static int mf624_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
struct uio_info *info;
if (!info->mem[0].internal_addr)
goto out_release;
-
/* BAR2 */
info->mem[1].name = "ADC, DAC, DIO";
info->mem[1].addr = pci_resource_start(dev, 2);
if (!info->mem[1].addr)
- goto out_release;
+ goto out_unmap0;
info->mem[1].size = pci_resource_len(dev, 2);
info->mem[1].memtype = UIO_MEM_PHYS;
info->mem[1].internal_addr = pci_ioremap_bar(dev, 2);
if (!info->mem[1].internal_addr)
- goto out_release;
-
+ goto out_unmap0;
/* BAR4 */
info->mem[2].name = "Counter/timer chip";
info->mem[2].addr = pci_resource_start(dev, 4);
if (!info->mem[2].addr)
- goto out_release;
+ goto out_unmap1;
info->mem[2].size = pci_resource_len(dev, 4);
info->mem[2].memtype = UIO_MEM_PHYS;
info->mem[2].internal_addr = pci_ioremap_bar(dev, 4);
if (!info->mem[2].internal_addr)
- goto out_release;
-
+ goto out_unmap1;
info->irq = dev->irq;
info->irq_flags = IRQF_SHARED;
info->irqcontrol = mf624_irqcontrol;
if (uio_register_device(&dev->dev, info))
- goto out_unmap;
+ goto out_unmap2;
pci_set_drvdata(dev, info);
return 0;
-
-out_unmap:
- iounmap(info->mem[0].internal_addr);
- iounmap(info->mem[1].internal_addr);
+out_unmap2:
iounmap(info->mem[2].internal_addr);
+out_unmap1:
+ iounmap(info->mem[1].internal_addr);
+out_unmap0:
+ iounmap(info->mem[0].internal_addr);
+
out_release:
pci_release_regions(dev);
+
out_disable:
pci_disable_device(dev);
+
out_free:
kfree(info);
return -ENODEV;
};
MODULE_DEVICE_TABLE(pci, mf624_pci_id);
-static int __init mf624_init_module(void)
-{
- return pci_register_driver(&mf624_pci_driver);
-}
-
-static void __exit mf624_exit_module(void)
-{
- pci_unregister_driver(&mf624_pci_driver);
-}
-
-module_init(mf624_init_module);
-module_exit(mf624_exit_module);
-
+module_pci_driver(mf624_pci_driver);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");