2 * UIO driver fo Humusoft MF624 DAQ card.
3 * Copyright (C) 2011 Rostislav Lisovy <lisovy@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/device.h>
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/uio_driver.h>
29 #define PCI_VENDOR_ID_HUMUSOFT 0x186c
30 #define PCI_DEVICE_ID_MF624 0x0624
31 #define PCI_SUBVENDOR_ID_HUMUSOFT 0x186c
32 #define PCI_SUBDEVICE_DEVICE 0x0624
34 /* BAR0 Interrupt control/status register */
36 #define INTCSR_ADINT_ENABLE (1 << 0)
37 #define INTCSR_CTR4INT_ENABLE (1 << 3)
38 #define INTCSR_PCIINT_ENABLE (1 << 6)
39 #define INTCSR_ADINT_STATUS (1 << 2)
40 #define INTCSR_CTR4INT_STATUS (1 << 5)
42 enum mf624_interrupt_source {ADC, CTR4, ALL};
44 void mf624_disable_interrupt(enum mf624_interrupt_source source,
45 struct uio_info *info)
47 void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
51 iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
56 iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
62 iowrite32(ioread32(INTCSR_reg)
63 & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
69 void mf624_enable_interrupt(enum mf624_interrupt_source source,
70 struct uio_info *info)
72 void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
76 iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE),
81 iowrite32(ioread32(INTCSR_reg) | (INTCSR_CTR4INT_ENABLE),
87 iowrite32(ioread32(INTCSR_reg)
88 | (INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE),
94 static irqreturn_t mf624_irq_handler(int irq, struct uio_info *info)
96 u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
98 if ((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE)
99 && (ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS)) {
100 mf624_disable_interrupt(ADC, info);
104 if ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE)
105 && (ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS)) {
106 mf624_disable_interrupt(CTR4, info);
113 static int mf624_irqcontrol(struct uio_info *info, s32 irq_on)
116 mf624_disable_interrupt(ALL, info);
117 else if (irq_on == 1)
118 mf624_enable_interrupt(ALL, info);
123 static int mf624_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
125 struct uio_info *info;
127 info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
131 if (pci_enable_device(dev))
134 if (pci_request_regions(dev, "mf624"))
137 info->name = "mf624";
138 info->version = "0.0.1";
141 info->mem[0].name = "PCI chipset, interrupts, status "
142 "bits, special functions";
143 info->mem[0].addr = pci_resource_start(dev, 0);
144 if (!info->mem[0].addr)
146 info->mem[0].size = pci_resource_len(dev, 0);
147 info->mem[0].memtype = UIO_MEM_PHYS;
148 info->mem[0].internal_addr = pci_ioremap_bar(dev, 0);
149 if (!info->mem[0].internal_addr)
153 info->mem[1].name = "ADC, DAC, DIO";
154 info->mem[1].addr = pci_resource_start(dev, 2);
155 if (!info->mem[1].addr)
157 info->mem[1].size = pci_resource_len(dev, 2);
158 info->mem[1].memtype = UIO_MEM_PHYS;
159 info->mem[1].internal_addr = pci_ioremap_bar(dev, 2);
160 if (!info->mem[1].internal_addr)
164 info->mem[2].name = "Counter/timer chip";
165 info->mem[2].addr = pci_resource_start(dev, 4);
166 if (!info->mem[2].addr)
168 info->mem[2].size = pci_resource_len(dev, 4);
169 info->mem[2].memtype = UIO_MEM_PHYS;
170 info->mem[2].internal_addr = pci_ioremap_bar(dev, 4);
171 if (!info->mem[2].internal_addr)
174 info->irq = dev->irq;
175 info->irq_flags = IRQF_SHARED;
176 info->handler = mf624_irq_handler;
178 info->irqcontrol = mf624_irqcontrol;
180 if (uio_register_device(&dev->dev, info))
183 pci_set_drvdata(dev, info);
188 iounmap(info->mem[2].internal_addr);
190 iounmap(info->mem[1].internal_addr);
192 iounmap(info->mem[0].internal_addr);
195 pci_release_regions(dev);
198 pci_disable_device(dev);
205 static void mf624_pci_remove(struct pci_dev *dev)
207 struct uio_info *info = pci_get_drvdata(dev);
209 mf624_disable_interrupt(ALL, info);
211 uio_unregister_device(info);
212 pci_release_regions(dev);
213 pci_disable_device(dev);
214 pci_set_drvdata(dev, NULL);
216 iounmap(info->mem[0].internal_addr);
217 iounmap(info->mem[1].internal_addr);
218 iounmap(info->mem[2].internal_addr);
223 static DEFINE_PCI_DEVICE_TABLE(mf624_pci_id) = {
224 { PCI_DEVICE(PCI_VENDOR_ID_HUMUSOFT, PCI_DEVICE_ID_MF624) },
228 static struct pci_driver mf624_pci_driver = {
230 .id_table = mf624_pci_id,
231 .probe = mf624_pci_probe,
232 .remove = mf624_pci_remove,
234 MODULE_DEVICE_TABLE(pci, mf624_pci_id);
236 module_pci_driver(mf624_pci_driver);
237 MODULE_LICENSE("GPL v2");
238 MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");