This converts three devices because apic and ioapic are subclasses of sysbus.
Converting subclasses independently of their base class is prohibitively hard.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
}
};
-static SysBusDeviceInfo a9mp_priv_info = {
- .init = a9mp_priv_init,
- .qdev.name = "a9mpcore_priv",
- .qdev.size = sizeof(a9mp_priv_state),
- .qdev.vmsd = &vmstate_a9mp_priv,
- .qdev.reset = a9mp_priv_reset,
- .qdev.props = (Property[]) {
+static void a9mp_priv_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = a9mp_priv_init;
+}
+
+static DeviceInfo a9mp_priv_info = {
+ .name = "a9mpcore_priv",
+ .size = sizeof(a9mp_priv_state),
+ .vmsd = &vmstate_a9mp_priv,
+ .reset = a9mp_priv_reset,
+ .class_init = a9mp_priv_class_init,
+ .props = (Property[]) {
DEFINE_PROP_UINT32("num-cpu", a9mp_priv_state, num_cpu, 1),
/* The Cortex-A9MP may have anything from 0 to 224 external interrupt
* IRQ lines (with another 32 internal). We default to 64+32, which
return 0;
}
-static SysBusDeviceInfo typhoon_pcihost_info = {
- .init = typhoon_pcihost_init,
- .qdev.name = "typhoon-pcihost",
- .qdev.size = sizeof(TyphoonState),
- .qdev.no_user = 1
+static void typhoon_pcihost_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = typhoon_pcihost_init;
+}
+
+static DeviceInfo typhoon_pcihost_info = {
+ .name = "typhoon-pcihost",
+ .size = sizeof(TyphoonState),
+ .no_user = 1,
+ .class_init = typhoon_pcihost_class_init,
};
static void typhoon_register(void)
.class_init = pbm_pci_host_class_init,
};
-static SysBusDeviceInfo pbm_host_info = {
- .qdev.name = "pbm",
- .qdev.size = sizeof(APBState),
- .qdev.reset = pci_pbm_reset,
- .init = pci_pbm_init_device,
+static void pbm_host_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pci_pbm_init_device;
+}
+
+static DeviceInfo pbm_host_info = {
+ .name = "pbm",
+ .size = sizeof(APBState),
+ .reset = pci_pbm_reset,
+ .class_init = pbm_host_class_init,
};
static void pbm_pci_bridge_class_init(ObjectClass *klass, void *data)
local_apics[s->idx] = s;
}
-static APICCommonInfo apic_info = {
- .busdev.qdev.name = "apic",
- .init = apic_init,
- .set_base = apic_set_base,
- .set_tpr = apic_set_tpr,
- .external_nmi = apic_external_nmi,
- .post_load = apic_post_load,
+static void apic_class_init(ObjectClass *klass, void *data)
+{
+ APICCommonClass *k = APIC_COMMON_CLASS(klass);
+
+ k->init = apic_init;
+ k->set_base = apic_set_base;
+ k->set_tpr = apic_set_tpr;
+ k->external_nmi = apic_external_nmi;
+ k->post_load = apic_post_load;
+}
+
+static DeviceInfo apic_info = {
+ .name = "apic",
+ .class_init = apic_class_init,
};
static void apic_register_devices(void)
void cpu_set_apic_base(DeviceState *d, uint64_t val)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- APICCommonInfo *info;
-
trace_cpu_set_apic_base(val);
- if (s) {
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
+ if (d) {
+ APICCommonState *s = APIC_COMMON(d);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
info->set_base(s, val);
}
}
uint64_t cpu_get_apic_base(DeviceState *d)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
-
- trace_cpu_get_apic_base(s ? (uint64_t)s->apicbase : 0);
-
- return s ? s->apicbase : 0;
+ if (d) {
+ APICCommonState *s = APIC_COMMON(d);
+ trace_cpu_get_apic_base((uint64_t)s->apicbase);
+ return s->apicbase;
+ } else {
+ trace_cpu_get_apic_base(0);
+ return 0;
+ }
}
void cpu_set_apic_tpr(DeviceState *d, uint8_t val)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- APICCommonInfo *info;
+ APICCommonState *s;
+ APICCommonClass *info;
- if (s) {
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
- info->set_tpr(s, val);
+ if (!d) {
+ return;
}
+
+ s = APIC_COMMON(d);
+ info = APIC_COMMON_GET_CLASS(s);
+
+ info->set_tpr(s, val);
}
uint8_t cpu_get_apic_tpr(DeviceState *d)
void apic_deliver_nmi(DeviceState *d)
{
- APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
- APICCommonInfo *info;
+ APICCommonState *s = APIC_COMMON(d);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
info->external_nmi(s);
}
static int apic_init_common(SysBusDevice *dev)
{
- APICCommonState *s = FROM_SYSBUS(APICCommonState, dev);
- APICCommonInfo *info;
+ APICCommonState *s = APIC_COMMON(dev);
+ APICCommonClass *info;
static int apic_no;
if (apic_no >= MAX_APICS) {
}
s->idx = apic_no++;
- info = DO_UPCAST(APICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
+ info = APIC_COMMON_GET_CLASS(s);
info->init(s);
sysbus_init_mmio(&s->busdev, &s->io_memory);
static int apic_dispatch_post_load(void *opaque, int version_id)
{
- APICCommonState *s = opaque;
- APICCommonInfo *info =
- DO_UPCAST(APICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
+ APICCommonState *s = APIC_COMMON(opaque);
+ APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
if (info->post_load) {
info->post_load(s);
DEFINE_PROP_END_OF_LIST(),
};
+static void apic_common_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sc->init = apic_init_common;
+}
-void apic_qdev_register(APICCommonInfo *info)
+static TypeInfo apic_common_type = {
+ .name = TYPE_APIC_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(APICCommonState),
+ .class_size = sizeof(APICCommonClass),
+ .class_init = apic_common_class_init,
+ .abstract = true,
+};
+
+void apic_qdev_register(DeviceInfo *info)
{
- info->busdev.init = apic_init_common;
- info->busdev.qdev.size = sizeof(APICCommonState),
- info->busdev.qdev.vmsd = &vmstate_apic_common;
- info->busdev.qdev.reset = apic_reset_common;
- info->busdev.qdev.no_user = 1;
- info->busdev.qdev.props = apic_properties_common;
- sysbus_register_withprop(&info->busdev);
+ info->size = sizeof(APICCommonState),
+ info->vmsd = &vmstate_apic_common;
+ info->reset = apic_reset_common;
+ info->no_user = 1;
+ info->props = apic_properties_common;
+ sysbus_qdev_register_subclass(info, TYPE_APIC_COMMON);
}
+
+static void register_devices(void)
+{
+ type_register_static(&apic_common_type);
+}
+
+device_init(register_devices);
typedef struct APICCommonState APICCommonState;
+#define TYPE_APIC_COMMON "apic-common"
+#define APIC_COMMON(obj) \
+ OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON)
+#define APIC_COMMON_CLASS(klass) \
+ OBJECT_CLASS_CHECK(APICCommonClass, (klass), TYPE_APIC_COMMON)
+#define APIC_COMMON_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON)
+
+typedef struct APICCommonClass
+{
+ SysBusDeviceClass parent_class;
+
+ void (*init)(APICCommonState *s);
+ void (*set_base)(APICCommonState *s, uint64_t val);
+ void (*set_tpr)(APICCommonState *s, uint8_t val);
+ void (*external_nmi)(APICCommonState *s);
+ void (*post_load)(APICCommonState *s);
+} APICCommonClass;
+
struct APICCommonState {
SysBusDevice busdev;
MemoryRegion io_memory;
int wait_for_sipi;
};
-typedef struct APICCommonInfo APICCommonInfo;
-
-struct APICCommonInfo {
- SysBusDeviceInfo busdev;
- void (*init)(APICCommonState *s);
- void (*set_base)(APICCommonState *s, uint64_t val);
- void (*set_tpr)(APICCommonState *s, uint8_t val);
- void (*external_nmi)(APICCommonState *s);
- void (*post_load)(APICCommonState *s);
-};
-
void apic_report_irq_delivered(int delivered);
-void apic_qdev_register(APICCommonInfo *info);
+void apic_qdev_register(DeviceInfo *info);
bool apic_next_timer(APICCommonState *s, int64_t current_time);
#endif /* !QEMU_APIC_INTERNAL_H */
return 0;
}
-static SysBusDeviceInfo mpcore_rirq_info = {
- .init = realview_mpcore_init,
- .qdev.name = "realview_mpcore",
- .qdev.size = sizeof(mpcore_rirq_state),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property mpcore_rirq_properties[] = {
+ DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1),
+ /* The ARM11 MPCORE TRM says the on-chip controller may have
+ * anything from 0 to 224 external interrupt IRQ lines (with another
+ * 32 internal). We default to 32+32, which is the number provided by
+ * the ARM11 MPCore test chip in the Realview Versatile Express
+ * coretile. Other boards may differ and should set this property
+ * appropriately. Some Linux kernels may not boot if the hardware
+ * has more IRQ lines than the kernel expects.
+ */
+ DEFINE_PROP_UINT32("num-irq", mpcore_priv_state, num_irq, 64),
+ DEFINE_PROP_END_OF_LIST(),
};
-static SysBusDeviceInfo mpcore_priv_info = {
- .init = mpcore_priv_init,
- .qdev.name = "arm11mpcore_priv",
- .qdev.size = sizeof(mpcore_priv_state),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1),
- /* The ARM11 MPCORE TRM says the on-chip controller may have
- * anything from 0 to 224 external interrupt IRQ lines (with another
- * 32 internal). We default to 32+32, which is the number provided by
- * the ARM11 MPCore test chip in the Realview Versatile Express
- * coretile. Other boards may differ and should set this property
- * appropriately. Some Linux kernels may not boot if the hardware
- * has more IRQ lines than the kernel expects.
- */
- DEFINE_PROP_UINT32("num-irq", mpcore_priv_state, num_irq, 64),
- DEFINE_PROP_END_OF_LIST(),
- }
+static void mpcore_rirq_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = realview_mpcore_init;
+}
+
+static DeviceInfo mpcore_rirq_info = {
+ .name = "realview_mpcore",
+ .size = sizeof(mpcore_rirq_state),
+ .props = mpcore_rirq_properties,
+ .class_init = mpcore_rirq_class_init,
+};
+
+static Property mpcore_priv_properties[] = {
+ DEFINE_PROP_UINT32("num-cpu", mpcore_priv_state, num_cpu, 1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void mpcore_priv_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mpcore_priv_init;
+}
+
+static DeviceInfo mpcore_priv_info = {
+ .name = "arm11mpcore_priv",
+ .size = sizeof(mpcore_priv_state),
+ .props = mpcore_priv_properties,
+ .class_init = mpcore_priv_class_init,
};
static void arm11mpcore_register_devices(void)
return 0;
}
-static SysBusDeviceInfo l2x0_info = {
- .init = l2x0_priv_init,
- .qdev.name = "l2x0",
- .qdev.size = sizeof(l2x0_state),
- .qdev.vmsd = &vmstate_l2x0,
- .qdev.no_user = 1,
- .qdev.props = (Property[]) {
+static void l2x0_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = l2x0_priv_init;
+}
+
+static DeviceInfo l2x0_info = {
+ .name = "l2x0",
+ .size = sizeof(l2x0_state),
+ .vmsd = &vmstate_l2x0,
+ .no_user = 1,
+ .props = (Property[]) {
DEFINE_PROP_UINT32("type", l2x0_state, cache_type, 0x1c100100),
DEFINE_PROP_END_OF_LIST(),
},
- .qdev.reset = l2x0_priv_reset,
+ .reset = l2x0_priv_reset,
+ .class_init = l2x0_class_init,
};
static void l2x0_register_device(void)
{
- sysbus_register_withprop(&l2x0_info);
+ sysbus_qdev_register(&l2x0_info);
}
device_init(l2x0_register_device)
}
};
-static SysBusDeviceInfo arm_mptimer_info = {
- .init = arm_mptimer_init,
- .qdev.name = "arm_mptimer",
- .qdev.size = sizeof(arm_mptimer_state),
- .qdev.vmsd = &vmstate_arm_mptimer,
- .qdev.reset = arm_mptimer_reset,
- .qdev.no_user = 1,
- .qdev.props = (Property[]) {
+static void arm_mptimer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = arm_mptimer_init;
+}
+
+static DeviceInfo arm_mptimer_info = {
+ .name = "arm_mptimer",
+ .size = sizeof(arm_mptimer_state),
+ .vmsd = &vmstate_arm_mptimer,
+ .reset = arm_mptimer_reset,
+ .no_user = 1,
+ .class_init = arm_mptimer_class_init,
+ .props = (Property[]) {
DEFINE_PROP_UINT32("num-cpu", arm_mptimer_state, num_cpu, 0),
DEFINE_PROP_END_OF_LIST()
}
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
}
-static SysBusDeviceInfo arm_sysctl_info = {
- .init = arm_sysctl_init1,
- .qdev.name = "realview_sysctl",
- .qdev.size = sizeof(arm_sysctl_state),
- .qdev.vmsd = &vmstate_arm_sysctl,
- .qdev.reset = arm_sysctl_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
- DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property arm_sysctl_properties[] = {
+ DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
+ DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void arm_sysctl_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = arm_sysctl_init1;
+}
+
+static DeviceInfo arm_sysctl_info = {
+ .name = "realview_sysctl",
+ .size = sizeof(arm_sysctl_state),
+ .vmsd = &vmstate_arm_sysctl,
+ .reset = arm_sysctl_reset,
+ .props = arm_sysctl_properties,
+ .class_init = arm_sysctl_class_init,
};
static void arm_sysctl_register_devices(void)
return 0;
}
-static SysBusDeviceInfo sp804_info = {
- .init = sp804_init,
- .qdev.name = "sp804",
- .qdev.size = sizeof(sp804_state),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("freq0", sp804_state, freq0, 1000000),
- DEFINE_PROP_UINT32("freq1", sp804_state, freq1, 1000000),
- DEFINE_PROP_END_OF_LIST(),
- }
-};
-
/* Integrator/CP timer module. */
typedef struct {
return 0;
}
+static void icp_pit_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = icp_pit_init;
+}
+
+static DeviceInfo icp_pit_info = {
+ .name = "integrator_pit",
+ .size = sizeof(icp_pit_state),
+ .class_init = icp_pit_class_init,
+};
+
+static void sp804_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = sp804_init;
+}
+
+static DeviceInfo sp804_info = {
+ .name = "sp804",
+ .size = sizeof(sp804_state),
+ .class_init = sp804_class_init,
+ .props = (Property[]) {
+ DEFINE_PROP_UINT32("freq0", sp804_state, freq0, 1000000),
+ DEFINE_PROP_UINT32("freq1", sp804_state, freq1, 1000000),
+ DEFINE_PROP_END_OF_LIST(),
+ }
+};
+
static void arm_timer_register_devices(void)
{
- sysbus_register_dev("integrator_pit", sizeof(icp_pit_state), icp_pit_init);
- sysbus_register_withprop(&sp804_info);
+ sysbus_qdev_register(&icp_pit_info);
+ sysbus_qdev_register(&sp804_info);
}
device_init(arm_timer_register_devices)
return pic;
}
-static SysBusDeviceInfo bitband_info = {
- .init = bitband_init,
- .qdev.name = "ARM,bitband-memory",
- .qdev.size = sizeof(BitBandState),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("base", BitBandState, base, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property bitband_properties[] = {
+ DEFINE_PROP_UINT32("base", BitBandState, base, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void bitband_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = bitband_init;
+}
+
+static DeviceInfo bitband_info = {
+ .name = "ARM,bitband-memory",
+ .size = sizeof(BitBandState),
+ .props = bitband_properties,
+ .class_init = bitband_class_init,
};
static void armv7m_register_devices(void)
return 0;
}
-static SysBusDeviceInfo armv7m_nvic_priv_info = {
- .init = armv7m_nvic_init,
- .qdev.name = "armv7m_nvic",
- .qdev.size = sizeof(nvic_state),
- .qdev.vmsd = &vmstate_nvic,
- .qdev.props = (Property[]) {
+static void armv7m_nvic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = armv7m_nvic_init;
+}
+
+static DeviceInfo armv7m_nvic_priv_info = {
+ .name = "armv7m_nvic",
+ .size = sizeof(nvic_state),
+ .vmsd = &vmstate_nvic,
+ .class_init = armv7m_nvic_class_init,
+ .props = (Property[]) {
/* The ARM v7m may have anything from 0 to 496 external interrupt
* IRQ lines. We default to 64. Other boards may differ and should
* set this property appropriately.
static void armv7m_nvic_register_devices(void)
{
- sysbus_register_withprop(&armv7m_nvic_priv_info);
+ sysbus_qdev_register(&armv7m_nvic_priv_info);
}
device_init(armv7m_nvic_register_devices)
return 0;
}
-static SysBusDeviceInfo gpio_i2c_info = {
- .init = gpio_i2c_init,
- .qdev.name = "gpio_i2c",
- .qdev.desc = "Virtual GPIO to I2C bridge",
- .qdev.size = sizeof(GPIOI2CState),
+static void gpio_i2c_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = gpio_i2c_init;
+}
+
+static DeviceInfo gpio_i2c_info = {
+ .name = "gpio_i2c",
+ .desc = "Virtual GPIO to I2C bridge",
+ .size = sizeof(GPIOI2CState),
+ .class_init = gpio_i2c_class_init,
};
static void bitbang_i2c_register(void)
.class_init = bonito_class_init,
};
-static SysBusDeviceInfo bonito_pcihost_info = {
- .init = bonito_pcihost_initfn,
- .qdev.name = "Bonito-pcihost",
- .qdev.size = sizeof(BonitoState),
- .qdev.no_user = 1,
+static void bonito_pcihost_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = bonito_pcihost_initfn;
+}
+
+static DeviceInfo bonito_pcihost_info = {
+ .name = "Bonito-pcihost",
+ .size = sizeof(BonitoState),
+ .no_user = 1,
+ .class_init = bonito_pcihost_class_init,
};
static void bonito_register(void)
return 0;
}
-static SysBusDeviceInfo container_info = {
- .init = container_initfn,
- .qdev.name = "container",
- .qdev.size = sizeof(SysBusDevice),
- .qdev.no_user = 1,
+static void container_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = container_initfn;
+}
+
+static DeviceInfo container_info = {
+ .name = "container",
+ .size = sizeof(SysBusDevice),
+ .no_user = 1,
+ .class_init = container_class_init,
};
static void container_init(void)
return 0;
}
-static SysBusDeviceInfo cs4231_info = {
- .init = cs4231_init1,
- .qdev.name = "SUNW,CS4231",
- .qdev.size = sizeof(CSState),
- .qdev.vmsd = &vmstate_cs4231,
- .qdev.reset = cs_reset,
- .qdev.props = (Property[]) {
- {.name = NULL}
- }
+static Property cs4231_properties[] = {
+ {.name = NULL},
+};
+
+static void cs4231_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = cs4231_init1;
+}
+
+static DeviceInfo cs4231_info = {
+ .name = "SUNW,CS4231",
+ .size = sizeof(CSState),
+ .vmsd = &vmstate_cs4231,
+ .reset = cs_reset,
+ .props = cs4231_properties,
+ .class_init = cs4231_class_init,
};
static void cs4231_register_devices(void)
return pci_bridge_get_sec_bus(br);
}
-static int pci_dec_21154_init_device(SysBusDevice *dev)
+static int pci_dec_21154_device_init(SysBusDevice *dev)
{
DECState *s;
.class_init = dec_21154_pci_host_class_init,
};
-static void dec_register_devices(void)
+static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
{
- sysbus_register_dev("dec-21154", sizeof(DECState),
- pci_dec_21154_init_device);
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pci_dec_21154_device_init;
+}
+
+static DeviceInfo pci_dec_21154_device_info = {
+ .name = "dec-21154",
+ .size = sizeof(DECState),
+ .class_init = pci_dec_21154_device_class_init,
+};
+static void dec_register_devices(void)
+{
+ sysbus_qdev_register(&pci_dec_21154_device_info);
pci_qdev_register(&dec_21154_pci_host_info);
pci_qdev_register(&dec_21154_pci_bridge_info);
}
return 0;
}
-static SysBusDeviceInfo nvram_sysbus_info = {
- .qdev.name = "ds1225y",
- .qdev.size = sizeof(SysBusNvRamState),
- .qdev.vmsd = &vmstate_nvram,
- .init = nvram_sysbus_initfn,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
- DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property nvram_sysbus_properties[] = {
+ DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
+ DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void nvram_sysbus_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = nvram_sysbus_initfn;
+}
+
+static DeviceInfo nvram_sysbus_info = {
+ .name = "ds1225y",
+ .size = sizeof(SysBusNvRamState),
+ .vmsd = &vmstate_nvram,
+ .props = nvram_sysbus_properties,
+ .class_init = nvram_sysbus_class_init,
};
static void nvram_register(void)
return 0;
}
-static SysBusDeviceInfo ecc_info = {
- .init = ecc_init1,
- .qdev.name = "eccmemctl",
- .qdev.size = sizeof(ECCState),
- .qdev.vmsd = &vmstate_ecc,
- .qdev.reset = ecc_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_HEX32("version", ECCState, version, -1),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ecc_properties[] = {
+ DEFINE_PROP_HEX32("version", ECCState, version, -1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ecc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = ecc_init1;
+}
+
+static DeviceInfo ecc_info = {
+ .name = "eccmemctl",
+ .size = sizeof(ECCState),
+ .vmsd = &vmstate_ecc,
+ .reset = ecc_reset,
+ .props = ecc_properties,
+ .class_init = ecc_class_init,
};
return 0;
}
-static SysBusDeviceInfo empty_slot_info = {
- .init = empty_slot_init1,
- .qdev.name = "empty_slot",
- .qdev.size = sizeof(EmptySlot),
+static void empty_slot_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = empty_slot_init1;
+}
+
+static DeviceInfo empty_slot_info = {
+ .name = "empty_slot",
+ .size = sizeof(EmptySlot),
+ .class_init = empty_slot_class_init,
};
static void empty_slot_register_devices(void)
return 0;
}
-static SysBusDeviceInfo escc_info = {
- .init = escc_init1,
- .qdev.name = "escc",
- .qdev.size = sizeof(SerialState),
- .qdev.vmsd = &vmstate_escc,
- .qdev.reset = escc_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("frequency", SerialState, frequency, 0),
- DEFINE_PROP_UINT32("it_shift", SerialState, it_shift, 0),
- DEFINE_PROP_UINT32("disabled", SerialState, disabled, 0),
- DEFINE_PROP_UINT32("disabled", SerialState, disabled, 0),
- DEFINE_PROP_UINT32("chnBtype", SerialState, chn[0].type, 0),
- DEFINE_PROP_UINT32("chnAtype", SerialState, chn[1].type, 0),
- DEFINE_PROP_CHR("chrB", SerialState, chn[0].chr),
- DEFINE_PROP_CHR("chrA", SerialState, chn[1].chr),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property escc_properties[] = {
+ DEFINE_PROP_UINT32("frequency", SerialState, frequency, 0),
+ DEFINE_PROP_UINT32("it_shift", SerialState, it_shift, 0),
+ DEFINE_PROP_UINT32("disabled", SerialState, disabled, 0),
+ DEFINE_PROP_UINT32("disabled", SerialState, disabled, 0),
+ DEFINE_PROP_UINT32("chnBtype", SerialState, chn[0].type, 0),
+ DEFINE_PROP_UINT32("chnAtype", SerialState, chn[1].type, 0),
+ DEFINE_PROP_CHR("chrB", SerialState, chn[0].chr),
+ DEFINE_PROP_CHR("chrA", SerialState, chn[1].chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void escc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = escc_init1;
+}
+
+static DeviceInfo escc_info = {
+ .name = "escc",
+ .size = sizeof(SerialState),
+ .vmsd = &vmstate_escc,
+ .reset = escc_reset,
+ .props = escc_properties,
+ .class_init = escc_class_init,
};
static void escc_register_devices(void)
return scsi_bus_legacy_handle_cmdline(&s->bus);
}
-static SysBusDeviceInfo esp_info = {
- .init = esp_init1,
- .qdev.name = "esp",
- .qdev.size = sizeof(ESPState),
- .qdev.vmsd = &vmstate_esp,
- .qdev.reset = esp_hard_reset,
- .qdev.props = (Property[]) {
- {.name = NULL}
- }
+static Property esp_properties[] = {
+ {.name = NULL},
+};
+
+static void esp_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = esp_init1;
+}
+
+static DeviceInfo esp_info = {
+ .name = "esp",
+ .size = sizeof(ESPState),
+ .vmsd = &vmstate_esp,
+ .reset = esp_hard_reset,
+ .props = esp_properties,
+ .class_init = esp_class_init,
};
static void esp_register_devices(void)
return 0;
}
-static SysBusDeviceInfo etraxfs_eth_info = {
- .init = fs_eth_init,
- .qdev.name = "etraxfs-eth",
- .qdev.size = sizeof(struct fs_eth),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("phyaddr", struct fs_eth, phyaddr, 1),
- DEFINE_PROP_PTR("dma_out", struct fs_eth, vdma_out),
- DEFINE_PROP_PTR("dma_in", struct fs_eth, vdma_in),
- DEFINE_NIC_PROPERTIES(struct fs_eth, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property etraxfs_eth_properties[] = {
+ DEFINE_PROP_UINT32("phyaddr", struct fs_eth, phyaddr, 1),
+ DEFINE_PROP_PTR("dma_out", struct fs_eth, vdma_out),
+ DEFINE_PROP_PTR("dma_in", struct fs_eth, vdma_in),
+ DEFINE_NIC_PROPERTIES(struct fs_eth, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void etraxfs_eth_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = fs_eth_init;
+}
+
+static DeviceInfo etraxfs_eth_info = {
+ .name = "etraxfs-eth",
+ .size = sizeof(struct fs_eth),
+ .props = etraxfs_eth_properties,
+ .class_init = etraxfs_eth_class_init,
};
static void etraxfs_eth_register(void)
return 0;
}
-static SysBusDeviceInfo etraxfs_pic_info = {
- .init = etraxfs_pic_init,
- .qdev.name = "etraxfs,pic",
- .qdev.size = sizeof(struct etrax_pic),
- .qdev.props = (Property[]) {
- DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property etraxfs_pic_properties[] = {
+ DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void etraxfs_pic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = etraxfs_pic_init;
+}
+
+static DeviceInfo etraxfs_pic_info = {
+ .name = "etraxfs,pic",
+ .size = sizeof(struct etrax_pic),
+ .props = etraxfs_pic_properties,
+ .class_init = etraxfs_pic_class_init,
};
static void etraxfs_pic_register(void)
return 0;
}
-static SysBusDeviceInfo etraxfs_ser_info = {
- .init = etraxfs_ser_init,
- .qdev.name = "etraxfs,serial",
- .qdev.size = sizeof(struct etrax_serial),
- .qdev.reset = etraxfs_ser_reset,
+static void etraxfs_ser_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = etraxfs_ser_init;
+}
+
+static DeviceInfo etraxfs_ser_info = {
+ .name = "etraxfs,serial",
+ .size = sizeof(struct etrax_serial),
+ .reset = etraxfs_ser_reset,
+ .class_init = etraxfs_ser_class_init,
};
static void etraxfs_serial_register(void)
return 0;
}
+static void etraxfs_timer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = etraxfs_timer_init;
+}
+
+static DeviceInfo etraxfs_timer_info = {
+ .name = "etraxfs,timer",
+ .size = sizeof (struct etrax_timer),
+ .class_init = etraxfs_timer_class_init,
+};
+
static void etraxfs_timer_register(void)
{
- sysbus_register_dev("etraxfs,timer", sizeof (struct etrax_timer),
- etraxfs_timer_init);
+ sysbus_qdev_register(&etraxfs_timer_info);
}
device_init(etraxfs_timer_register)
}
};
-static SysBusDeviceInfo sysbus_fdc_info = {
- .init = sysbus_fdc_init1,
- .qdev.name = "sysbus-fdc",
- .qdev.size = sizeof(FDCtrlSysBus),
- .qdev.vmsd = &vmstate_sysbus_fdc,
- .qdev.reset = fdctrl_external_reset_sysbus,
- .qdev.props = (Property[]) {
- DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.drives[0].bs),
- DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.drives[1].bs),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property sysbus_fdc_properties[] = {
+ DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.drives[0].bs),
+ DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.drives[1].bs),
+ DEFINE_PROP_END_OF_LIST(),
};
-static SysBusDeviceInfo sun4m_fdc_info = {
- .init = sun4m_fdc_init1,
- .qdev.name = "SUNW,fdtwo",
- .qdev.size = sizeof(FDCtrlSysBus),
- .qdev.vmsd = &vmstate_sysbus_fdc,
- .qdev.reset = fdctrl_external_reset_sysbus,
- .qdev.props = (Property[]) {
- DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.drives[0].bs),
- DEFINE_PROP_END_OF_LIST(),
- },
+static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sysbus_fdc_init1;
+}
+
+static DeviceInfo sysbus_fdc_info = {
+ .name = "sysbus-fdc",
+ .size = sizeof(FDCtrlSysBus),
+ .vmsd = &vmstate_sysbus_fdc,
+ .reset = fdctrl_external_reset_sysbus,
+ .props = sysbus_fdc_properties,
+ .class_init = sysbus_fdc_class_init,
+};
+
+static Property sun4m_fdc_properties[] = {
+ DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.drives[0].bs),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sun4m_fdc_init1;
+}
+
+static DeviceInfo sun4m_fdc_info = {
+ .name = "SUNW,fdtwo",
+ .size = sizeof(FDCtrlSysBus),
+ .vmsd = &vmstate_sysbus_fdc,
+ .reset = fdctrl_external_reset_sysbus,
+ .props = sun4m_fdc_properties,
+ .class_init = sun4m_fdc_class_init,
};
static void fdc_register_devices(void)
return 0;
}
-static SysBusDeviceInfo fw_cfg_info = {
- .init = fw_cfg_init1,
- .qdev.name = "fw_cfg",
- .qdev.size = sizeof(FWCfgState),
- .qdev.vmsd = &vmstate_fw_cfg,
- .qdev.reset = fw_cfg_reset,
- .qdev.no_user = 1,
- .qdev.props = (Property[]) {
- DEFINE_PROP_HEX32("ctl_iobase", FWCfgState, ctl_iobase, -1),
- DEFINE_PROP_HEX32("data_iobase", FWCfgState, data_iobase, -1),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property fw_cfg_properties[] = {
+ DEFINE_PROP_HEX32("ctl_iobase", FWCfgState, ctl_iobase, -1),
+ DEFINE_PROP_HEX32("data_iobase", FWCfgState, data_iobase, -1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void fw_cfg_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = fw_cfg_init1;
+}
+
+static DeviceInfo fw_cfg_info = {
+ .name = "fw_cfg",
+ .size = sizeof(FWCfgState),
+ .vmsd = &vmstate_fw_cfg,
+ .reset = fw_cfg_reset,
+ .no_user = 1,
+ .props = fw_cfg_properties,
+ .class_init = fw_cfg_class_init,
};
static void fw_cfg_register_devices(void)
g364fb_reset(&s->g364);
}
-static SysBusDeviceInfo g364fb_sysbus_info = {
- .init = g364fb_sysbus_init,
- .qdev.name = "sysbus-g364",
- .qdev.desc = "G364 framebuffer",
- .qdev.size = sizeof(G364SysBusState),
- .qdev.vmsd = &vmstate_g364fb,
- .qdev.reset = g364fb_sysbus_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size,
- 8 * 1024 * 1024),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property g364fb_sysbus_properties[] = {
+ DEFINE_PROP_HEX32("vram_size", G364SysBusState, g364.vram_size,
+ 8 * 1024 * 1024),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void g364fb_sysbus_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = g364fb_sysbus_init;
+}
+
+static DeviceInfo g364fb_sysbus_info = {
+ .name = "sysbus-g364",
+ .desc = "G364 framebuffer",
+ .size = sizeof(G364SysBusState),
+ .vmsd = &vmstate_g364fb,
+ .reset = g364fb_sysbus_reset,
+ .props = g364fb_sysbus_properties,
+ .class_init = g364fb_sysbus_class_init,
};
static void g364fb_register(void)
.class_init = grackle_pci_class_init,
};
-static SysBusDeviceInfo grackle_pci_host_info = {
- .qdev.name = "grackle-pcihost",
- .qdev.size = sizeof(GrackleState),
- .qdev.no_user = 1,
- .init = pci_grackle_init_device,
+static void pci_grackle_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pci_grackle_init_device;
+}
+
+static DeviceInfo grackle_pci_host_info = {
+ .name = "grackle-pcihost",
+ .size = sizeof(GrackleState),
+ .no_user = 1,
+ .class_init = pci_grackle_class_init,
};
static void grackle_register_devices(void)
{
- sysbus_register_withprop(&grackle_pci_host_info);
+ sysbus_qdev_register(&grackle_pci_host_info);
pci_qdev_register(&grackle_pci_info);
}
return 0;
}
-static SysBusDeviceInfo grlib_gptimer_info = {
- .init = grlib_apbuart_init,
- .qdev.name = "grlib,apbuart",
- .qdev.size = sizeof(UART),
- .qdev.props = (Property[]) {
- DEFINE_PROP_CHR("chrdev", UART, chr),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property grlib_gptimer_properties[] = {
+ DEFINE_PROP_CHR("chrdev", UART, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void grlib_gptimer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = grlib_apbuart_init;
+}
+
+static DeviceInfo grlib_gptimer_info = {
+ .name = "grlib,apbuart",
+ .size = sizeof(UART),
+ .props = grlib_gptimer_properties,
+ .class_init = grlib_gptimer_class_init,
};
static void grlib_gptimer_register(void)
return 0;
}
-static SysBusDeviceInfo grlib_gptimer_info = {
- .init = grlib_gptimer_init,
- .qdev.name = "grlib,gptimer",
- .qdev.reset = grlib_gptimer_reset,
- .qdev.size = sizeof(GPTimerUnit),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("frequency", GPTimerUnit, freq_hz, 40000000),
- DEFINE_PROP_UINT32("irq-line", GPTimerUnit, irq_line, 8),
- DEFINE_PROP_UINT32("nr-timers", GPTimerUnit, nr_timers, 2),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property grlib_gptimer_properties[] = {
+ DEFINE_PROP_UINT32("frequency", GPTimerUnit, freq_hz, 40000000),
+ DEFINE_PROP_UINT32("irq-line", GPTimerUnit, irq_line, 8),
+ DEFINE_PROP_UINT32("nr-timers", GPTimerUnit, nr_timers, 2),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void grlib_gptimer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = grlib_gptimer_init;
+}
+
+static DeviceInfo grlib_gptimer_info = {
+ .name = "grlib,gptimer",
+ .reset = grlib_gptimer_reset,
+ .size = sizeof(GPTimerUnit),
+ .props = grlib_gptimer_properties,
+ .class_init = grlib_gptimer_class_init,
};
static void grlib_gptimer_register(void)
return 0;
}
-static SysBusDeviceInfo grlib_irqmp_info = {
- .init = grlib_irqmp_init,
- .qdev.name = "grlib,irqmp",
- .qdev.reset = grlib_irqmp_reset,
- .qdev.size = sizeof(IRQMP),
- .qdev.props = (Property[]) {
- DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in),
- DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property grlib_irqmp_properties[] = {
+ DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in),
+ DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void grlib_irqmp_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = grlib_irqmp_init;
+}
+
+static DeviceInfo grlib_irqmp_info = {
+ .name = "grlib,irqmp",
+ .reset = grlib_irqmp_reset,
+ .size = sizeof(IRQMP),
+ .props = grlib_irqmp_properties,
+ .class_init = grlib_irqmp_class_init,
};
static void grlib_irqmp_register(void)
.class_init = gt64120_pci_class_init,
};
+static void gt64120_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = gt64120_init;
+}
+
+static DeviceInfo gt64120_info = {
+ .name = "gt64120",
+ .size = sizeof(GT64120State),
+ .class_init = gt64120_class_init,
+};
+
static void gt64120_pci_register_devices(void)
{
- sysbus_register_dev("gt64120", sizeof(GT64120State),
- gt64120_init);
+ sysbus_qdev_register(>64120_info);
pci_qdev_register(>64120_pci_info);
}
return 0;
}
-static SysBusDeviceInfo highbank_regs_info = {
- .init = highbank_regs_init,
- .qdev.name = "highbank-regs",
- .qdev.desc = "Calxeda Highbank registers",
- .qdev.size = sizeof(HighbankRegsState),
- .qdev.vmsd = &vmstate_highbank_regs,
- .qdev.reset = highbank_regs_reset,
+static void highbank_regs_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = highbank_regs_init;
+}
+
+static DeviceInfo highbank_regs_info = {
+ .name = "highbank-regs",
+ .desc = "Calxeda Highbank registers",
+ .size = sizeof(HighbankRegsState),
+ .vmsd = &vmstate_highbank_regs,
+ .class_init = highbank_regs_class_init,
+ .reset = highbank_regs_reset,
};
static void highbank_regs_register_device(void)
{
- sysbus_register_withprop(&highbank_regs_info);
+ sysbus_qdev_register(&highbank_regs_info);
}
device_init(highbank_regs_register_device)
return 0;
}
-static SysBusDeviceInfo hpet_device_info = {
- .qdev.name = "hpet",
- .qdev.size = sizeof(HPETState),
- .qdev.no_user = 1,
- .qdev.vmsd = &vmstate_hpet,
- .qdev.reset = hpet_reset,
- .init = hpet_init,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS),
- DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property hpet_device_properties[] = {
+ DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS),
+ DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void hpet_device_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = hpet_init;
+}
+
+static DeviceInfo hpet_device_info = {
+ .name = "hpet",
+ .size = sizeof(HPETState),
+ .no_user = 1,
+ .vmsd = &vmstate_hpet,
+ .reset = hpet_reset,
+ .props = hpet_device_properties,
+ .class_init = hpet_device_class_init,
};
static void hpet_register_device(void)
return 0;
}
-static SysBusDeviceInfo sysbus_ahci_info = {
- .qdev.name = "sysbus-ahci",
- .qdev.size = sizeof(SysbusAHCIState),
- .qdev.vmsd = &vmstate_sysbus_ahci,
- .qdev.props = (Property[]) {
+static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = sysbus_ahci_init;
+}
+
+static DeviceInfo sysbus_ahci_info = {
+ .name = "sysbus-ahci",
+ .size = sizeof(SysbusAHCIState),
+ .vmsd = &vmstate_sysbus_ahci,
+ .class_init = sysbus_ahci_class_init,
+ .props = (Property[]) {
DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, num_ports, 1),
DEFINE_PROP_END_OF_LIST(),
},
- .init = sysbus_ahci_init,
-
-
};
static void sysbus_ahci_register(void)
{
- sysbus_register_withprop(&sysbus_ahci_info);
+ sysbus_qdev_register(&sysbus_ahci_info);
}
device_init(sysbus_ahci_register);
machine_init(integratorcp_machine_init);
-static SysBusDeviceInfo core_info = {
- .init = integratorcm_init,
- .qdev.name = "integrator_core",
- .qdev.size = sizeof(integratorcm_state),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("memsz", integratorcm_state, memsz, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property core_properties[] = {
+ DEFINE_PROP_UINT32("memsz", integratorcm_state, memsz, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void core_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = integratorcm_init;
+}
+
+static DeviceInfo core_info = {
+ .name = "integrator_core",
+ .size = sizeof(integratorcm_state),
+ .props = core_properties,
+ .class_init = core_class_init,
+};
+
+static void icp_pic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = icp_pic_init;
+}
+
+static DeviceInfo icp_pic_info = {
+ .name = "integrator_pic",
+ .size = sizeof(icp_pic_state),
+ .class_init = icp_pic_class_init,
};
static void integratorcp_register_devices(void)
{
- sysbus_register_dev("integrator_pic", sizeof(icp_pic_state), icp_pic_init);
+ sysbus_qdev_register(&icp_pic_info);
sysbus_register_withprop(&core_info);
}
ioapics[instance_no] = s;
}
-static IOAPICCommonInfo ioapic_info = {
- .busdev.qdev.name = "ioapic",
- .busdev.qdev.size = sizeof(IOAPICCommonState),
- .busdev.qdev.reset = ioapic_reset_common,
- .init = ioapic_init,
+static void ioapic_class_init(ObjectClass *klass, void *data)
+{
+ IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass);
+
+ k->init = ioapic_init;
+}
+
+static DeviceInfo ioapic_info = {
+ .name = "ioapic",
+ .size = sizeof(IOAPICCommonState),
+ .reset = ioapic_reset_common,
+ .class_init = ioapic_class_init,
};
static void ioapic_register_devices(void)
void ioapic_reset_common(DeviceState *dev)
{
- IOAPICCommonState *s = DO_UPCAST(IOAPICCommonState, busdev.qdev, dev);
+ IOAPICCommonState *s = IOAPIC_COMMON(dev);
int i;
s->id = 0;
static void ioapic_dispatch_pre_save(void *opaque)
{
- IOAPICCommonState *s = opaque;
- IOAPICCommonInfo *info =
- DO_UPCAST(IOAPICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
+ IOAPICCommonState *s = IOAPIC_COMMON(opaque);
+ IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
if (info->pre_save) {
info->pre_save(s);
static int ioapic_dispatch_post_load(void *opaque, int version_id)
{
- IOAPICCommonState *s = opaque;
- IOAPICCommonInfo *info =
- DO_UPCAST(IOAPICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
+ IOAPICCommonState *s = IOAPIC_COMMON(opaque);
+ IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
if (info->post_load) {
info->post_load(s);
static int ioapic_init_common(SysBusDevice *dev)
{
IOAPICCommonState *s = FROM_SYSBUS(IOAPICCommonState, dev);
- IOAPICCommonInfo *info;
+ IOAPICCommonClass *info;
static int ioapic_no;
if (ioapic_no >= MAX_IOAPICS) {
return -1;
}
- info = DO_UPCAST(IOAPICCommonInfo, busdev.qdev, qdev_get_info(&s->busdev.qdev));
+ info = IOAPIC_COMMON_GET_CLASS(s);
info->init(s, ioapic_no);
sysbus_init_mmio(&s->busdev, &s->io_memory);
}
};
-void ioapic_qdev_register(IOAPICCommonInfo *info)
+static void ioapic_common_class_init(ObjectClass *klass, void *data)
{
- info->busdev.init = ioapic_init_common;
- info->busdev.qdev.vmsd = &vmstate_ioapic_common;
- info->busdev.qdev.no_user = 1;
- sysbus_register_withprop(&info->busdev);
+ SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sc->init = ioapic_init_common;
+}
+
+static TypeInfo ioapic_common_type = {
+ .name = TYPE_IOAPIC_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(IOAPICCommonState),
+ .class_size = sizeof(IOAPICCommonClass),
+ .class_init = ioapic_common_class_init,
+ .abstract = true,
+};
+
+void ioapic_qdev_register(DeviceInfo *info)
+{
+ info->vmsd = &vmstate_ioapic_common;
+ info->no_user = 1;
+ sysbus_qdev_register_subclass(info, TYPE_IOAPIC_COMMON);
}
+
+static void register_devices(void)
+{
+ type_register_static(&ioapic_common_type);
+}
+
+device_init(register_devices);
+
typedef struct IOAPICCommonState IOAPICCommonState;
+#define TYPE_IOAPIC_COMMON "ioapic-common"
+#define IOAPIC_COMMON(obj) \
+ OBJECT_CHECK(IOAPICCommonState, (obj), TYPE_IOAPIC_COMMON)
+#define IOAPIC_COMMON_CLASS(klass) \
+ OBJECT_CLASS_CHECK(IOAPICCommonClass, (klass), TYPE_IOAPIC_COMMON)
+#define IOAPIC_COMMON_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(IOAPICCommonClass, (obj), TYPE_IOAPIC_COMMON)
+
+typedef struct IOAPICCommonClass {
+ SysBusDeviceClass parent_class;
+ void (*init)(IOAPICCommonState *s, int instance_no);
+ void (*pre_save)(IOAPICCommonState *s);
+ void (*post_load)(IOAPICCommonState *s);
+} IOAPICCommonClass;
+
struct IOAPICCommonState {
SysBusDevice busdev;
MemoryRegion io_memory;
uint64_t ioredtbl[IOAPIC_NUM_PINS];
};
-typedef struct IOAPICCommonInfo IOAPICCommonInfo;
-
-struct IOAPICCommonInfo {
- SysBusDeviceInfo busdev;
- void (*init)(IOAPICCommonState *s, int instance_no);
- void (*pre_save)(IOAPICCommonState *s);
- void (*post_load)(IOAPICCommonState *s);
-};
-
-void ioapic_qdev_register(IOAPICCommonInfo *info);
+void ioapic_qdev_register(DeviceInfo *info);
void ioapic_reset_common(DeviceState *dev);
#endif /* !QEMU_IOAPIC_INTERNAL_H */
return 0;
}
-static SysBusDeviceInfo isabus_bridge_info = {
- .init = isabus_bridge_init,
- .qdev.name = "isabus-bridge",
- .qdev.fw_name = "isa",
- .qdev.size = sizeof(SysBusDevice),
- .qdev.no_user = 1,
+static void isabus_bridge_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = isabus_bridge_init;
+}
+
+static DeviceInfo isabus_bridge_info = {
+ .name = "isabus-bridge",
+ .fw_name = "isa",
+ .size = sizeof(SysBusDevice),
+ .no_user = 1,
+ .class_init = isabus_bridge_class_init,
};
static TypeInfo isa_device_type_info = {
MSI_SPACE_SIZE);
}
-static APICCommonInfo kvm_apic_info = {
- .busdev.qdev.name = "kvm-apic",
- .init = kvm_apic_init,
- .set_base = kvm_apic_set_base,
- .set_tpr = kvm_apic_set_tpr,
- .external_nmi = kvm_apic_external_nmi,
+static void kvm_apic_class_init(ObjectClass *klass, void *data)
+{
+ APICCommonClass *k = APIC_COMMON_CLASS(klass);
+
+ k->init = kvm_apic_init;
+ k->set_base = kvm_apic_set_base;
+ k->set_tpr = kvm_apic_set_tpr;
+ k->external_nmi = kvm_apic_external_nmi;
+}
+
+static DeviceInfo kvm_apic_info = {
+ .name = "kvm-apic",
+ .class_init = kvm_apic_class_init,
};
static void kvm_apic_register_device(void)
}
};
-static SysBusDeviceInfo kvmclock_info = {
- .qdev.name = "kvmclock",
- .qdev.size = sizeof(KVMClockState),
- .qdev.vmsd = &kvmclock_vmsd,
- .qdev.no_user = 1,
- .init = kvmclock_init,
+static void kvmclock_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = kvmclock_init;
+}
+
+static DeviceInfo kvmclock_info = {
+ .name = "kvmclock",
+ .size = sizeof(KVMClockState),
+ .vmsd = &kvmclock_vmsd,
+ .no_user = 1,
+ .class_init = kvmclock_class_init,
};
/* Note: Must be called after VCPU initialization. */
qdev_init_gpio_in(&s->busdev.qdev, kvm_ioapic_set_irq, IOAPIC_NUM_PINS);
}
-static IOAPICCommonInfo kvm_ioapic_info = {
- .busdev.qdev.name = "kvm-ioapic",
- .busdev.qdev.size = sizeof(KVMIOAPICState),
- .busdev.qdev.reset = kvm_ioapic_reset,
- .busdev.qdev.props = (Property[]) {
+static void kvm_ioapic_class_init(ObjectClass *klass, void *data)
+{
+ IOAPICCommonClass *k = IOAPIC_COMMON_CLASS(klass);
+
+ k->init = kvm_ioapic_init;
+ k->pre_save = kvm_ioapic_get;
+ k->post_load = kvm_ioapic_put;
+}
+
+static DeviceInfo kvm_ioapic_info = {
+ .name = "kvm-ioapic",
+ .size = sizeof(KVMIOAPICState),
+ .reset = kvm_ioapic_reset,
+ .class_init = kvm_ioapic_class_init,
+ .props = (Property[]) {
DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0),
DEFINE_PROP_END_OF_LIST()
},
- .init = kvm_ioapic_init,
- .pre_save = kvm_ioapic_get,
- .post_load = kvm_ioapic_put,
};
static void kvm_ioapic_register_device(void)
return 0;
}
-static SysBusDeviceInfo lan9118_info = {
- .init = lan9118_init1,
- .qdev.name = "lan9118",
- .qdev.size = sizeof(lan9118_state),
- .qdev.reset = lan9118_reset,
- .qdev.vmsd = &vmstate_lan9118,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(lan9118_state, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property lan9118_properties[] = {
+ DEFINE_NIC_PROPERTIES(lan9118_state, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void lan9118_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lan9118_init1;
+}
+
+static DeviceInfo lan9118_info = {
+ .name = "lan9118",
+ .size = sizeof(lan9118_state),
+ .reset = lan9118_reset,
+ .vmsd = &vmstate_lan9118,
+ .props = lan9118_properties,
+ .class_init = lan9118_class_init,
};
static void lan9118_register_devices(void)
pcnet_h_reset(&d->state);
}
-static SysBusDeviceInfo lance_info = {
- .init = lance_init,
- .qdev.name = "lance",
- .qdev.fw_name = "ethernet",
- .qdev.size = sizeof(SysBusPCNetState),
- .qdev.reset = lance_reset,
- .qdev.vmsd = &vmstate_lance,
- .qdev.props = (Property[]) {
- DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
- DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property lance_properties[] = {
+ DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
+ DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void lance_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lance_init;
+}
+
+static DeviceInfo lance_info = {
+ .name = "lance",
+ .fw_name = "ethernet",
+ .size = sizeof(SysBusPCNetState),
+ .reset = lance_reset,
+ .vmsd = &vmstate_lance,
+ .props = lance_properties,
+ .class_init = lance_class_init,
};
static void lance_register_devices(void)
}
};
-static SysBusDeviceInfo lm32_juart_info = {
- .init = lm32_juart_init,
- .qdev.name = "lm32-juart",
- .qdev.size = sizeof(LM32JuartState),
- .qdev.vmsd = &vmstate_lm32_juart,
- .qdev.reset = juart_reset,
+static void lm32_juart_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lm32_juart_init;
+}
+
+static DeviceInfo lm32_juart_info = {
+ .name = "lm32-juart",
+ .size = sizeof(LM32JuartState),
+ .vmsd = &vmstate_lm32_juart,
+ .reset = juart_reset,
+ .class_init = lm32_juart_class_init,
};
static void lm32_juart_register(void)
}
};
-static SysBusDeviceInfo lm32_pic_info = {
- .init = lm32_pic_init,
- .qdev.name = "lm32-pic",
- .qdev.size = sizeof(LM32PicState),
- .qdev.vmsd = &vmstate_lm32_pic,
- .qdev.reset = pic_reset,
+static void lm32_pic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lm32_pic_init;
+}
+
+static DeviceInfo lm32_pic_info = {
+ .name = "lm32-pic",
+ .size = sizeof(LM32PicState),
+ .vmsd = &vmstate_lm32_pic,
+ .reset = pic_reset,
+ .class_init = lm32_pic_class_init,
};
static void lm32_pic_register(void)
}
};
-static SysBusDeviceInfo lm32_sys_info = {
- .init = lm32_sys_init,
- .qdev.name = "lm32-sys",
- .qdev.size = sizeof(LM32SysState),
- .qdev.vmsd = &vmstate_lm32_sys,
- .qdev.reset = sys_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("base", LM32SysState, base, 0xffff0000),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property lm32_sys_properties[] = {
+ DEFINE_PROP_UINT32("base", LM32SysState, base, 0xffff0000),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void lm32_sys_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lm32_sys_init;
+}
+
+static DeviceInfo lm32_sys_info = {
+ .name = "lm32-sys",
+ .size = sizeof(LM32SysState),
+ .vmsd = &vmstate_lm32_sys,
+ .reset = sys_reset,
+ .props = lm32_sys_properties,
+ .class_init = lm32_sys_class_init,
};
static void lm32_sys_register(void)
}
};
-static SysBusDeviceInfo lm32_timer_info = {
- .init = lm32_timer_init,
- .qdev.name = "lm32-timer",
- .qdev.size = sizeof(LM32TimerState),
- .qdev.vmsd = &vmstate_lm32_timer,
- .qdev.reset = timer_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32(
- "frequency", LM32TimerState, freq_hz, DEFAULT_FREQUENCY
- ),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property lm32_timer_properties[] = {
+ DEFINE_PROP_UINT32("frequency", LM32TimerState, freq_hz, DEFAULT_FREQUENCY),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void lm32_timer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lm32_timer_init;
+}
+
+static DeviceInfo lm32_timer_info = {
+ .name = "lm32-timer",
+ .size = sizeof(LM32TimerState),
+ .vmsd = &vmstate_lm32_timer,
+ .reset = timer_reset,
+ .props = lm32_timer_properties,
+ .class_init = lm32_timer_class_init,
};
static void lm32_timer_register(void)
}
};
-static SysBusDeviceInfo lm32_uart_info = {
- .init = lm32_uart_init,
- .qdev.name = "lm32-uart",
- .qdev.size = sizeof(LM32UartState),
- .qdev.vmsd = &vmstate_lm32_uart,
- .qdev.reset = uart_reset,
+static void lm32_uart_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = lm32_uart_init;
+}
+
+static DeviceInfo lm32_uart_info = {
+ .name = "lm32-uart",
+ .size = sizeof(LM32UartState),
+ .vmsd = &vmstate_lm32_uart,
+ .reset = uart_reset,
+ .class_init = lm32_uart_class_init,
};
static void lm32_uart_register(void)
}
};
-static SysBusDeviceInfo m48t59_info = {
- .init = m48t59_init1,
- .qdev.name = "m48t59",
- .qdev.size = sizeof(M48t59SysBusState),
- .qdev.reset = m48t59_reset_sysbus,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("size", M48t59SysBusState, state.size, -1),
- DEFINE_PROP_UINT32("type", M48t59SysBusState, state.type, -1),
- DEFINE_PROP_HEX32( "io_base", M48t59SysBusState, state.io_base, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property m48t59_properties[] = {
+ DEFINE_PROP_UINT32("size", M48t59SysBusState, state.size, -1),
+ DEFINE_PROP_UINT32("type", M48t59SysBusState, state.type, -1),
+ DEFINE_PROP_HEX32( "io_base", M48t59SysBusState, state.io_base, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void m48t59_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = m48t59_init1;
+}
+
+static DeviceInfo m48t59_info = {
+ .name = "m48t59",
+ .size = sizeof(M48t59SysBusState),
+ .reset = m48t59_reset_sysbus,
+ .props = m48t59_properties,
+ .class_init = m48t59_class_init,
};
static void m48t59_register_devices(void)
}
};
-static SysBusDeviceInfo mv88w8618_audio_info = {
- .init = mv88w8618_audio_init,
- .qdev.name = "mv88w8618_audio",
- .qdev.size = sizeof(mv88w8618_audio_state),
- .qdev.reset = mv88w8618_audio_reset,
- .qdev.vmsd = &mv88w8618_audio_vmsd,
- .qdev.props = (Property[]) {
- DEFINE_PROP_PTR("wm8750", mv88w8618_audio_state, wm),
- {/* end of list */}
- }
+static Property mv88w8618_audio_properties[] = {
+ DEFINE_PROP_PTR("wm8750", mv88w8618_audio_state, wm),
+ {/* end of list */},
+};
+
+static void mv88w8618_audio_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mv88w8618_audio_init;
+}
+
+static DeviceInfo mv88w8618_audio_info = {
+ .name = "mv88w8618_audio",
+ .size = sizeof(mv88w8618_audio_state),
+ .reset = mv88w8618_audio_reset,
+ .vmsd = &mv88w8618_audio_vmsd,
+ .props = mv88w8618_audio_properties,
+ .class_init = mv88w8618_audio_class_init,
};
static void mv88w8618_register_devices(void)
}
};
-static SysBusDeviceInfo milkymist_ac97_info = {
- .init = milkymist_ac97_init,
- .qdev.name = "milkymist-ac97",
- .qdev.size = sizeof(MilkymistAC97State),
- .qdev.vmsd = &vmstate_milkymist_ac97,
- .qdev.reset = milkymist_ac97_reset,
+static void milkymist_ac97_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_ac97_init;
+}
+
+static DeviceInfo milkymist_ac97_info = {
+ .name = "milkymist-ac97",
+ .size = sizeof(MilkymistAC97State),
+ .vmsd = &vmstate_milkymist_ac97,
+ .reset = milkymist_ac97_reset,
+ .class_init = milkymist_ac97_class_init,
};
static void milkymist_ac97_register(void)
}
};
-static SysBusDeviceInfo milkymist_hpdmc_info = {
- .init = milkymist_hpdmc_init,
- .qdev.name = "milkymist-hpdmc",
- .qdev.size = sizeof(MilkymistHpdmcState),
- .qdev.vmsd = &vmstate_milkymist_hpdmc,
- .qdev.reset = milkymist_hpdmc_reset,
+static void milkymist_hpdmc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_hpdmc_init;
+}
+
+static DeviceInfo milkymist_hpdmc_info = {
+ .name = "milkymist-hpdmc",
+ .size = sizeof(MilkymistHpdmcState),
+ .vmsd = &vmstate_milkymist_hpdmc,
+ .reset = milkymist_hpdmc_reset,
+ .class_init = milkymist_hpdmc_class_init,
};
static void milkymist_hpdmc_register(void)
}
};
-static SysBusDeviceInfo milkymist_memcard_info = {
- .init = milkymist_memcard_init,
- .qdev.name = "milkymist-memcard",
- .qdev.size = sizeof(MilkymistMemcardState),
- .qdev.vmsd = &vmstate_milkymist_memcard,
- .qdev.reset = milkymist_memcard_reset,
+static void milkymist_memcard_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_memcard_init;
+}
+
+static DeviceInfo milkymist_memcard_info = {
+ .name = "milkymist-memcard",
+ .size = sizeof(MilkymistMemcardState),
+ .vmsd = &vmstate_milkymist_memcard,
+ .reset = milkymist_memcard_reset,
+ .class_init = milkymist_memcard_class_init,
};
static void milkymist_memcard_register(void)
}
};
-static SysBusDeviceInfo milkymist_minimac2_info = {
- .init = milkymist_minimac2_init,
- .qdev.name = "milkymist-minimac2",
- .qdev.size = sizeof(MilkymistMinimac2State),
- .qdev.vmsd = &vmstate_milkymist_minimac2,
- .qdev.reset = milkymist_minimac2_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_TADDR("buffers_base", MilkymistMinimac2State,
- buffers_base, 0),
- DEFINE_NIC_PROPERTIES(MilkymistMinimac2State, conf),
- DEFINE_PROP_STRING("phy_model", MilkymistMinimac2State, phy_model),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property milkymist_minimac2_properties[] = {
+ DEFINE_PROP_TADDR("buffers_base", MilkymistMinimac2State,
+ buffers_base, 0),
+ DEFINE_NIC_PROPERTIES(MilkymistMinimac2State, conf),
+ DEFINE_PROP_STRING("phy_model", MilkymistMinimac2State, phy_model),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void milkymist_minimac2_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_minimac2_init;
+}
+
+static DeviceInfo milkymist_minimac2_info = {
+ .name = "milkymist-minimac2",
+ .size = sizeof(MilkymistMinimac2State),
+ .vmsd = &vmstate_milkymist_minimac2,
+ .reset = milkymist_minimac2_reset,
+ .props = milkymist_minimac2_properties,
+ .class_init = milkymist_minimac2_class_init,
};
static void milkymist_minimac2_register(void)
}
};
-static SysBusDeviceInfo milkymist_pfpu_info = {
- .init = milkymist_pfpu_init,
- .qdev.name = "milkymist-pfpu",
- .qdev.size = sizeof(MilkymistPFPUState),
- .qdev.vmsd = &vmstate_milkymist_pfpu,
- .qdev.reset = milkymist_pfpu_reset,
+static void milkymist_pfpu_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_pfpu_init;
+}
+
+static DeviceInfo milkymist_pfpu_info = {
+ .name = "milkymist-pfpu",
+ .size = sizeof(MilkymistPFPUState),
+ .vmsd = &vmstate_milkymist_pfpu,
+ .reset = milkymist_pfpu_reset,
+ .class_init = milkymist_pfpu_class_init,
};
static void milkymist_pfpu_register(void)
}
};
-static SysBusDeviceInfo milkymist_softusb_info = {
- .init = milkymist_softusb_init,
- .qdev.name = "milkymist-softusb",
- .qdev.size = sizeof(MilkymistSoftUsbState),
- .qdev.vmsd = &vmstate_milkymist_softusb,
- .qdev.reset = milkymist_softusb_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32(
- "pmem_base", MilkymistSoftUsbState, pmem_base, 0xa0000000
- ),
- DEFINE_PROP_UINT32(
- "pmem_size", MilkymistSoftUsbState, pmem_size, 0x00001000
- ),
- DEFINE_PROP_UINT32(
- "dmem_base", MilkymistSoftUsbState, dmem_base, 0xa0020000
- ),
- DEFINE_PROP_UINT32(
- "dmem_size", MilkymistSoftUsbState, dmem_size, 0x00002000
- ),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property milkymist_softusb_properties[] = {
+ DEFINE_PROP_UINT32("pmem_base", MilkymistSoftUsbState, pmem_base, 0xa0000000),
+ DEFINE_PROP_UINT32("pmem_size", MilkymistSoftUsbState, pmem_size, 0x00001000),
+ DEFINE_PROP_UINT32("dmem_base", MilkymistSoftUsbState, dmem_base, 0xa0020000),
+ DEFINE_PROP_UINT32("dmem_size", MilkymistSoftUsbState, dmem_size, 0x00002000),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void milkymist_softusb_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_softusb_init;
+}
+
+static DeviceInfo milkymist_softusb_info = {
+ .name = "milkymist-softusb",
+ .size = sizeof(MilkymistSoftUsbState),
+ .vmsd = &vmstate_milkymist_softusb,
+ .reset = milkymist_softusb_reset,
+ .props = milkymist_softusb_properties,
+ .class_init = milkymist_softusb_class_init,
};
static void milkymist_softusb_register(void)
}
};
-static SysBusDeviceInfo milkymist_sysctl_info = {
- .init = milkymist_sysctl_init,
- .qdev.name = "milkymist-sysctl",
- .qdev.size = sizeof(MilkymistSysctlState),
- .qdev.vmsd = &vmstate_milkymist_sysctl,
- .qdev.reset = milkymist_sysctl_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("frequency", MilkymistSysctlState,
- freq_hz, 80000000),
- DEFINE_PROP_UINT32("capabilities", MilkymistSysctlState,
- capabilities, 0x00000000),
- DEFINE_PROP_UINT32("systemid", MilkymistSysctlState,
- systemid, 0x10014d31),
- DEFINE_PROP_UINT32("gpio_strappings", MilkymistSysctlState,
- strappings, 0x00000001),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property milkymist_sysctl_properties[] = {
+ DEFINE_PROP_UINT32("frequency", MilkymistSysctlState,
+ freq_hz, 80000000),
+ DEFINE_PROP_UINT32("capabilities", MilkymistSysctlState,
+ capabilities, 0x00000000),
+ DEFINE_PROP_UINT32("systemid", MilkymistSysctlState,
+ systemid, 0x10014d31),
+ DEFINE_PROP_UINT32("gpio_strappings", MilkymistSysctlState,
+ strappings, 0x00000001),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void milkymist_sysctl_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_sysctl_init;
+}
+
+static DeviceInfo milkymist_sysctl_info = {
+ .name = "milkymist-sysctl",
+ .size = sizeof(MilkymistSysctlState),
+ .vmsd = &vmstate_milkymist_sysctl,
+ .reset = milkymist_sysctl_reset,
+ .props = milkymist_sysctl_properties,
+ .class_init = milkymist_sysctl_class_init,
};
static void milkymist_sysctl_register(void)
}
};
-static SysBusDeviceInfo milkymist_tmu2_info = {
- .init = milkymist_tmu2_init,
- .qdev.name = "milkymist-tmu2",
- .qdev.size = sizeof(MilkymistTMU2State),
- .qdev.vmsd = &vmstate_milkymist_tmu2,
- .qdev.reset = milkymist_tmu2_reset,
+static void milkymist_tmu2_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_tmu2_init;
+}
+
+static DeviceInfo milkymist_tmu2_info = {
+ .name = "milkymist-tmu2",
+ .size = sizeof(MilkymistTMU2State),
+ .vmsd = &vmstate_milkymist_tmu2,
+ .reset = milkymist_tmu2_reset,
+ .class_init = milkymist_tmu2_class_init,
};
static void milkymist_tmu2_register(void)
}
};
-static SysBusDeviceInfo milkymist_uart_info = {
- .init = milkymist_uart_init,
- .qdev.name = "milkymist-uart",
- .qdev.size = sizeof(MilkymistUartState),
- .qdev.vmsd = &vmstate_milkymist_uart,
- .qdev.reset = milkymist_uart_reset,
+static void milkymist_uart_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_uart_init;
+}
+
+static DeviceInfo milkymist_uart_info = {
+ .name = "milkymist-uart",
+ .size = sizeof(MilkymistUartState),
+ .vmsd = &vmstate_milkymist_uart,
+ .reset = milkymist_uart_reset,
+ .class_init = milkymist_uart_class_init,
};
static void milkymist_uart_register(void)
}
};
-static SysBusDeviceInfo milkymist_vgafb_info = {
- .init = milkymist_vgafb_init,
- .qdev.name = "milkymist-vgafb",
- .qdev.size = sizeof(MilkymistVgafbState),
- .qdev.vmsd = &vmstate_milkymist_vgafb,
- .qdev.reset = milkymist_vgafb_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
- DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property milkymist_vgafb_properties[] = {
+ DEFINE_PROP_UINT32("fb_offset", MilkymistVgafbState, fb_offset, 0x0),
+ DEFINE_PROP_UINT32("fb_mask", MilkymistVgafbState, fb_mask, 0xffffffff),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void milkymist_vgafb_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = milkymist_vgafb_init;
+}
+
+static DeviceInfo milkymist_vgafb_info = {
+ .name = "milkymist-vgafb",
+ .size = sizeof(MilkymistVgafbState),
+ .vmsd = &vmstate_milkymist_vgafb,
+ .reset = milkymist_vgafb_reset,
+ .props = milkymist_vgafb_properties,
+ .class_init = milkymist_vgafb_class_init,
};
static void milkymist_vgafb_register(void)
return 0;
}
-static SysBusDeviceInfo mips_malta_device = {
- .init = mips_malta_sysbus_device_init,
- .qdev.name = "mips-malta",
- .qdev.size = sizeof(MaltaState),
- .qdev.props = (Property[]) {
+static void mips_malta_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mips_malta_sysbus_device_init;
+}
+
+static DeviceInfo mips_malta_device = {
+ .name = "mips-malta",
+ .size = sizeof(MaltaState),
+ .class_init = mips_malta_class_init,
+ .props = (Property[]) {
DEFINE_PROP_END_OF_LIST(),
}
};
static void mips_malta_device_init(void)
{
- sysbus_register_withprop(&mips_malta_device);
+ sysbus_qdev_register(&mips_malta_device);
}
static void mips_malta_machine_init(void)
mipsnet_reset(s);
}
-static SysBusDeviceInfo mipsnet_info = {
- .init = mipsnet_sysbus_init,
- .qdev.name = "mipsnet",
- .qdev.desc = "MIPS Simulator network device",
- .qdev.size = sizeof(MIPSnetState),
- .qdev.vmsd = &vmstate_mipsnet,
- .qdev.reset = mipsnet_sysbus_reset,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(MIPSnetState, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property mipsnet_properties[] = {
+ DEFINE_NIC_PROPERTIES(MIPSnetState, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void mipsnet_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mipsnet_sysbus_init;
+}
+
+static DeviceInfo mipsnet_info = {
+ .name = "mipsnet",
+ .desc = "MIPS Simulator network device",
+ .size = sizeof(MIPSnetState),
+ .vmsd = &vmstate_mipsnet,
+ .reset = mipsnet_sysbus_reset,
+ .props = mipsnet_properties,
+ .class_init = mipsnet_class_init,
};
static void mipsnet_register_devices(void)
return 0;
}
-static SysBusDeviceInfo mpc8544_guts_info = {
- .init = mpc8544_guts_initfn,
- .qdev.name = "mpc8544-guts",
- .qdev.size = sizeof(GutsState),
+static void mpc8544_guts_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mpc8544_guts_initfn;
+}
+
+static DeviceInfo mpc8544_guts_info = {
+ .name = "mpc8544-guts",
+ .size = sizeof(GutsState),
+ .class_init = mpc8544_guts_class_init,
};
static void mpc8544_guts_register(void)
},
};
-static SysBusDeviceInfo mst_fpga_info = {
- .init = mst_fpga_init,
- .qdev.name = "mainstone-fpga",
- .qdev.desc = "Mainstone II FPGA",
- .qdev.size = sizeof(mst_irq_state),
- .qdev.vmsd = &vmstate_mst_fpga_regs,
+static void mst_fpga_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mst_fpga_init;
+}
+
+static DeviceInfo mst_fpga_info = {
+ .name = "mainstone-fpga",
+ .desc = "Mainstone II FPGA",
+ .size = sizeof(mst_irq_state),
+ .vmsd = &vmstate_mst_fpga_regs,
+ .class_init = mst_fpga_class_init,
};
static void mst_fpga_register(void)
}
};
-static SysBusDeviceInfo mv88w8618_eth_info = {
- .init = mv88w8618_eth_init,
- .qdev.name = "mv88w8618_eth",
- .qdev.size = sizeof(mv88w8618_eth_state),
- .qdev.vmsd = &mv88w8618_eth_vmsd,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(mv88w8618_eth_state, conf),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property mv88w8618_eth_properties[] = {
+ DEFINE_NIC_PROPERTIES(mv88w8618_eth_state, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void mv88w8618_eth_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mv88w8618_eth_init;
+}
+
+static DeviceInfo mv88w8618_eth_info = {
+ .name = "mv88w8618_eth",
+ .size = sizeof(mv88w8618_eth_state),
+ .vmsd = &mv88w8618_eth_vmsd,
+ .props = mv88w8618_eth_properties,
+ .class_init = mv88w8618_eth_class_init,
};
/* LCD register offsets */
}
};
-static SysBusDeviceInfo musicpal_lcd_info = {
- .init = musicpal_lcd_init,
- .qdev.name = "musicpal_lcd",
- .qdev.size = sizeof(musicpal_lcd_state),
- .qdev.vmsd = &musicpal_lcd_vmsd,
+static void musicpal_lcd_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = musicpal_lcd_init;
+}
+
+static DeviceInfo musicpal_lcd_info = {
+ .name = "musicpal_lcd",
+ .size = sizeof(musicpal_lcd_state),
+ .vmsd = &musicpal_lcd_vmsd,
+ .class_init = musicpal_lcd_class_init,
};
/* PIC register offsets */
}
};
-static SysBusDeviceInfo mv88w8618_pic_info = {
- .init = mv88w8618_pic_init,
- .qdev.name = "mv88w8618_pic",
- .qdev.size = sizeof(mv88w8618_pic_state),
- .qdev.reset = mv88w8618_pic_reset,
- .qdev.vmsd = &mv88w8618_pic_vmsd,
+static void mv88w8618_pic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mv88w8618_pic_init;
+}
+
+static DeviceInfo mv88w8618_pic_info = {
+ .name = "mv88w8618_pic",
+ .size = sizeof(mv88w8618_pic_state),
+ .reset = mv88w8618_pic_reset,
+ .vmsd = &mv88w8618_pic_vmsd,
+ .class_init = mv88w8618_pic_class_init,
};
/* PIT register offsets */
}
};
-static SysBusDeviceInfo mv88w8618_pit_info = {
- .init = mv88w8618_pit_init,
- .qdev.name = "mv88w8618_pit",
- .qdev.size = sizeof(mv88w8618_pit_state),
- .qdev.reset = mv88w8618_pit_reset,
- .qdev.vmsd = &mv88w8618_pit_vmsd,
+static void mv88w8618_pit_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mv88w8618_pit_init;
+}
+
+static DeviceInfo mv88w8618_pit_info = {
+ .name = "mv88w8618_pit",
+ .size = sizeof(mv88w8618_pit_state),
+ .reset = mv88w8618_pit_reset,
+ .vmsd = &mv88w8618_pit_vmsd,
+ .class_init = mv88w8618_pit_class_init,
};
/* Flash config register offsets */
}
};
-static SysBusDeviceInfo mv88w8618_flashcfg_info = {
- .init = mv88w8618_flashcfg_init,
- .qdev.name = "mv88w8618_flashcfg",
- .qdev.size = sizeof(mv88w8618_flashcfg_state),
- .qdev.vmsd = &mv88w8618_flashcfg_vmsd,
+static void mv88w8618_flashcfg_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = mv88w8618_flashcfg_init;
+}
+
+static DeviceInfo mv88w8618_flashcfg_info = {
+ .name = "mv88w8618_flashcfg",
+ .size = sizeof(mv88w8618_flashcfg_state),
+ .vmsd = &mv88w8618_flashcfg_vmsd,
+ .class_init = mv88w8618_flashcfg_class_init,
};
/* Misc register offsets */
}
};
-static SysBusDeviceInfo musicpal_gpio_info = {
- .init = musicpal_gpio_init,
- .qdev.name = "musicpal_gpio",
- .qdev.size = sizeof(musicpal_gpio_state),
- .qdev.reset = musicpal_gpio_reset,
- .qdev.vmsd = &musicpal_gpio_vmsd,
+static void musicpal_gpio_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = musicpal_gpio_init;
+}
+
+static DeviceInfo musicpal_gpio_info = {
+ .name = "musicpal_gpio",
+ .size = sizeof(musicpal_gpio_state),
+ .reset = musicpal_gpio_reset,
+ .vmsd = &musicpal_gpio_vmsd,
+ .class_init = musicpal_gpio_class_init,
};
/* Keyboard codes & masks */
}
};
-static SysBusDeviceInfo musicpal_key_info = {
- .init = musicpal_key_init,
- .qdev.name = "musicpal_key",
- .qdev.size = sizeof(musicpal_key_state),
- .qdev.vmsd = &musicpal_key_vmsd,
+static void musicpal_key_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = musicpal_key_init;
+}
+
+static DeviceInfo musicpal_key_info = {
+ .name = "musicpal_key",
+ .size = sizeof(musicpal_key_state),
+ .vmsd = &musicpal_key_vmsd,
+ .class_init = musicpal_key_class_init,
};
static struct arm_boot_info musicpal_binfo = {
machine_init(musicpal_machine_init);
+static void mv88w8618_wlan_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = mv88w8618_wlan_init;
+}
+
+static DeviceInfo mv88w8618_wlan_info = {
+ .name = "mv88w8618_wlan",
+ .size = sizeof(SysBusDevice),
+ .class_init = mv88w8618_wlan_class_init,
+};
+
static void musicpal_register_devices(void)
{
sysbus_register_withprop(&mv88w8618_pic_info);
sysbus_register_withprop(&mv88w8618_pit_info);
sysbus_register_withprop(&mv88w8618_flashcfg_info);
sysbus_register_withprop(&mv88w8618_eth_info);
- sysbus_register_dev("mv88w8618_wlan", sizeof(SysBusDevice),
- mv88w8618_wlan_init);
+ sysbus_qdev_register(&mv88w8618_wlan_info);
sysbus_register_withprop(&musicpal_lcd_info);
sysbus_register_withprop(&musicpal_gpio_info);
sysbus_register_withprop(&musicpal_key_info);
return 0;
}
-static SysBusDeviceInfo nand_info = {
- .init = nand_device_init,
- .qdev.name = "nand",
- .qdev.size = sizeof(NANDFlashState),
- .qdev.reset = nand_reset,
- .qdev.vmsd = &vmstate_nand,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT8("manufacturer_id", NANDFlashState, manf_id, 0),
- DEFINE_PROP_UINT8("chip_id", NANDFlashState, chip_id, 0),
- DEFINE_PROP_DRIVE("drive", NANDFlashState, bdrv),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property nand_properties[] = {
+ DEFINE_PROP_UINT8("manufacturer_id", NANDFlashState, manf_id, 0),
+ DEFINE_PROP_UINT8("chip_id", NANDFlashState, chip_id, 0),
+ DEFINE_PROP_DRIVE("drive", NANDFlashState, bdrv),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void nand_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = nand_device_init;
+}
+
+static DeviceInfo nand_info = {
+ .name = "nand",
+ .size = sizeof(NANDFlashState),
+ .reset = nand_reset,
+ .vmsd = &vmstate_nand,
+ .props = nand_properties,
+ .class_init = nand_class_init,
};
static void nand_create_device(void)
* translation.)
*/
-static SysBusDeviceInfo omap_gpio_info = {
- .init = omap_gpio_init,
- .qdev.name = "omap-gpio",
- .qdev.size = sizeof(struct omap_gpif_s),
- .qdev.reset = omap_gpif_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0),
- DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property omap_gpio_properties[] = {
+ DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0),
+ DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk),
+ DEFINE_PROP_END_OF_LIST(),
};
-static SysBusDeviceInfo omap2_gpio_info = {
- .init = omap2_gpio_init,
- .qdev.name = "omap2-gpio",
- .qdev.size = sizeof(struct omap2_gpif_s),
- .qdev.reset = omap2_gpif_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0),
- DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk),
- DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]),
- DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]),
- DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]),
- DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]),
- DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]),
- DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]),
- DEFINE_PROP_END_OF_LIST()
- }
+static void omap_gpio_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = omap_gpio_init;
+}
+
+static DeviceInfo omap_gpio_info = {
+ .name = "omap-gpio",
+ .size = sizeof(struct omap_gpif_s),
+ .reset = omap_gpif_reset,
+ .props = omap_gpio_properties,
+ .class_init = omap_gpio_class_init,
+};
+
+static Property omap2_gpio_properties[] = {
+ DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0),
+ DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk),
+ DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]),
+ DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]),
+ DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]),
+ DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]),
+ DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]),
+ DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void omap2_gpio_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = omap2_gpio_init;
+}
+
+static DeviceInfo omap2_gpio_info = {
+ .name = "omap2-gpio",
+ .size = sizeof(struct omap2_gpif_s),
+ .reset = omap2_gpif_reset,
+ .props = omap2_gpio_properties,
+ .class_init = omap2_gpio_class_init,
};
static void omap_gpio_register_device(void)
return 0;
}
-static SysBusDeviceInfo omap_intc_info = {
- .init = omap_intc_init,
- .qdev.name = "omap-intc",
- .qdev.size = sizeof(struct omap_intr_handler_s),
- .qdev.reset = omap_inth_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("size", struct omap_intr_handler_s, size, 0x100),
- DEFINE_PROP_PTR("clk", struct omap_intr_handler_s, iclk),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property omap_intc_properties[] = {
+ DEFINE_PROP_UINT32("size", struct omap_intr_handler_s, size, 0x100),
+ DEFINE_PROP_PTR("clk", struct omap_intr_handler_s, iclk),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void omap_intc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = omap_intc_init;
+}
+
+static DeviceInfo omap_intc_info = {
+ .name = "omap-intc",
+ .size = sizeof(struct omap_intr_handler_s),
+ .reset = omap_inth_reset,
+ .props = omap_intc_properties,
+ .class_init = omap_intc_class_init,
};
static uint64_t omap2_inth_read(void *opaque, target_phys_addr_t addr,
return 0;
}
-static SysBusDeviceInfo omap2_intc_info = {
- .init = omap2_intc_init,
- .qdev.name = "omap2-intc",
- .qdev.size = sizeof(struct omap_intr_handler_s),
- .qdev.reset = omap_inth_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT8("revision", struct omap_intr_handler_s,
- revision, 0x21),
- DEFINE_PROP_PTR("iclk", struct omap_intr_handler_s, iclk),
- DEFINE_PROP_PTR("fclk", struct omap_intr_handler_s, fclk),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property omap2_intc_properties[] = {
+ DEFINE_PROP_UINT8("revision", struct omap_intr_handler_s,
+ revision, 0x21),
+ DEFINE_PROP_PTR("iclk", struct omap_intr_handler_s, iclk),
+ DEFINE_PROP_PTR("fclk", struct omap_intr_handler_s, fclk),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void omap2_intc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = omap2_intc_init;
+}
+
+static DeviceInfo omap2_intc_info = {
+ .name = "omap2-intc",
+ .size = sizeof(struct omap_intr_handler_s),
+ .reset = omap_inth_reset,
+ .props = omap2_intc_properties,
+ .class_init = omap2_intc_class_init,
};
static void omap_intc_register_device(void)
return 0;
}
-static SysBusDeviceInfo onenand_info = {
- .init = onenand_initfn,
- .qdev.name = "onenand",
- .qdev.size = sizeof(OneNANDState),
- .qdev.reset = onenand_system_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT16("manufacturer_id", OneNANDState, id.man, 0),
- DEFINE_PROP_UINT16("device_id", OneNANDState, id.dev, 0),
- DEFINE_PROP_UINT16("version_id", OneNANDState, id.ver, 0),
- DEFINE_PROP_INT32("shift", OneNANDState, shift, 0),
- DEFINE_PROP_DRIVE("drive", OneNANDState, bdrv),
- DEFINE_PROP_END_OF_LIST()
- }
+static Property onenand_properties[] = {
+ DEFINE_PROP_UINT16("manufacturer_id", OneNANDState, id.man, 0),
+ DEFINE_PROP_UINT16("device_id", OneNANDState, id.dev, 0),
+ DEFINE_PROP_UINT16("version_id", OneNANDState, id.ver, 0),
+ DEFINE_PROP_INT32("shift", OneNANDState, shift, 0),
+ DEFINE_PROP_DRIVE("drive", OneNANDState, bdrv),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void onenand_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = onenand_initfn;
+}
+
+static DeviceInfo onenand_info = {
+ .name = "onenand",
+ .size = sizeof(OneNANDState),
+ .reset = onenand_system_reset,
+ .props = onenand_properties,
+ .class_init = onenand_class_init,
};
static void onenand_register_device(void)
open_eth_reset(d);
}
-static SysBusDeviceInfo open_eth_info = {
- .qdev.name = "open_eth",
- .qdev.desc = "Opencores 10/100 Mbit Ethernet",
- .qdev.size = sizeof(OpenEthState),
- .qdev.reset = qdev_open_eth_reset,
- .init = sysbus_open_eth_init,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(OpenEthState, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property open_eth_properties[] = {
+ DEFINE_NIC_PROPERTIES(OpenEthState, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void open_eth_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sysbus_open_eth_init;
+}
+
+static DeviceInfo open_eth_info = {
+ .name = "open_eth",
+ .desc = "Opencores 10/100 Mbit Ethernet",
+ .size = sizeof(OpenEthState),
+ .reset = qdev_open_eth_reset,
+ .props = open_eth_properties,
+ .class_init = open_eth_class_init,
};
static void open_eth_register_devices(void)
.class_init = i440fx_class_init,
};
-static SysBusDeviceInfo i440fx_pcihost_info = {
- .init = i440fx_pcihost_initfn,
- .qdev.name = "i440FX-pcihost",
- .qdev.fw_name = "pci",
- .qdev.size = sizeof(I440FXState),
- .qdev.no_user = 1,
+static void i440fx_pcihost_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = i440fx_pcihost_initfn;
+}
+
+static DeviceInfo i440fx_pcihost_info = {
+ .name = "i440FX-pcihost",
+ .fw_name = "pci",
+ .size = sizeof(I440FXState),
+ .no_user = 1,
+ .class_init = i440fx_pcihost_class_init,
};
static void i440fx_register(void)
return 0;
}
-static int pl011_init_arm(SysBusDevice *dev)
+static int pl011_arm_init(SysBusDevice *dev)
{
return pl011_init(dev, pl011_id_arm);
}
-static int pl011_init_luminary(SysBusDevice *dev)
+static int pl011_luminary_init(SysBusDevice *dev)
{
return pl011_init(dev, pl011_id_luminary);
}
+static void pl011_arm_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pl011_arm_init;
+}
+
+static DeviceInfo pl011_arm_info = {
+ .name = "pl011",
+ .size = sizeof(pl011_state),
+ .class_init = pl011_arm_class_init,
+};
+
+static void pl011_luminary_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pl011_luminary_init;
+}
+
+static DeviceInfo pl011_luminary_info = {
+ .name = "pl011_luminary",
+ .size = sizeof(pl011_state),
+ .class_init = pl011_luminary_class_init,
+};
+
static void pl011_register_devices(void)
{
- sysbus_register_dev("pl011", sizeof(pl011_state),
- pl011_init_arm);
- sysbus_register_dev("pl011_luminary", sizeof(pl011_state),
- pl011_init_luminary);
+ sysbus_qdev_register(&pl011_arm_info);
+ sysbus_qdev_register(&pl011_luminary_info);
}
device_init(pl011_register_devices)
return 0;
}
+static void pl022_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pl022_init;
+}
+
+static DeviceInfo pl022_info = {
+ .name = "pl022",
+ .size = sizeof(pl022_state),
+ .class_init = pl022_class_init,
+};
+
static void pl022_register_devices(void)
{
- sysbus_register_dev("pl022", sizeof(pl022_state), pl022_init);
+ sysbus_qdev_register(&pl022_info);
}
device_init(pl022_register_devices)
return 0;
}
-static SysBusDeviceInfo pl031_info = {
- .init = pl031_init,
- .qdev.name = "pl031",
- .qdev.size = sizeof(pl031_state),
- .qdev.vmsd = &vmstate_pl031,
- .qdev.no_user = 1,
+static void pl031_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl031_init;
+}
+
+static DeviceInfo pl031_info = {
+ .name = "pl031",
+ .size = sizeof(pl031_state),
+ .vmsd = &vmstate_pl031,
+ .no_user = 1,
+ .class_init = pl031_class_init,
};
static void pl031_register_devices(void)
}
};
-static SysBusDeviceInfo pl041_device_info = {
- .init = pl041_init,
- .qdev.name = "pl041",
- .qdev.size = sizeof(pl041_state),
- .qdev.vmsd = &vmstate_pl041,
- .qdev.reset = pl041_device_reset,
- .qdev.no_user = 1,
- .qdev.props = (Property[]) {
- /* Non-compact FIFO depth property */
- DEFINE_PROP_UINT32("nc_fifo_depth", pl041_state,
- fifo_depth, DEFAULT_FIFO_DEPTH),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property pl041_device_properties[] = {
+ /* Non-compact FIFO depth property */
+ DEFINE_PROP_UINT32("nc_fifo_depth", pl041_state, fifo_depth, DEFAULT_FIFO_DEPTH),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pl041_device_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl041_init;
+}
+
+static DeviceInfo pl041_device_info = {
+ .name = "pl041",
+ .size = sizeof(pl041_state),
+ .vmsd = &vmstate_pl041,
+ .reset = pl041_device_reset,
+ .no_user = 1,
+ .props = pl041_device_properties,
+ .class_init = pl041_device_class_init,
};
static void pl041_register_device(void)
return pl050_init(dev, 1);
}
-static SysBusDeviceInfo pl050_kbd_info = {
- .init = pl050_init_keyboard,
- .qdev.name = "pl050_keyboard",
- .qdev.size = sizeof(pl050_state),
- .qdev.vmsd = &vmstate_pl050,
+static void pl050_kbd_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl050_init_keyboard;
+}
+
+static DeviceInfo pl050_kbd_info = {
+ .name = "pl050_keyboard",
+ .size = sizeof(pl050_state),
+ .vmsd = &vmstate_pl050,
+ .class_init = pl050_kbd_class_init,
};
-static SysBusDeviceInfo pl050_mouse_info = {
- .init = pl050_init_mouse,
- .qdev.name = "pl050_mouse",
- .qdev.size = sizeof(pl050_state),
- .qdev.vmsd = &vmstate_pl050,
+static void pl050_mouse_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl050_init_mouse;
+}
+
+static DeviceInfo pl050_mouse_info = {
+ .name = "pl050_mouse",
+ .size = sizeof(pl050_state),
+ .vmsd = &vmstate_pl050,
+ .class_init = pl050_mouse_class_init,
};
static void pl050_register_devices(void)
return pl061_init(dev, pl061_id);
}
-static SysBusDeviceInfo pl061_info = {
- .init = pl061_init_arm,
- .qdev.name = "pl061",
- .qdev.size = sizeof(pl061_state),
- .qdev.vmsd = &vmstate_pl061,
+static void pl061_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl061_init_arm;
+}
+
+static DeviceInfo pl061_info = {
+ .name = "pl061",
+ .size = sizeof(pl061_state),
+ .vmsd = &vmstate_pl061,
+ .class_init = pl061_class_init,
};
-static SysBusDeviceInfo pl061_luminary_info = {
- .init = pl061_init_luminary,
- .qdev.name = "pl061_luminary",
- .qdev.size = sizeof(pl061_state),
- .qdev.vmsd = &vmstate_pl061,
+static void pl061_luminary_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl061_init_luminary;
+}
+
+static DeviceInfo pl061_luminary_info = {
+ .name = "pl061_luminary",
+ .size = sizeof(pl061_state),
+ .vmsd = &vmstate_pl061,
+ .class_init = pl061_luminary_class_init,
};
static void pl061_register_devices(void)
return pl08x_init(dev, 2);
}
-static SysBusDeviceInfo pl080_info = {
- .init = pl080_init,
- .qdev.name = "pl080",
- .qdev.size = sizeof(pl080_state),
- .qdev.vmsd = &vmstate_pl080,
- .qdev.no_user = 1,
+static void pl080_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl080_init;
+}
+
+static DeviceInfo pl080_info = {
+ .name = "pl080",
+ .size = sizeof(pl080_state),
+ .vmsd = &vmstate_pl080,
+ .no_user = 1,
+ .class_init = pl080_class_init,
};
-static SysBusDeviceInfo pl081_info = {
- .init = pl081_init,
- .qdev.name = "pl081",
- .qdev.size = sizeof(pl080_state),
- .qdev.vmsd = &vmstate_pl080,
- .qdev.no_user = 1,
+static void pl081_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl081_init;
+}
+
+static DeviceInfo pl081_info = {
+ .name = "pl081",
+ .size = sizeof(pl080_state),
+ .vmsd = &vmstate_pl080,
+ .no_user = 1,
+ .class_init = pl081_class_init,
};
/* The PL080 and PL081 are the same except for the number of channels
return pl110_init(dev);
}
-static SysBusDeviceInfo pl110_info = {
- .init = pl110_init,
- .qdev.name = "pl110",
- .qdev.size = sizeof(pl110_state),
- .qdev.vmsd = &vmstate_pl110,
- .qdev.no_user = 1,
+static void pl110_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl110_init;
+}
+
+static DeviceInfo pl110_info = {
+ .name = "pl110",
+ .size = sizeof(pl110_state),
+ .vmsd = &vmstate_pl110,
+ .no_user = 1,
+ .class_init = pl110_class_init,
};
-static SysBusDeviceInfo pl110_versatile_info = {
- .init = pl110_versatile_init,
- .qdev.name = "pl110_versatile",
- .qdev.size = sizeof(pl110_state),
- .qdev.vmsd = &vmstate_pl110,
- .qdev.no_user = 1,
+static void pl110_versatile_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl110_versatile_init;
+}
+
+static DeviceInfo pl110_versatile_info = {
+ .name = "pl110_versatile",
+ .size = sizeof(pl110_state),
+ .vmsd = &vmstate_pl110,
+ .no_user = 1,
+ .class_init = pl110_versatile_class_init,
};
-static SysBusDeviceInfo pl111_info = {
- .init = pl111_init,
- .qdev.name = "pl111",
- .qdev.size = sizeof(pl110_state),
- .qdev.vmsd = &vmstate_pl110,
- .qdev.no_user = 1,
+static void pl111_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl111_init;
+}
+
+static DeviceInfo pl111_info = {
+ .name = "pl111",
+ .size = sizeof(pl110_state),
+ .vmsd = &vmstate_pl110,
+ .no_user = 1,
+ .class_init = pl111_class_init,
};
static void pl110_register_devices(void)
return 0;
}
-static SysBusDeviceInfo pl181_info = {
- .init = pl181_init,
- .qdev.name = "pl181",
- .qdev.size = sizeof(pl181_state),
- .qdev.vmsd = &vmstate_pl181,
- .qdev.reset = pl181_reset,
- .qdev.no_user = 1,
+static void pl181_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pl181_init;
+}
+
+static DeviceInfo pl181_info = {
+ .name = "pl181",
+ .size = sizeof(pl181_state),
+ .class_init = pl181_class_init,
+ .vmsd = &vmstate_pl181,
+ .reset = pl181_reset,
+ .no_user = 1,
};
static void pl181_register_devices(void)
{
- sysbus_register_withprop(&pl181_info);
+ sysbus_qdev_register(&pl181_info);
}
device_init(pl181_register_devices)
}
};
-static SysBusDeviceInfo pl190_info = {
- .init = pl190_init,
- .qdev.name = "pl190",
- .qdev.size = sizeof(pl190_state),
- .qdev.vmsd = &vmstate_pl190,
- .qdev.reset = pl190_reset,
- .qdev.no_user = 1,
+static void pl190_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pl190_init;
+}
+
+static DeviceInfo pl190_info = {
+ .name = "pl190",
+ .size = sizeof(pl190_state),
+ .vmsd = &vmstate_pl190,
+ .reset = pl190_reset,
+ .no_user = 1,
+ .class_init = pl190_class_init,
};
static void pl190_register_devices(void)
.class_init = ppc4xx_host_bridge_class_init,
};
-static SysBusDeviceInfo ppc4xx_pcihost_info = {
- .init = ppc4xx_pcihost_initfn,
- .qdev.name = "ppc4xx-pcihost",
- .qdev.size = sizeof(PPC4xxPCIState),
- .qdev.vmsd = &vmstate_ppc4xx_pci,
+static void ppc4xx_pcihost_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = ppc4xx_pcihost_initfn;
+}
+
+static DeviceInfo ppc4xx_pcihost_info = {
+ .name = "ppc4xx-pcihost",
+ .size = sizeof(PPC4xxPCIState),
+ .vmsd = &vmstate_ppc4xx_pci,
+ .class_init = ppc4xx_pcihost_class_init,
};
static void ppc4xx_pci_register(void)
.class_init = e500_host_bridge_class_init,
};
-static SysBusDeviceInfo e500_pcihost_info = {
- .init = e500_pcihost_initfn,
- .qdev.name = "e500-pcihost",
- .qdev.size = sizeof(PPCE500PCIState),
- .qdev.vmsd = &vmstate_ppce500_pci,
+static void e500_pcihost_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = e500_pcihost_initfn;
+}
+
+static DeviceInfo e500_pcihost_info = {
+ .name = "e500-pcihost",
+ .size = sizeof(PPCE500PCIState),
+ .vmsd = &vmstate_ppce500_pci,
+ .class_init = e500_pcihost_class_init,
};
static void e500_pci_register(void)
return 0;
}
-static SysBusDeviceInfo ppce500_spin_info = {
- .init = ppce500_spin_initfn,
- .qdev.name = "e500-spin",
- .qdev.size = sizeof(SpinState),
+static void ppce500_spin_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = ppce500_spin_initfn;
+}
+
+static DeviceInfo ppce500_spin_info = {
+ .name = "e500-spin",
+ .size = sizeof(SpinState),
+ .class_init = ppce500_spin_class_init,
};
static void ppce500_spin_register(void)
.class_init = raven_class_init,
};
-static SysBusDeviceInfo raven_pcihost_info = {
- .qdev.name = "raven-pcihost",
- .qdev.fw_name = "pci",
- .qdev.size = sizeof(PREPPCIState),
- .qdev.no_user = 1,
- .init = raven_pcihost_init,
+static void raven_pcihost_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = raven_pcihost_init;
+}
+
+static DeviceInfo raven_pcihost_info = {
+ .name = "raven-pcihost",
+ .fw_name = "pci",
+ .size = sizeof(PREPPCIState),
+ .class_init = raven_pcihost_class_init,
+ .no_user = 1,
};
static void raven_register_devices(void)
},
};
-static SysBusDeviceInfo pxa2xx_rtc_sysbus_info = {
- .init = pxa2xx_rtc_init,
- .qdev.name = "pxa2xx_rtc",
- .qdev.desc = "PXA2xx RTC Controller",
- .qdev.size = sizeof(PXA2xxRTCState),
- .qdev.vmsd = &vmstate_pxa2xx_rtc_regs,
+static void pxa2xx_rtc_sysbus_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_rtc_init;
+}
+
+static DeviceInfo pxa2xx_rtc_sysbus_info = {
+ .name = "pxa2xx_rtc",
+ .desc = "PXA2xx RTC Controller",
+ .size = sizeof(PXA2xxRTCState),
+ .vmsd = &vmstate_pxa2xx_rtc_regs,
+ .class_init = pxa2xx_rtc_sysbus_class_init,
};
/* I2C Interface */
return 0;
}
-static void pxapxa2xx_i2c_slave_class_init(ObjectClass *klass, void *data)
+static void pxa2xx_i2c_slave_class_init(ObjectClass *klass, void *data)
{
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
static DeviceInfo pxa2xx_i2c_slave_info = {
.name = "pxa2xx-i2c-slave",
.size = sizeof(PXA2xxI2CSlaveState),
- .class_init = pxapxa2xx_i2c_slave_class_init,
+ .class_init = pxa2xx_i2c_slave_class_init,
};
PXA2xxI2CState *pxa2xx_i2c_init(target_phys_addr_t base,
return s->bus;
}
-static SysBusDeviceInfo pxa2xx_i2c_info = {
- .init = pxa2xx_i2c_initfn,
- .qdev.name = "pxa2xx_i2c",
- .qdev.desc = "PXA2xx I2C Bus Controller",
- .qdev.size = sizeof(PXA2xxI2CState),
- .qdev.vmsd = &vmstate_pxa2xx_i2c,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("size", PXA2xxI2CState, region_size, 0x10000),
- DEFINE_PROP_UINT32("offset", PXA2xxI2CState, offset, 0),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property pxa2xx_i2c_properties[] = {
+ DEFINE_PROP_UINT32("size", PXA2xxI2CState, region_size, 0x10000),
+ DEFINE_PROP_UINT32("offset", PXA2xxI2CState, offset, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pxa2xx_i2c_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_i2c_initfn;
+}
+
+static DeviceInfo pxa2xx_i2c_info = {
+ .name = "pxa2xx_i2c",
+ .desc = "PXA2xx I2C Bus Controller",
+ .size = sizeof(PXA2xxI2CState),
+ .vmsd = &vmstate_pxa2xx_i2c,
+ .props = pxa2xx_i2c_properties,
+ .class_init = pxa2xx_i2c_class_init,
};
/* PXA Inter-IC Sound Controller */
return s;
}
+static void pxa2xx_ssp_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pxa2xx_ssp_init;
+}
+
+static DeviceInfo pxa2xx_ssp_info = {
+ .name = "pxa2xx-ssp",
+ .size = sizeof(PXA2xxSSPState),
+ .class_init = pxa2xx_ssp_class_init,
+};
+
static void pxa2xx_register_devices(void)
{
i2c_register_slave(&pxa2xx_i2c_slave_info);
- sysbus_register_dev("pxa2xx-ssp", sizeof(PXA2xxSSPState), pxa2xx_ssp_init);
+ sysbus_qdev_register(&pxa2xx_ssp_info);
sysbus_register_withprop(&pxa2xx_i2c_info);
sysbus_register_withprop(&pxa2xx_rtc_sysbus_info);
}
},
};
-static SysBusDeviceInfo pxa2xx_dma_info = {
- .init = pxa2xx_dma_init,
- .qdev.name = "pxa2xx-dma",
- .qdev.desc = "PXA2xx DMA controller",
- .qdev.size = sizeof(PXA2xxDMAState),
- .qdev.vmsd = &vmstate_pxa2xx_dma,
- .qdev.props = (Property[]) {
- DEFINE_PROP_INT32("channels", PXA2xxDMAState, channels, -1),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property pxa2xx_dma_properties[] = {
+ DEFINE_PROP_INT32("channels", PXA2xxDMAState, channels, -1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pxa2xx_dma_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_dma_init;
+}
+
+static DeviceInfo pxa2xx_dma_info = {
+ .name = "pxa2xx-dma",
+ .desc = "PXA2xx DMA controller",
+ .size = sizeof(PXA2xxDMAState),
+ .vmsd = &vmstate_pxa2xx_dma,
+ .props = pxa2xx_dma_properties,
+ .class_init = pxa2xx_dma_class_init,
};
static void pxa2xx_dma_register(void)
},
};
-static SysBusDeviceInfo pxa2xx_gpio_info = {
- .init = pxa2xx_gpio_initfn,
- .qdev.name = "pxa2xx-gpio",
- .qdev.desc = "PXA2xx GPIO controller",
- .qdev.size = sizeof(PXA2xxGPIOInfo),
- .qdev.props = (Property []) {
- DEFINE_PROP_INT32("lines", PXA2xxGPIOInfo, lines, 0),
- DEFINE_PROP_INT32("ncpu", PXA2xxGPIOInfo, ncpu, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property pxa2xx_gpio_properties[] = {
+ DEFINE_PROP_INT32("lines", PXA2xxGPIOInfo, lines, 0),
+ DEFINE_PROP_INT32("ncpu", PXA2xxGPIOInfo, ncpu, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pxa2xx_gpio_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_gpio_initfn;
+}
+
+static DeviceInfo pxa2xx_gpio_info = {
+ .name = "pxa2xx-gpio",
+ .desc = "PXA2xx GPIO controller",
+ .size = sizeof(PXA2xxGPIOInfo),
+ .props = pxa2xx_gpio_properties,
+ .class_init = pxa2xx_gpio_class_init,
};
static void pxa2xx_gpio_register(void)
return 0;
}
-static SysBusDeviceInfo pxa2xx_pic_info = {
- .init = pxa2xx_pic_initfn,
- .qdev.name = "pxa2xx_pic",
- .qdev.desc = "PXA2xx PIC",
- .qdev.size = sizeof(PXA2xxPICState),
- .qdev.vmsd = &vmstate_pxa2xx_pic_regs,
+static void pxa2xx_pic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_pic_initfn;
+}
+
+static DeviceInfo pxa2xx_pic_info = {
+ .name = "pxa2xx_pic",
+ .desc = "PXA2xx PIC",
+ .size = sizeof(PXA2xxPICState),
+ .vmsd = &vmstate_pxa2xx_pic_regs,
+ .class_init = pxa2xx_pic_class_init,
};
static void pxa2xx_pic_register(void)
}
};
-static SysBusDeviceInfo pxa25x_timer_dev_info = {
- .init = pxa2xx_timer_init,
- .qdev.name = "pxa25x-timer",
- .qdev.desc = "PXA25x timer",
- .qdev.size = sizeof(PXA2xxTimerInfo),
- .qdev.vmsd = &vmstate_pxa2xx_timer_regs,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA25X_FREQ),
- DEFINE_PROP_BIT("tm4", PXA2xxTimerInfo, flags,
- PXA2XX_TIMER_HAVE_TM4, false),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property pxa25x_timer_dev_properties[] = {
+ DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA25X_FREQ),
+ DEFINE_PROP_BIT("tm4", PXA2xxTimerInfo, flags,
+ PXA2XX_TIMER_HAVE_TM4, false),
+ DEFINE_PROP_END_OF_LIST(),
};
-static SysBusDeviceInfo pxa27x_timer_dev_info = {
- .init = pxa2xx_timer_init,
- .qdev.name = "pxa27x-timer",
- .qdev.desc = "PXA27x timer",
- .qdev.size = sizeof(PXA2xxTimerInfo),
- .qdev.vmsd = &vmstate_pxa2xx_timer_regs,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA27X_FREQ),
- DEFINE_PROP_BIT("tm4", PXA2xxTimerInfo, flags,
- PXA2XX_TIMER_HAVE_TM4, true),
- DEFINE_PROP_END_OF_LIST(),
- },
+static void pxa25x_timer_dev_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_timer_init;
+}
+
+static DeviceInfo pxa25x_timer_dev_info = {
+ .name = "pxa25x-timer",
+ .desc = "PXA25x timer",
+ .size = sizeof(PXA2xxTimerInfo),
+ .vmsd = &vmstate_pxa2xx_timer_regs,
+ .props = pxa25x_timer_dev_properties,
+ .class_init = pxa25x_timer_dev_class_init,
+};
+
+static Property pxa27x_timer_dev_properties[] = {
+ DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA27X_FREQ),
+ DEFINE_PROP_BIT("tm4", PXA2xxTimerInfo, flags,
+ PXA2XX_TIMER_HAVE_TM4, true),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void pxa27x_timer_dev_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = pxa2xx_timer_init;
+}
+
+static DeviceInfo pxa27x_timer_dev_info = {
+ .name = "pxa27x-timer",
+ .desc = "PXA27x timer",
+ .size = sizeof(PXA2xxTimerInfo),
+ .vmsd = &vmstate_pxa2xx_timer_regs,
+ .props = pxa27x_timer_dev_properties,
+ .class_init = pxa27x_timer_dev_class_init,
};
static void pxa2xx_timer_register(void)
return 0;
}
-static SysBusDeviceInfo realview_i2c_info = {
- .init = realview_i2c_init,
- .qdev.name = "realview_i2c",
- .qdev.size = sizeof(RealViewI2CState),
+static void realview_i2c_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = realview_i2c_init;
+}
+
+static DeviceInfo realview_i2c_info = {
+ .name = "realview_i2c",
+ .size = sizeof(RealViewI2CState),
+ .class_init = realview_i2c_class_init,
};
static void realview_register_devices(void)
return 0;
}
+static void realview_gic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = realview_gic_init;
+}
+
+static DeviceInfo realview_gic_info = {
+ .name = "realview_gic",
+ .size = sizeof(RealViewGICState),
+ .class_init = realview_gic_class_init,
+};
+
static void realview_gic_register_devices(void)
{
- sysbus_register_dev("realview_gic", sizeof(RealViewGICState),
- realview_gic_init);
+ sysbus_qdev_register(&realview_gic_info);
}
device_init(realview_gic_register_devices)
return 0;
}
-static SysBusDeviceInfo s390_virtio_bridge_info = {
- .init = s390_virtio_bridge_init,
- .qdev.name = "s390-virtio-bridge",
- .qdev.size = sizeof(SysBusDevice),
- .qdev.no_user = 1,
+static void s390_virtio_bridge_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = s390_virtio_bridge_init;
+}
+
+static DeviceInfo s390_virtio_bridge_info = {
+ .name = "s390-virtio-bridge",
+ .size = sizeof(SysBusDevice),
+ .no_user = 1,
+ .class_init = s390_virtio_bridge_class_init,
};
static void s390_virtio_register_devices(void)
return 0;
}
-static SysBusDeviceInfo sbi_info = {
- .init = sbi_init1,
- .qdev.name = "sbi",
- .qdev.size = sizeof(SBIState),
- .qdev.vmsd = &vmstate_sbi,
- .qdev.reset = sbi_reset,
+static void sbi_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sbi_init1;
+}
+
+static DeviceInfo sbi_info = {
+ .name = "sbi",
+ .size = sizeof(SBIState),
+ .vmsd = &vmstate_sbi,
+ .reset = sbi_reset,
+ .class_init = sbi_class_init,
};
static void sbi_register_devices(void)
qemu_set_irq(pic[irq_num], level);
}
-static int sh_pci_init_device(SysBusDevice *dev)
+static int sh_pci_device_init(SysBusDevice *dev)
{
SHPCIState *s;
int i;
.class_init = sh_pci_host_class_init,
};
+static void sh_pci_device_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = sh_pci_device_init;
+}
+
+static DeviceInfo sh_pci_device_info = {
+ .name = "sh_pci",
+ .size = sizeof(SHPCIState),
+ .class_init = sh_pci_device_class_init,
+};
+
static void sh_pci_register_devices(void)
{
- sysbus_register_dev("sh_pci", sizeof(SHPCIState),
- sh_pci_init_device);
+ sysbus_qdev_register(&sh_pci_device_info);
pci_qdev_register(&sh_pci_host_info);
}
return 0;
}
-static SysBusDeviceInfo slavio_intctl_info = {
- .init = slavio_intctl_init1,
- .qdev.name = "slavio_intctl",
- .qdev.size = sizeof(SLAVIO_INTCTLState),
- .qdev.vmsd = &vmstate_intctl,
- .qdev.reset = slavio_intctl_reset,
+static void slavio_intctl_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = slavio_intctl_init1;
+}
+
+static DeviceInfo slavio_intctl_info = {
+ .name = "slavio_intctl",
+ .size = sizeof(SLAVIO_INTCTLState),
+ .vmsd = &vmstate_intctl,
+ .reset = slavio_intctl_reset,
+ .class_init = slavio_intctl_class_init,
};
static void slavio_intctl_register_devices(void)
return 0;
}
-static SysBusDeviceInfo slavio_misc_info = {
- .init = slavio_misc_init1,
- .qdev.name = "slavio_misc",
- .qdev.size = sizeof(MiscState),
- .qdev.vmsd = &vmstate_misc,
- .qdev.reset = slavio_misc_reset,
+static void slavio_misc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = slavio_misc_init1;
+}
+
+static DeviceInfo slavio_misc_info = {
+ .name = "slavio_misc",
+ .size = sizeof(MiscState),
+ .vmsd = &vmstate_misc,
+ .reset = slavio_misc_reset,
+ .class_init = slavio_misc_class_init,
};
-static SysBusDeviceInfo apc_info = {
- .init = apc_init1,
- .qdev.name = "apc",
- .qdev.size = sizeof(MiscState),
+static void apc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = apc_init1;
+}
+
+static DeviceInfo apc_info = {
+ .name = "apc",
+ .size = sizeof(MiscState),
+ .class_init = apc_class_init,
};
static void slavio_misc_register_devices(void)
return 0;
}
-static SysBusDeviceInfo slavio_timer_info = {
- .init = slavio_timer_init1,
- .qdev.name = "slavio_timer",
- .qdev.size = sizeof(SLAVIO_TIMERState),
- .qdev.vmsd = &vmstate_slavio_timer,
- .qdev.reset = slavio_timer_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("num_cpus", SLAVIO_TIMERState, num_cpus, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property slavio_timer_properties[] = {
+ DEFINE_PROP_UINT32("num_cpus", SLAVIO_TIMERState, num_cpus, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void slavio_timer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = slavio_timer_init1;
+}
+
+static DeviceInfo slavio_timer_info = {
+ .name = "slavio_timer",
+ .size = sizeof(SLAVIO_TIMERState),
+ .vmsd = &vmstate_slavio_timer,
+ .reset = slavio_timer_reset,
+ .props = slavio_timer_properties,
+ .class_init = slavio_timer_class_init,
};
static void slavio_timer_register_devices(void)
return 0;
}
-static SysBusDeviceInfo smc91c111_info = {
- .init = smc91c111_init1,
- .qdev.name = "smc91c111",
- .qdev.size = sizeof(smc91c111_state),
- .qdev.vmsd = &vmstate_smc91c111,
- .qdev.reset = smc91c111_reset,
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(smc91c111_state, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property smc91c111_properties[] = {
+ DEFINE_NIC_PROPERTIES(smc91c111_state, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void smc91c111_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = smc91c111_init1;
+}
+
+static DeviceInfo smc91c111_info = {
+ .name = "smc91c111",
+ .size = sizeof(smc91c111_state),
+ .vmsd = &vmstate_smc91c111,
+ .reset = smc91c111_reset,
+ .props = smc91c111_properties,
+ .class_init = smc91c111_class_init,
};
static void smc91c111_register_devices(void)
.class_init = spapr_main_pci_host_class_init,
};
+static void spapr_phb_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = spapr_phb_init;
+}
+
+static DeviceInfo spapr_phb_info = {
+ .name = "spapr-pci-host-bridge",
+ .size = sizeof(sPAPRPHBState),
+ .class_init = spapr_phb_class_init,
+};
+
static void spapr_register_devices(void)
{
- sysbus_register_dev("spapr-pci-host-bridge", sizeof(sPAPRPHBState),
- spapr_phb_init);
+ sysbus_qdev_register(&spapr_phb_info);
pci_qdev_register(&spapr_main_pci_host_info);
}
return 0;
}
-static SysBusDeviceInfo spapr_vio_bridge_info = {
- .init = spapr_vio_bridge_init,
- .qdev.name = "spapr-vio-bridge",
- .qdev.size = sizeof(SysBusDevice),
- .qdev.no_user = 1,
+static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = spapr_vio_bridge_init;
+}
+
+static DeviceInfo spapr_vio_bridge_info = {
+ .name = "spapr-vio-bridge",
+ .size = sizeof(SysBusDevice),
+ .no_user = 1,
+ .class_init = spapr_vio_bridge_class_init,
};
static TypeInfo spapr_vio_type_info = {
return 0;
}
-static SysBusDeviceInfo sparc32_dma_info = {
- .init = sparc32_dma_init1,
- .qdev.name = "sparc32_dma",
- .qdev.size = sizeof(DMAState),
- .qdev.vmsd = &vmstate_dma,
- .qdev.reset = dma_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu),
- DEFINE_PROP_UINT32("is_ledma", DMAState, is_ledma, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property sparc32_dma_properties[] = {
+ DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu),
+ DEFINE_PROP_UINT32("is_ledma", DMAState, is_ledma, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void sparc32_dma_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sparc32_dma_init1;
+}
+
+static DeviceInfo sparc32_dma_info = {
+ .name = "sparc32_dma",
+ .size = sizeof(DMAState),
+ .vmsd = &vmstate_dma,
+ .reset = dma_reset,
+ .props = sparc32_dma_properties,
+ .class_init = sparc32_dma_class_init,
};
static void sparc32_dma_register_devices(void)
},
};
-static SysBusDeviceInfo sl_nand_info = {
- .init = sl_nand_init,
- .qdev.name = "sl-nand",
- .qdev.size = sizeof(SLNANDState),
- .qdev.vmsd = &vmstate_sl_nand_info,
- .qdev.props = (Property []) {
- DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
- DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property sl_nand_properties[] = {
+ DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
+ DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void sl_nand_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sl_nand_init;
+}
+
+static DeviceInfo sl_nand_info = {
+ .name = "sl-nand",
+ .size = sizeof(SLNANDState),
+ .vmsd = &vmstate_sl_nand_info,
+ .props = sl_nand_properties,
+ .class_init = sl_nand_class_init,
};
static VMStateDescription vmstate_spitz_kbd = {
},
};
-static SysBusDeviceInfo spitz_keyboard_info = {
- .init = spitz_keyboard_init,
- .qdev.name = "spitz-keyboard",
- .qdev.size = sizeof(SpitzKeyboardState),
- .qdev.vmsd = &vmstate_spitz_kbd,
- .qdev.props = (Property []) {
- DEFINE_PROP_END_OF_LIST(),
- },
+static Property spitz_keyboard_properties[] = {
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = spitz_keyboard_init;
+}
+
+static DeviceInfo spitz_keyboard_info = {
+ .name = "spitz-keyboard",
+ .size = sizeof(SpitzKeyboardState),
+ .vmsd = &vmstate_spitz_kbd,
+ .props = spitz_keyboard_properties,
+ .class_init = spitz_keyboard_class_init,
};
static const VMStateDescription vmstate_corgi_ssp_regs = {
k->transfer = corgi_ssp_transfer;
}
-
static DeviceInfo corgi_ssp_info = {
.name = "corgi-ssp",
.size = sizeof(CorgiSSPState),
.class_init = stellaris_ssi_bus_class_init,
};
+static void stellaris_i2c_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = stellaris_i2c_init;
+}
+
+static DeviceInfo stellaris_i2c_info = {
+ .name = "stellaris-i2c",
+ .size = sizeof(stellaris_i2c_state),
+ .class_init = stellaris_i2c_class_init,
+};
+
+static void stellaris_gptm_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = stellaris_gptm_init;
+}
+
+static DeviceInfo stellaris_gptm_info = {
+ .name = "stellaris-gptm",
+ .size = sizeof(gptm_state),
+ .class_init = stellaris_gptm_class_init,
+};
+
+static void stellaris_adc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = stellaris_adc_init;
+}
+
+static DeviceInfo stellaris_adc_info = {
+ .name = "stellaris-adc",
+ .size = sizeof(stellaris_adc_state),
+ .class_init = stellaris_adc_class_init,
+};
+
static void stellaris_register_devices(void)
{
- sysbus_register_dev("stellaris-i2c", sizeof(stellaris_i2c_state),
- stellaris_i2c_init);
- sysbus_register_dev("stellaris-gptm", sizeof(gptm_state),
- stellaris_gptm_init);
- sysbus_register_dev("stellaris-adc", sizeof(stellaris_adc_state),
- stellaris_adc_init);
+ sysbus_qdev_register(&stellaris_i2c_info);
+ sysbus_qdev_register(&stellaris_gptm_info);
+ sysbus_qdev_register(&stellaris_adc_info);
ssi_register_slave(&stellaris_ssi_bus_info);
}
return 0;
}
-static SysBusDeviceInfo stellaris_enet_info = {
- .init = stellaris_enet_init,
- .qdev.name = "stellaris_enet",
- .qdev.size = sizeof(stellaris_enet_state),
- .qdev.props = (Property[]) {
- DEFINE_NIC_PROPERTIES(stellaris_enet_state, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property stellaris_enet_properties[] = {
+ DEFINE_NIC_PROPERTIES(stellaris_enet_state, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void stellaris_enet_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = stellaris_enet_init;
+}
+
+static DeviceInfo stellaris_enet_info = {
+ .name = "stellaris_enet",
+ .size = sizeof(stellaris_enet_state),
+ .props = stellaris_enet_properties,
+ .class_init = stellaris_enet_class_init,
};
static void stellaris_enet_register_devices(void)
},
};
-static SysBusDeviceInfo strongarm_pic_info = {
- .init = strongarm_pic_initfn,
- .qdev.name = "strongarm_pic",
- .qdev.desc = "StrongARM PIC",
- .qdev.size = sizeof(StrongARMPICState),
- .qdev.vmsd = &vmstate_strongarm_pic_regs,
+static void strongarm_pic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = strongarm_pic_initfn;
+}
+
+static DeviceInfo strongarm_pic_info = {
+ .name = "strongarm_pic",
+ .desc = "StrongARM PIC",
+ .size = sizeof(StrongARMPICState),
+ .vmsd = &vmstate_strongarm_pic_regs,
+ .class_init = strongarm_pic_class_init,
};
/* Real-Time Clock */
},
};
-static SysBusDeviceInfo strongarm_rtc_sysbus_info = {
- .init = strongarm_rtc_init,
- .qdev.name = "strongarm-rtc",
- .qdev.desc = "StrongARM RTC Controller",
- .qdev.size = sizeof(StrongARMRTCState),
- .qdev.vmsd = &vmstate_strongarm_rtc_regs,
+static void strongarm_rtc_sysbus_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = strongarm_rtc_init;
+}
+
+static DeviceInfo strongarm_rtc_sysbus_info = {
+ .name = "strongarm-rtc",
+ .desc = "StrongARM RTC Controller",
+ .size = sizeof(StrongARMRTCState),
+ .vmsd = &vmstate_strongarm_rtc_regs,
+ .class_init = strongarm_rtc_sysbus_class_init,
};
/* GPIO */
},
};
-static SysBusDeviceInfo strongarm_gpio_info = {
- .init = strongarm_gpio_initfn,
- .qdev.name = "strongarm-gpio",
- .qdev.desc = "StrongARM GPIO controller",
- .qdev.size = sizeof(StrongARMGPIOInfo),
+static void strongarm_gpio_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = strongarm_gpio_initfn;
+}
+
+static DeviceInfo strongarm_gpio_info = {
+ .name = "strongarm-gpio",
+ .desc = "StrongARM GPIO controller",
+ .size = sizeof(StrongARMGPIOInfo),
+ .class_init = strongarm_gpio_class_init,
};
/* Peripheral Pin Controller */
},
};
-static SysBusDeviceInfo strongarm_ppc_info = {
- .init = strongarm_ppc_init,
- .qdev.name = "strongarm-ppc",
- .qdev.desc = "StrongARM PPC controller",
- .qdev.size = sizeof(StrongARMPPCInfo),
+static void strongarm_ppc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = strongarm_ppc_init;
+}
+
+static DeviceInfo strongarm_ppc_info = {
+ .name = "strongarm-ppc",
+ .desc = "StrongARM PPC controller",
+ .size = sizeof(StrongARMPPCInfo),
+ .class_init = strongarm_ppc_class_init,
};
/* UART Ports */
},
};
-static SysBusDeviceInfo strongarm_uart_info = {
- .init = strongarm_uart_init,
- .qdev.name = "strongarm-uart",
- .qdev.desc = "StrongARM UART controller",
- .qdev.size = sizeof(StrongARMUARTState),
- .qdev.reset = strongarm_uart_reset,
- .qdev.vmsd = &vmstate_strongarm_uart_regs,
- .qdev.props = (Property[]) {
- DEFINE_PROP_CHR("chardev", StrongARMUARTState, chr),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property strongarm_uart_properties[] = {
+ DEFINE_PROP_CHR("chardev", StrongARMUARTState, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void strongarm_uart_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = strongarm_uart_init;
+}
+
+static DeviceInfo strongarm_uart_info = {
+ .name = "strongarm-uart",
+ .desc = "StrongARM UART controller",
+ .size = sizeof(StrongARMUARTState),
+ .reset = strongarm_uart_reset,
+ .vmsd = &vmstate_strongarm_uart_regs,
+ .props = strongarm_uart_properties,
+ .class_init = strongarm_uart_class_init,
};
/* Synchronous Serial Ports */
},
};
-static SysBusDeviceInfo strongarm_ssp_info = {
- .init = strongarm_ssp_init,
- .qdev.name = "strongarm-ssp",
- .qdev.desc = "StrongARM SSP controller",
- .qdev.size = sizeof(StrongARMSSPState),
- .qdev.reset = strongarm_ssp_reset,
- .qdev.vmsd = &vmstate_strongarm_ssp_regs,
+static void strongarm_ssp_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = strongarm_ssp_init;
+}
+
+static DeviceInfo strongarm_ssp_info = {
+ .name = "strongarm-ssp",
+ .desc = "StrongARM SSP controller",
+ .size = sizeof(StrongARMSSPState),
+ .reset = strongarm_ssp_reset,
+ .vmsd = &vmstate_strongarm_ssp_regs,
+ .class_init = strongarm_ssp_class_init,
};
/* Main CPU functions */
return 0;
}
-static SysBusDeviceInfo sun4c_intctl_info = {
- .init = sun4c_intctl_init1,
- .qdev.name = "sun4c_intctl",
- .qdev.size = sizeof(Sun4c_INTCTLState),
- .qdev.vmsd = &vmstate_sun4c_intctl,
- .qdev.reset = sun4c_intctl_reset,
+static void sun4c_intctl_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = sun4c_intctl_init1;
+}
+
+static DeviceInfo sun4c_intctl_info = {
+ .name = "sun4c_intctl",
+ .size = sizeof(Sun4c_INTCTLState),
+ .vmsd = &vmstate_sun4c_intctl,
+ .reset = sun4c_intctl_reset,
+ .class_init = sun4c_intctl_class_init,
};
static void sun4c_intctl_register_devices(void)
return 0;
}
-static SysBusDeviceInfo idreg_info = {
- .init = idreg_init1,
- .qdev.name = "macio_idreg",
- .qdev.size = sizeof(IDRegState),
+static void idreg_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = idreg_init1;
+}
+
+static DeviceInfo idreg_info = {
+ .name = "macio_idreg",
+ .size = sizeof(IDRegState),
+ .class_init = idreg_class_init,
};
static void idreg_register_devices(void)
return 0;
}
-static SysBusDeviceInfo afx_info = {
- .init = afx_init1,
- .qdev.name = "tcx_afx",
- .qdev.size = sizeof(AFXState),
+static void afx_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = afx_init1;
+}
+
+static DeviceInfo afx_info = {
+ .name = "tcx_afx",
+ .size = sizeof(AFXState),
+ .class_init = afx_class_init,
};
static void afx_register_devices(void)
return 0;
}
-static SysBusDeviceInfo prom_info = {
- .init = prom_init1,
- .qdev.name = "openprom",
- .qdev.size = sizeof(PROMState),
- .qdev.props = (Property[]) {
- {/* end of property list */}
- }
+static Property prom_properties[] = {
+ {/* end of property list */},
+};
+
+static void prom_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = prom_init1;
+}
+
+static DeviceInfo prom_info = {
+ .name = "openprom",
+ .size = sizeof(PROMState),
+ .props = prom_properties,
+ .class_init = prom_class_init,
};
static void prom_register_devices(void)
sysbus_mmio_map(s, 0, addr);
}
-static SysBusDeviceInfo ram_info = {
- .init = ram_init1,
- .qdev.name = "memory",
- .qdev.size = sizeof(RamDevice),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT64("size", RamDevice, size, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ram_properties[] = {
+ DEFINE_PROP_UINT64("size", RamDevice, size, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ram_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = ram_init1;
+}
+
+static DeviceInfo ram_info = {
+ .name = "memory",
+ .size = sizeof(RamDevice),
+ .props = ram_properties,
+ .class_init = ram_class_init,
};
static void ram_register_devices(void)
return 0;
}
-static SysBusDeviceInfo iommu_info = {
- .init = iommu_init1,
- .qdev.name = "iommu",
- .qdev.size = sizeof(IOMMUState),
- .qdev.vmsd = &vmstate_iommu,
- .qdev.reset = iommu_reset,
- .qdev.props = (Property[]) {
- DEFINE_PROP_HEX32("version", IOMMUState, version, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property iommu_properties[] = {
+ DEFINE_PROP_HEX32("version", IOMMUState, version, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void iommu_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = iommu_init1;
+}
+
+static DeviceInfo iommu_info = {
+ .name = "iommu",
+ .size = sizeof(IOMMUState),
+ .vmsd = &vmstate_iommu,
+ .reset = iommu_reset,
+ .props = iommu_properties,
+ .class_init = iommu_class_init,
};
static void iommu_register_devices(void)
return 0;
}
-static SysBusDeviceInfo prom_info = {
- .init = prom_init1,
- .qdev.name = "openprom",
- .qdev.size = sizeof(PROMState),
- .qdev.props = (Property[]) {
- {/* end of property list */}
- }
+static Property prom_properties[] = {
+ {/* end of property list */},
+};
+
+static void prom_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = prom_init1;
+}
+
+static DeviceInfo prom_info = {
+ .name = "openprom",
+ .size = sizeof(PROMState),
+ .props = prom_properties,
+ .class_init = prom_class_init,
};
static void prom_register_devices(void)
sysbus_mmio_map(s, 0, addr);
}
-static SysBusDeviceInfo ram_info = {
- .init = ram_init1,
- .qdev.name = "memory",
- .qdev.size = sizeof(RamDevice),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT64("size", RamDevice, size, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property ram_properties[] = {
+ DEFINE_PROP_UINT64("size", RamDevice, size, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void ram_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = ram_init1;
+}
+
+static DeviceInfo ram_info = {
+ .name = "memory",
+ .size = sizeof(RamDevice),
+ .props = ram_properties,
+ .class_init = ram_class_init,
};
static void ram_register_devices(void)
static int sysbus_device_init(DeviceState *dev, DeviceInfo *base)
{
- SysBusDeviceInfo *info = container_of(base, SysBusDeviceInfo, qdev);
+ SysBusDevice *sd = SYS_BUS_DEVICE(dev);
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_GET_CLASS(sd);
- return info->init(sysbus_from_qdev(dev));
+ return sbc->init(sd);
}
-void sysbus_register_withprop(SysBusDeviceInfo *info)
+void sysbus_qdev_register_subclass(DeviceInfo *info, const char *parent)
{
- info->qdev.init = sysbus_device_init;
- info->qdev.bus_info = &system_bus_info;
+ info->init = sysbus_device_init;
+ info->bus_info = &system_bus_info;
- assert(info->qdev.size >= sizeof(SysBusDevice));
- qdev_register(&info->qdev);
+ assert(info->size >= sizeof(SysBusDevice));
+ qdev_register_subclass(info, parent);
}
-void sysbus_register_dev(const char *name, size_t size, sysbus_initfn init)
+void sysbus_qdev_register(DeviceInfo *info)
{
- SysBusDeviceInfo *info;
-
- info = g_malloc0(sizeof(*info));
- info->qdev.name = g_strdup(name);
- info->qdev.size = size;
- info->init = init;
- sysbus_register_withprop(info);
+ sysbus_qdev_register_subclass(info, TYPE_SYS_BUS_DEVICE);
}
DeviceState *sysbus_create_varargs(const char *name,
{
return get_system_memory();
}
+
+static TypeInfo sysbus_device_type_info = {
+ .name = TYPE_SYS_BUS_DEVICE,
+ .parent = TYPE_DEVICE,
+ .instance_size = sizeof(SysBusDevice),
+ .abstract = true,
+ .class_size = sizeof(SysBusDeviceClass),
+};
+
+static void sysbus_register(void)
+{
+ type_register_static(&sysbus_device_type_info);
+}
+
+device_init(sysbus_register);
typedef struct SysBusDevice SysBusDevice;
+#define TYPE_SYS_BUS_DEVICE "sys-bus-device"
+#define SYS_BUS_DEVICE(obj) \
+ OBJECT_CHECK(SysBusDevice, (obj), TYPE_SYS_BUS_DEVICE)
+#define SYS_BUS_DEVICE_CLASS(klass) \
+ OBJECT_CLASS_CHECK(SysBusDeviceClass, (klass), TYPE_SYS_BUS_DEVICE)
+#define SYS_BUS_DEVICE_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(SysBusDeviceClass, (obj), TYPE_SYS_BUS_DEVICE)
+
+typedef struct SysBusDeviceClass {
+ DeviceClass parent_class;
+
+ int (*init)(SysBusDevice *dev);
+} SysBusDeviceClass;
+
struct SysBusDevice {
DeviceState qdev;
int num_irq;
pio_addr_t pio[QDEV_MAX_PIO];
};
-typedef int (*sysbus_initfn)(SysBusDevice *dev);
-
/* Macros to compensate for lack of type inheritance in C. */
#define sysbus_from_qdev(dev) ((SysBusDevice *)(dev))
#define FROM_SYSBUS(type, dev) DO_UPCAST(type, busdev, dev)
-typedef struct {
- DeviceInfo qdev;
- sysbus_initfn init;
-} SysBusDeviceInfo;
+#define sysbus_register_withprop(info) sysbus_qdev_register(info)
+void sysbus_qdev_register(DeviceInfo *info);
+void sysbus_qdev_register_subclass(DeviceInfo *info, const char *parent);
-void sysbus_register_dev(const char *name, size_t size, sysbus_initfn init);
-void sysbus_register_withprop(SysBusDeviceInfo *info);
void *sysbus_new(void);
void sysbus_init_mmio(SysBusDevice *dev, MemoryRegion *memory);
MemoryRegion *sysbus_mmio_get_region(SysBusDevice *dev, int n);
return;
}
-static SysBusDeviceInfo tcx_info = {
- .init = tcx_init1,
- .qdev.name = "SUNW,tcx",
- .qdev.size = sizeof(TCXState),
- .qdev.reset = tcx_reset,
- .qdev.vmsd = &vmstate_tcx,
- .qdev.props = (Property[]) {
- DEFINE_PROP_TADDR("addr", TCXState, addr, -1),
- DEFINE_PROP_HEX32("vram_size", TCXState, vram_size, -1),
- DEFINE_PROP_UINT16("width", TCXState, width, -1),
- DEFINE_PROP_UINT16("height", TCXState, height, -1),
- DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property tcx_properties[] = {
+ DEFINE_PROP_TADDR("addr", TCXState, addr, -1),
+ DEFINE_PROP_HEX32("vram_size", TCXState, vram_size, -1),
+ DEFINE_PROP_UINT16("width", TCXState, width, -1),
+ DEFINE_PROP_UINT16("height", TCXState, height, -1),
+ DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void tcx_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = tcx_init1;
+}
+
+static DeviceInfo tcx_info = {
+ .name = "SUNW,tcx",
+ .size = sizeof(TCXState),
+ .reset = tcx_reset,
+ .vmsd = &vmstate_tcx,
+ .props = tcx_properties,
+ .class_init = tcx_class_init,
};
static void tcx_register_devices(void)
return 0;
}
-static SysBusDeviceInfo tusb6010_info = {
- .init = tusb6010_init,
- .qdev.name = "tusb6010",
- .qdev.size = sizeof(TUSBState),
- .qdev.reset = tusb6010_reset,
+static void tusb6010_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = tusb6010_init;
+}
+
+static DeviceInfo tusb6010_info = {
+ .name = "tusb6010",
+ .size = sizeof(TUSBState),
+ .reset = tusb6010_reset,
+ .class_init = tusb6010_class_init,
};
static void tusb6010_register_device(void)
.class_init = unin_internal_pci_host_class_init,
};
-static SysBusDeviceInfo sysbus_unin_pci_host_info = {
- .qdev.name = "uni-north-pci-pcihost",
- .qdev.size = sizeof(UNINState),
- .init = pci_unin_main_init_device,
+static void pci_unin_main_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = pci_unin_main_init_device;
+}
+
+static DeviceInfo pci_unin_main_info = {
+ .name = "uni-north-pci-pchost",
+ .size = sizeof(UNINState),
+ .class_init = pci_unin_main_class_init,
};
-static SysBusDeviceInfo sysbus_u3_agp_pci_host_info = {
- .qdev.name = "u3-agp-pcihost",
- .qdev.size = sizeof(UNINState),
- .init = pci_u3_agp_init_device,
+static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = pci_u3_agp_init_device;
+}
+
+static DeviceInfo pci_u3_agp_info = {
+ .name = "u3-agp-pcihost",
+ .size = sizeof(UNINState),
+ .class_init = pci_u3_agp_class_init,
};
-static SysBusDeviceInfo sysbus_unin_agp_pci_host_info = {
- .qdev.name = "uni-north-agp-pcihost",
- .qdev.size = sizeof(UNINState),
- .init = pci_unin_agp_init_device,
+static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = pci_unin_agp_init_device;
+}
+
+static DeviceInfo pci_unin_agp_info = {
+ .name = "uni-north-agp-pcihost",
+ .size = sizeof(UNINState),
+ .class_init = pci_unin_agp_class_init,
};
-static SysBusDeviceInfo sysbus_unin_internal_pci_host_info = {
- .qdev.name = "uni-north-internal-pci-pcihost",
- .qdev.size = sizeof(UNINState),
- .init = pci_unin_internal_init_device,
+static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = pci_unin_internal_init_device;
+}
+
+static DeviceInfo pci_unin_internal_info = {
+ .name = "uni-north-internal-pci-pichost",
+ .size = sizeof(UNINState),
+ .class_init = pci_unin_internal_class_init,
};
static void unin_register_devices(void)
{
- sysbus_register_withprop(&sysbus_unin_pci_host_info);
pci_qdev_register(&unin_main_pci_host_info);
-
- sysbus_register_withprop(&sysbus_u3_agp_pci_host_info);
pci_qdev_register(&u3_agp_pci_host_info);
-
- sysbus_register_withprop(&sysbus_unin_agp_pci_host_info);
pci_qdev_register(&unin_agp_pci_host_info);
-
- sysbus_register_withprop(&sysbus_unin_internal_pci_host_info);
pci_qdev_register(&unin_internal_pci_host_info);
+
+ sysbus_register_withprop(&pci_unin_main_info);
+ sysbus_register_withprop(&pci_u3_agp_info);
+ sysbus_register_withprop(&pci_unin_agp_info);
+ sysbus_register_withprop(&pci_unin_internal_info);
}
device_init(unin_register_devices)
.class_init = ohci_pci_class_init,
};
-static SysBusDeviceInfo ohci_sysbus_info = {
- .init = ohci_init_pxa,
- .qdev.name = "sysbus-ohci",
- .qdev.desc = "OHCI USB Controller",
- .qdev.size = sizeof(OHCISysBusState),
- .qdev.props = (Property[]) {
+static void ohci_sysbus_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = ohci_init_pxa;
+}
+
+static DeviceInfo ohci_sysbus_info = {
+ .name = "sysbus-ohci",
+ .desc = "OHCI USB Controller",
+ .size = sizeof(OHCISysBusState),
+ .class_init = ohci_sysbus_class_init,
+ .props = (Property[]) {
DEFINE_PROP_UINT32("num-ports", OHCISysBusState, num_ports, 3),
DEFINE_PROP_TADDR("dma-offset", OHCISysBusState, dma_offset, 3),
DEFINE_PROP_END_OF_LIST(),
.class_init = versatile_pci_host_class_init,
};
+static void pci_vpb_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pci_vpb_init;
+}
+
+static DeviceInfo pci_vpb_info = {
+ .name = "versatile_pci",
+ .size = sizeof(PCIVPBState),
+ .class_init = pci_vpb_class_init,
+};
+
+static void pci_realview_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = pci_realview_init;
+}
+
+static DeviceInfo pci_realview_info = {
+ .name = "realview_pci",
+ .size = sizeof(PCIVPBState),
+ .class_init = pci_realview_class_init,
+};
+
static void versatile_pci_register_devices(void)
{
- sysbus_register_dev("versatile_pci", sizeof(PCIVPBState), pci_vpb_init);
- sysbus_register_dev("realview_pci", sizeof(PCIVPBState),
- pci_realview_init);
+ sysbus_qdev_register(&pci_vpb_info);
+ sysbus_qdev_register(&pci_realview_info);
pci_qdev_register(&versatile_pci_host_info);
}
machine_init(versatile_machine_init);
-static SysBusDeviceInfo vpb_sic_info = {
- .init = vpb_sic_init,
- .qdev.name = "versatilepb_sic",
- .qdev.size = sizeof(vpb_sic_state),
- .qdev.vmsd = &vmstate_vpb_sic,
- .qdev.no_user = 1,
+static void vpb_sic_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = vpb_sic_init;
+}
+
+static DeviceInfo vpb_sic_info = {
+ .name = "versatilepb_sic",
+ .size = sizeof(vpb_sic_state),
+ .vmsd = &vmstate_vpb_sic,
+ .no_user = 1,
+ .class_init = vpb_sic_class_init,
};
static void versatilepb_register_devices(void)
return 0;
}
-static SysBusDeviceInfo xgmac_enet_info = {
- .init = xgmac_enet_init,
- .qdev.name = "xgmac",
- .qdev.size = sizeof(struct XgmacState),
- .qdev.vmsd = &vmstate_xgmac,
- .qdev.props = (Property[]) {
+static void xgmac_enet_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sbc->init = xgmac_enet_init;
+}
+
+static DeviceInfo xgmac_enet_info = {
+ .name = "xgmac",
+ .size = sizeof(struct XgmacState),
+ .vmsd = &vmstate_xgmac,
+ .class_init = xgmac_enet_class_init,
+ .props = (Property[]) {
DEFINE_NIC_PROPERTIES(struct XgmacState, conf),
DEFINE_PROP_END_OF_LIST(),
}
return 0;
}
-static SysBusDeviceInfo axidma_info = {
- .init = xilinx_axidma_init,
- .qdev.name = "xilinx,axidma",
- .qdev.size = sizeof(struct XilinxAXIDMA),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("freqhz", struct XilinxAXIDMA, freqhz, 50000000),
- DEFINE_PROP_PTR("dmach", struct XilinxAXIDMA, dmach),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property axidma_properties[] = {
+ DEFINE_PROP_UINT32("freqhz", struct XilinxAXIDMA, freqhz, 50000000),
+ DEFINE_PROP_PTR("dmach", struct XilinxAXIDMA, dmach),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void axidma_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = xilinx_axidma_init;
+}
+
+static DeviceInfo axidma_info = {
+ .name = "xilinx,axidma",
+ .size = sizeof(struct XilinxAXIDMA),
+ .props = axidma_properties,
+ .class_init = axidma_class_init,
};
static void xilinx_axidma_register(void)
return 0;
}
-static SysBusDeviceInfo xilinx_enet_info = {
- .init = xilinx_enet_init,
- .qdev.name = "xilinx,axienet",
- .qdev.size = sizeof(struct XilinxAXIEnet),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("phyaddr", struct XilinxAXIEnet, c_phyaddr, 7),
- DEFINE_PROP_UINT32("c_rxmem", struct XilinxAXIEnet, c_rxmem, 0x1000),
- DEFINE_PROP_UINT32("c_txmem", struct XilinxAXIEnet, c_txmem, 0x1000),
- DEFINE_PROP_PTR("dmach", struct XilinxAXIEnet, dmach),
- DEFINE_NIC_PROPERTIES(struct XilinxAXIEnet, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property xilinx_enet_properties[] = {
+ DEFINE_PROP_UINT32("phyaddr", struct XilinxAXIEnet, c_phyaddr, 7),
+ DEFINE_PROP_UINT32("c_rxmem", struct XilinxAXIEnet, c_rxmem, 0x1000),
+ DEFINE_PROP_UINT32("c_txmem", struct XilinxAXIEnet, c_txmem, 0x1000),
+ DEFINE_PROP_PTR("dmach", struct XilinxAXIEnet, dmach),
+ DEFINE_NIC_PROPERTIES(struct XilinxAXIEnet, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void xilinx_enet_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = xilinx_enet_init;
+}
+
+static DeviceInfo xilinx_enet_info = {
+ .name = "xilinx,axienet",
+ .size = sizeof(struct XilinxAXIEnet),
+ .props = xilinx_enet_properties,
+ .class_init = xilinx_enet_class_init,
};
static void xilinx_enet_register(void)
{
return 0;
}
-static SysBusDeviceInfo xilinx_ethlite_info = {
- .init = xilinx_ethlite_init,
- .qdev.name = "xilinx,ethlite",
- .qdev.size = sizeof(struct xlx_ethlite),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("txpingpong", struct xlx_ethlite, c_tx_pingpong, 1),
- DEFINE_PROP_UINT32("rxpingpong", struct xlx_ethlite, c_rx_pingpong, 1),
- DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property xilinx_ethlite_properties[] = {
+ DEFINE_PROP_UINT32("txpingpong", struct xlx_ethlite, c_tx_pingpong, 1),
+ DEFINE_PROP_UINT32("rxpingpong", struct xlx_ethlite, c_rx_pingpong, 1),
+ DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void xilinx_ethlite_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = xilinx_ethlite_init;
+}
+
+static DeviceInfo xilinx_ethlite_info = {
+ .name = "xilinx,ethlite",
+ .size = sizeof(struct xlx_ethlite),
+ .props = xilinx_ethlite_properties,
+ .class_init = xilinx_ethlite_class_init,
};
static void xilinx_ethlite_register(void)
return 0;
}
-static SysBusDeviceInfo xilinx_intc_info = {
- .init = xilinx_intc_init,
- .qdev.name = "xilinx,intc",
- .qdev.size = sizeof(struct xlx_pic),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("kind-of-intr", struct xlx_pic, c_kind_of_intr, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property xilinx_intc_properties[] = {
+ DEFINE_PROP_UINT32("kind-of-intr", struct xlx_pic, c_kind_of_intr, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void xilinx_intc_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = xilinx_intc_init;
+}
+
+static DeviceInfo xilinx_intc_info = {
+ .name = "xilinx,intc",
+ .size = sizeof(struct xlx_pic),
+ .props = xilinx_intc_properties,
+ .class_init = xilinx_intc_class_init,
};
static void xilinx_intc_register(void)
return 0;
}
-static SysBusDeviceInfo xilinx_timer_info = {
- .init = xilinx_timer_init,
- .qdev.name = "xilinx,timer",
- .qdev.size = sizeof(struct timerblock),
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("frequency", struct timerblock, freq_hz, 0),
- DEFINE_PROP_UINT32("nr-timers", struct timerblock, nr_timers, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property xilinx_timer_properties[] = {
+ DEFINE_PROP_UINT32("frequency", struct timerblock, freq_hz, 0),
+ DEFINE_PROP_UINT32("nr-timers", struct timerblock, nr_timers, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void xilinx_timer_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = xilinx_timer_init;
+}
+
+static DeviceInfo xilinx_timer_info = {
+ .name = "xilinx,timer",
+ .size = sizeof(struct timerblock),
+ .props = xilinx_timer_properties,
+ .class_init = xilinx_timer_class_init,
};
static void xilinx_timer_register(void)
return 0;
}
+static void xilinx_uartlite_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+
+ sdc->init = xilinx_uartlite_init;
+}
+
+static DeviceInfo xilinx_uartlite_info = {
+ .name = "xilinx,uartlite",
+ .size = sizeof (struct xlx_uartlite),
+ .class_init = xilinx_uartlite_class_init,
+};
+
static void xilinx_uart_register(void)
{
- sysbus_register_dev("xilinx,uartlite", sizeof (struct xlx_uartlite),
- xilinx_uartlite_init);
+ sysbus_qdev_register(&xilinx_uartlite_info);
}
device_init(xilinx_uart_register)
},
};
-static SysBusDeviceInfo scoop_sysbus_info = {
- .init = scoop_init,
- .qdev.name = "scoop",
- .qdev.desc = "Scoop2 Sharp custom ASIC",
- .qdev.size = sizeof(ScoopInfo),
- .qdev.vmsd = &vmstate_scoop_regs,
- .qdev.props = (Property[]) {
- DEFINE_PROP_END_OF_LIST(),
- }
+static Property scoop_sysbus_properties[] = {
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void scoop_sysbus_class_init(ObjectClass *klass, void *data)
+{
+ SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
+
+ k->init = scoop_init;
+}
+
+static DeviceInfo scoop_sysbus_info = {
+ .name = "scoop",
+ .desc = "Scoop2 Sharp custom ASIC",
+ .size = sizeof(ScoopInfo),
+ .vmsd = &vmstate_scoop_regs,
+ .props = scoop_sysbus_properties,
+ .class_init = scoop_sysbus_class_init,
};
static void scoop_register(void)
projects / lisovros / qemu_apohw.git / commitdiff