SJA1000 clockout divisors listed explicitly.
authorppisa <ppisa>
Fri, 22 Jul 2005 13:05:24 +0000 (13:05 +0000)
committerppisa <ppisa>
Fri, 22 Jul 2005 13:05:24 +0000 (13:05 +0000)
lincan/include/sja1000.h
lincan/include/sja1000p.h

index fa04cce..574fefc 100644 (file)
@@ -102,6 +102,14 @@ enum sja1000_BASIC_IR {
 /* Clock Divider Register */
 enum sja1000_CDR {
        /* f_out = f_osc/(2*(CDR[2:0]+1)) or f_osc if CDR[2:0]==7 */
+       sjaCDR_CLKOUT_DIV1 = 7,
+       sjaCDR_CLKOUT_DIV2 = 0,
+       sjaCDR_CLKOUT_DIV4 = 1,
+       sjaCDR_CLKOUT_DIV6 = 2,
+       sjaCDR_CLKOUT_DIV8 = 3,
+       sjaCDR_CLKOUT_DIV10 = 4,
+       sjaCDR_CLKOUT_DIV12 = 5,
+       sjaCDR_CLKOUT_DIV14 = 6,
        sjaCDR_CLKOUT_MASK = 7,
        sjaCDR_CLK_OFF = 1<<3,  // Clock Off
        sjaCDR_RXINPEN = 1<<5,  // TX1 output is RX irq output
index 9ca166b..1aa0923 100644 (file)
@@ -185,6 +185,14 @@ enum sja1000_CDR {
        sjaCDR_RXINPEN = 1<<5,
        sjaCDR_CLK_OFF = 1<<3,
 /// f_out = f_osc/(2*(CDR[2:0]+1)) or f_osc if CDR[2:0]==7
+       sjaCDR_CLKOUT_DIV1 = 7,
+       sjaCDR_CLKOUT_DIV2 = 0,
+       sjaCDR_CLKOUT_DIV4 = 1,
+       sjaCDR_CLKOUT_DIV6 = 2,
+       sjaCDR_CLKOUT_DIV8 = 3,
+       sjaCDR_CLKOUT_DIV10 = 4,
+       sjaCDR_CLKOUT_DIV12 = 5,
+       sjaCDR_CLKOUT_DIV14 = 6,
        sjaCDR_CLKOUT_MASK = 7
 };