LinCAN sources go through big white-space cleanup.

[lincan.git] / lincan / src / msmcan.c

diff --git a/lincan/src/msmcan.c b/lincan/src/msmcan.c
index f24bfa5c5bb34347e6439637409d5af0733d14d8..a1801ec4bc4ceebf397ae7a1de64eafb09955a8a 100644 (file)
--- a/lincan/src/msmcan.c
+++ b/lincan/src/msmcan.c
@@ -58,13 +58,13 @@ int msmcan_request_io(struct candevice_t *candev)
                CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
                return -ENODEV;
        } else {
-               DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, 
+               DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
                         candev->io_addr + IO_RANGE - 1);
        }
        return 0;
 }
 
-/* The function template_release_io is used to free the previously reserved 
+/* The function template_release_io is used to free the previously reserved
  * io-memory. In case you reserved more memory, don't forget to free it here.
  */
 int msmcan_release_io(struct candevice_t *candev)
@@ -93,7 +93,7 @@ int msmcan_reset(struct candevice_t *candev)
        if(0) {
                int tic=jiffies;
                int tac;
-               
+
                msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
                /*CLKOUT stopped (iCPU_CEN=0) */
                msmcan_write_register(iCPU_DSC, chip->chip_base_addr+iCPU);
@@ -105,8 +105,8 @@ int msmcan_reset(struct candevice_t *candev)
                        }
                        schedule();
                }
-               
-       
+
+
        }
 
        can_disable_irq(chip->chip_irq);
@@ -127,7 +127,7 @@ int msmcan_reset(struct candevice_t *candev)
 #define NR_82527 1
 #define NR_SJA1000 0
 
-int msmcan_init_hw_data(struct candevice_t *candev) 
+int msmcan_init_hw_data(struct candevice_t *candev)
 {
        candev->res_addr=0;
        candev->nr_82527_chips=1;
@@ -168,7 +168,7 @@ int msmcan_init_chip_data(struct candevice_t *candev, int chipnr)
  * CAN chip. In case of the sja1000 there's only one message object but on the
  * i82527 chip there are 15.
  * The code below is for a i82527 chip and initializes the object base addresses
- * The entry obj_base_addr represents the first memory address of the message 
+ * The entry obj_base_addr represents the first memory address of the message
  * object. In case of the sja1000 obj_base_addr is taken the same as the chips
  * base address.
  * Unless the hardware uses a segmented memory map, flags can be set zero.
@@ -178,7 +178,7 @@ int msmcan_init_obj_data(struct canchip_t *chip, int objnr)
 
        chip->msgobj[objnr]->obj_base_addr=
            chip->chip_base_addr+(objnr+1)*0x10;
-       
+
        return 0;
 }
 
@@ -208,7 +208,7 @@ void msmcan_write_register(unsigned data, can_ioptr_t address)
 
        can_spin_lock_irqsave(&msmcan_port_lock,flags);
        can_outb(addr & 0xff, (addr>>16)+1);
-       can_outb(data, addr>>16); 
+       can_outb(data, addr>>16);
        can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
 }
 
@@ -219,7 +219,7 @@ void msmcan_write_register(unsigned data, can_ioptr_t address)
 unsigned msmcan_read_register(can_ioptr_t address)
 {
        /* this is the same thing that the function write_register.
-          We use the two register, we write the address where we 
+          We use the two register, we write the address where we
           want to read in a first time. In a second time we read the
           data */
        unsigned char ret;
@@ -228,7 +228,7 @@ unsigned msmcan_read_register(can_ioptr_t address)
 
        can_spin_lock_irqsave(&msmcan_port_lock,flags);
        can_outb(addr & 0xff, (addr>>16)+1);
-       ret=can_inb(addr>>16); 
+       ret=can_inb(addr>>16);
        can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
        return ret;
 }