Included support for PiMX1 board with SJA1000 on MX_DIS1 expansion board.

[lincan.git] / lincan / src / template.c

diff --git a/lincan/src/template.c b/lincan/src/template.c
index 6f49e8d6665d1c98782be1a5077b9e1a2f2c2ab0..d99033255b2dc51fd50c2e394237e59a2c84edce 100644 (file)
--- a/lincan/src/template.c
+++ b/lincan/src/template.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 /* This file is intended as a template file for currently unsupported hardware.
@@ -114,7 +114,6 @@ int template_init_hw_data(struct candevice_t *candev)
        return 0;
 }
 
-#define CHIP_TYPE "i82527"
 /**
  * template_init_chip_data - Initialize chips
  * @candev: Pointer to candevice/board structure
@@ -130,11 +129,11 @@ int template_init_hw_data(struct candevice_t *candev)
  * The @clock entry holds the chip clock value in Hz.
  * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
  * register. Options defined in the %sja1000.h file:
- * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
+ * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
  * The entry @sja_ocr_reg holds hardware specific options for the Output Control
  * register. Options defined in the %sja1000.h file:
- * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
- * %OCR_TX0_LH, %OCR_TX1_ZZ.
+ * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
+ * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
  * The entry @int_clk_reg holds hardware specific options for the Clock Out
  * register. Options defined in the %i82527.h file:
  * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
@@ -149,15 +148,18 @@ int template_init_hw_data(struct candevice_t *candev)
  */
 int template_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-       candev->chip[chipnr]->chip_type=CHIP_TYPE;
+       i82527_fill_chipspecops(candev->chip[chipnr]);
+       /*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
+       /*sja1000p_fill_chipspecops(candev->chip[chipnr]);*/
+       
        candev->chip[chipnr]->chip_base_addr=candev->io_addr;
        candev->chip[chipnr]->clock = 16000000;
        candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
        candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
        candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
-       candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
-       candev->chip[chipnr]->sja_ocr_reg = OCR_MODE_NORMAL |
-                                                               OCR_TX0_LH;
+       candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
+       candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL |
+                                                               sjaOCR_TX0_LH;
 
        return 0;
 }
@@ -179,7 +181,7 @@ int template_init_chip_data(struct candevice_t *candev, int chipnr)
  * Return Value: The function always returns zero
  * File: src/template.c
  */
-int template_init_obj_data(struct chip_t *chip, int objnr)
+int template_init_obj_data(struct canchip_t *chip, int objnr)
 {
        chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;