LinCAN sources go through big white-space cleanup.

[lincan.git] / lincan / include / mpc5200.h

diff --git a/lincan/include/mpc5200.h b/lincan/include/mpc5200.h
index d63ffbd7f938549e10fa17ae6d072be40757f0eb..7c343f4ac2a069274a461b41d9e1a3970bd93d7d 100644 (file)
--- a/lincan/include/mpc5200.h
+++ b/lincan/include/mpc5200.h
@@ -33,40 +33,56 @@
 /* Publication of enhanced or derived LinCAN files is required although.  */
 /**************************************************************************/
 
+#ifndef LINCAN_MPC5200_H
+#define LINCAN_MPC5200_H
+
+
+/* MPC5200 has two CAN controlers
+ * however MIDAM board uses only one controler
+ * RYU board uses both
+ */
 #define NR_82527       0
 #define NR_SJA1000     0
-#define NR_MSCAN       2                               /* this isnt used in Lincan core */
-#define NR_ALL         2
+#define NR_ALL         (NR_82527 + NR_SJA1000 + 2)
+#define NR_ALL_MIDAM   (NR_ALL - 1)
+
 
-#define MPC5200_CAN_IRQ                17              /* IRQ 17, 18 according to shark.dts */
-#define MPC5200_CAN_CHIP_OFFSET                0x80
 
+/* IRQ is read from OpenFirmware nodes */
+
+#define MPC5200_CAN_CHIP_OFFSET                0x80
 #define IO_RANGE                       0x80
 
 
 /* Clock frequency - used for baudrate */
-// TODO: zjistit frekvence IPB a SYS_XTAL
-#define MPC5200_SHARK_SYS_XTAL_FREQ    32768000        /* 32768k xtal */
-#define MPC5200_SHARK_IPB_FREQ         3300000         /* derived from XTAL by dividing */
+#define MPC5200_SHARK_SYS_XTAL_FREQ    396000000       /* 396 MHz */
+#define MPC5200_SHARK_IPB_FREQ         132000000       /* derived from XTAL by dividing: 132 MHz */
+/* got from /proc/device-tree/cpus/PowerPC,5200@0/ bus-frequency and system-frequency */
 
 /* Determine which clock source to use */
 /* 0 - use IP Bus clock                */
 /* 1 - use SYS_XTAL_IN frequency       */
-#define MPC5200_CLKSRC         1               
+#define MPC5200_CLKSRC         1
 
-#ifndef MPC5200_CLKSRC
-       #define MPC5200_CLK_FREQ        MPC5200_SHARK_SYS_XTAL_FREQ
+#if MPC5200_CLKSRC
+       #define MPC5200_CLK_FREQ        (MPC5200_SHARK_SYS_XTAL_FREQ/12)        /* 33MHz */
 #else
-       #define MPC5200_CLK_FREQ        MPC5200_SHARK_IPB_FREQ
+       #define MPC5200_CLK_FREQ        (MPC5200_SHARK_IPB_FREQ/4)              /* 33MHz */
 #endif
 
+/* ----------- Debugging options for MPC5200 ----------- */
+
+#define MPC5200_DBG 0
 
+#if MPC5200_DBG
+       /* standard LinCAN core debug - used only for MPC5200 driver part */
+       #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,##args)
+#endif /* MPC5200_DBG */
 
-/* static CAN_DEFINE_SPINLOCK(mpc5200_port_lock); */
 
 int mpc5200_request_io(struct candevice_t *candev);
 int mpc5200_release_io(struct candevice_t *candev);
-int mpc5200_reset(struct candevice_t *candev); 
+int mpc5200_reset(struct candevice_t *candev);
 int mpc5200_init_hw_data(struct candevice_t *candev);
 int mpc5200_init_chip_data(struct candevice_t *candev, int chipnr);
 int mpc5200_init_obj_data(struct canchip_t *chip, int objnr);
@@ -74,3 +90,4 @@ int mpc5200_program_irq(struct candevice_t *candev);
 void mpc5200_write_register(unsigned data, can_ioptr_t address);
 unsigned mpc5200_read_register(can_ioptr_t address);
 
+#endif /* LINCAN_MPC5200_H */