Included support for PiMX1 board with SJA1000 on MX_DIS1 expansion board.

[lincan.git] / lincan / src / msmcan.c

diff --git a/lincan/src/msmcan.c b/lincan/src/msmcan.c
index 573abaa67aa54b8abdcde7c433f4de2a548e6842..230e7862788327e6ee474fc92c4cff72f55ecbe7 100644 (file)
--- a/lincan/src/msmcan.c
+++ b/lincan/src/msmcan.c
@@ -56,7 +56,7 @@ int msmcan_release_io(struct candevice_t *candev)
  */
 int msmcan_reset(struct candevice_t *candev)
 {
-       struct chip_t *chip=candev->chip[0];
+       struct canchip_t *chip=candev->chip[0];
 
        DEBUGMSG("Resetting msmcan hardware ...\n");
        /* we don't use template_write_register because we don't use the two first
@@ -122,11 +122,10 @@ int msmcan_init_hw_data(struct candevice_t *candev)
  * argument supplied at module loading time.
  * The clock argument holds the chip clock value in Hz.
  */
-#define CHIP_TYPE "i82527"
 
 int msmcan_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-       candev->chip[chipnr]->chip_type=CHIP_TYPE;
+       i82527_fill_chipspecops(candev->chip[chipnr]);
        /* device uses indexed access */
        candev->chip[chipnr]->chip_base_addr=
            candev->io_addr << 16;
@@ -149,7 +148,7 @@ int msmcan_init_chip_data(struct candevice_t *candev, int chipnr)
  * base address.
  * Unless the hardware uses a segmented memory map, flags can be set zero.
  */
-int msmcan_init_obj_data(struct chip_t *chip, int objnr)
+int msmcan_init_obj_data(struct canchip_t *chip, int objnr)
 {
 
        chip->msgobj[objnr]->obj_base_addr=