LinCAN sources go through big white-space cleanup.

[lincan.git] / lincan / include / sja1000p.h

diff --git a/lincan/include/sja1000p.h b/lincan/include/sja1000p.h
index 9ca166b7262feefd3dfcbcf234135be3ebb72dbf..ae331b93f08dc195225cf4231794f3521e3a81ab 100644 (file)
--- a/lincan/include/sja1000p.h
+++ b/lincan/include/sja1000p.h
@@ -1,13 +1,37 @@
-/* sja1000p.h
- * Header file for the Linux CAN-bus driver.
- * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
- * Added by T.Motylewski@bfad.de
- * See app. note an97076.pdf from Philips Semiconductors 
- * and SJA1000 data sheet
- * PELICAN mode
- * This software is released under the GPL-License.
- * Version lincan-0.3  17 Jun 2004
- */
+/**************************************************************************/
+/* File: sja1000p.h - Philips/NXP SJA1000 chip PeliCanCAN mode support    */
+/*                                                                        */
+/* LinCAN - (Not only) Linux CAN bus driver                               */
+/* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz>   */
+/* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz>             */
+/* Copyright (C) 2004-2005 Tomasz Motylewski (BFAD GmbH)                  */
+/* Funded by OCERA and FRESCOR IST projects                               */
+/* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl>      */
+/*                                                                        */
+/* LinCAN is free software; you can redistribute it and/or modify it      */
+/* under terms of the GNU General Public License as published by the      */
+/* Free Software Foundation; either version 2, or (at your option) any    */
+/* later version.  LinCAN is distributed in the hope that it will be      */
+/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty    */
+/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU    */
+/* General Public License for more details. You should have received a    */
+/* copy of the GNU General Public License along with LinCAN; see file     */
+/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave,  */
+/* Cambridge, MA 02139, USA.                                              */
+/*                                                                        */
+/* To allow use of LinCAN in the compact embedded systems firmware        */
+/* and RT-executives (RTEMS for example), main authors agree with next    */
+/* special exception:                                                     */
+/*                                                                        */
+/* Including LinCAN header files in a file, instantiating LinCAN generics */
+/* or templates, or linking other files with LinCAN objects to produce    */
+/* an application image/executable, does not by itself cause the          */
+/* resulting application image/executable to be covered by                */
+/* the GNU General Public License.                                        */
+/* This exception does not however invalidate any other reasons           */
+/* why the executable file might be covered by the GNU Public License.    */
+/* Publication of enhanced or derived LinCAN files is required although.  */
+/**************************************************************************/
 
 int sja1000p_chip_config(struct canchip_t *chip);
 int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask);
@@ -57,7 +81,7 @@ enum SJA1000_PeliCAN_regs {
 /// Transmit Buffer (write) Receive Buffer (read) Frame Information
        SJAFRM = 0x10,
 /// ID bytes (11 bits in 0 and 1 or 16 bits in 0,1 and 13 bits in 2,3 (extended))
-       SJAID0 = 0x11, SJAID1 = 0x12, 
+       SJAID0 = 0x11, SJAID1 = 0x12,
 /// ID cont. for extended frames
        SJAID2 = 0x13, SJAID3 = 0x14,
 /// Data start standard frame
@@ -69,7 +93,7 @@ enum SJA1000_PeliCAN_regs {
 /// Acceptance Mask (4 bytes) in RESET mode
        SJAAMR0 = 0x14,
 /// 4 bytes
-       SJA_PeliCAN_AC_LEN = 4, 
+       SJA_PeliCAN_AC_LEN = 4,
 /// Clock Divider
        SJACDR = 0x1f
 };
@@ -84,7 +108,7 @@ enum sja1000_PeliCAN_MOD {
 };
 
 /** Command Register 0x01 */
-enum sja1000_PeliCAN_CMR { 
+enum sja1000_PeliCAN_CMR {
        sjaCMR_SRR= 1<<4,  // Self Reception Request (GoToSleep in BASIC mode)
        sjaCMR_CDO= 1<<3,  // Clear Data Overrun
        sjaCMR_RRB= 1<<2,  // Release Receive Buffer
@@ -114,7 +138,7 @@ enum sja1000_PeliCAN_IER {
        sjaIER_RIE = 1,    // Receive Interrupt Enable
        sjaENABLE_INTERRUPTS = sjaIER_BEIE|sjaIER_EPIE|sjaIER_DOIE|sjaIER_EIE|sjaIER_TIE|sjaIER_RIE,
        sjaDISABLE_INTERRUPTS = 0
-// WARNING: the chip automatically enters RESET (bus off) mode when 
+// WARNING: the chip automatically enters RESET (bus off) mode when
        // error counter > 255
 };
 
@@ -185,6 +209,14 @@ enum sja1000_CDR {
        sjaCDR_RXINPEN = 1<<5,
        sjaCDR_CLK_OFF = 1<<3,
 /// f_out = f_osc/(2*(CDR[2:0]+1)) or f_osc if CDR[2:0]==7
+       sjaCDR_CLKOUT_DIV1 = 7,
+       sjaCDR_CLKOUT_DIV2 = 0,
+       sjaCDR_CLKOUT_DIV4 = 1,
+       sjaCDR_CLKOUT_DIV6 = 2,
+       sjaCDR_CLKOUT_DIV8 = 3,
+       sjaCDR_CLKOUT_DIV10 = 4,
+       sjaCDR_CLKOUT_DIV12 = 5,
+       sjaCDR_CLKOUT_DIV14 = 6,
        sjaCDR_CLKOUT_MASK = 7
 };