sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
unican_delay(10);
-
+
/* disable all card interrupts */
ret = cl2_int_mode(chipext, INT_MODE_ALL*0);
if(ret != CL2_OK) {
if (chip->baudrate == 0)
chip->baudrate=1000000;
-
+
ret = chip->chipspecops->baud_rate(chip,chip->baudrate,chip->clock,0,75,0);
if(ret < 0){
CANMSG("can not set baudrate\n");
return ret;
}
-
+
unican_delay(2);
/* set interrupt inhibit time to 1 ms */
ret = cl2_set_iit(chipext, 10);
return -ENODEV;
}
unican_delay(1);
-
+
/* enable all card interrupts */
ret = cl2_int_mode(chipext, INT_MODE_ALL);
if(ret != CL2_OK) {
case 1000000:bt_val = CL2_BITRATE_1M; break;
default: return -EINVAL;
}
-
+
ret=cl2_set_bitrate(chipext,bt_val);
if(ret == CL2_COMMAND_BUSY) return -EBUSY;
if(ret != CL2_OK) return -EINVAL;
unican_delay(2);
-
+
return 0;
}
obj->rx_msg.flags = 0;
}
- /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
+ /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
obj->rx_msg.flags |= MSG_RTR;*/
obj->rx_msg.length = ( (u >> 4) & 0x000F );
#else /* CAN_MSG_VERSION_2 */
obj->rx_msg.timestamp = timestamp;
#endif /* CAN_MSG_VERSION_2 */
-
+
/* increment rx-buffer pointer */
if ( (chipext->rxBufBase + chipext->rxBufSize*16 ) <= (chipext->rxBufPtr += 16) ) {
chipext->rxBufPtr = chipext->rxBufBase;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
struct canmsg_t *msg)
{
return 0;
* Return Value: negative value reports error.
* File: src/unican.c
*/
-int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
+int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
unsigned short btr1)
{
int ret;
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
if(cmd<0)
return; /* No more messages to send */
-
+
cobid = obj->tx_slot->msg.id;
-
+
if ( (obj->tx_slot->msg.flags & MSG_EXT) ) { /* 2.0B frame */
cobid <<= 3;
} else { /* 2.0A frame */
if(len > CAN_MSG_LENGTH)
len = CAN_MSG_LENGTH;
u = (len << 12) | (cobid & 0x00FF);
-
- if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
+
+ if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
u |= CL2_REMOTE_FRAME<<8;
- if ( obj->tx_slot->msg.flags & MSG_EXT )
+ if ( obj->tx_slot->msg.flags & MSG_EXT )
u |= CL2_EXT_FRAME<<8;
unican_writew(u,ptr16++);
u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
- if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
+ if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
(chipext->asyncTxBufPtr += 16) ) {
chipext->asyncTxBufPtr = chipext->asyncTxBufBase;
}
/* Free transmitted slot */
canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
obj->tx_slot=NULL;
-
+
}while(1);
-
+
return;
}
* unican_irq_handler: - interrupt service routine
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
- *
+ *
* Interrupt handler is activated when state of CAN controller chip changes,
* there is message to be read or there is more space for new messages or
* error occurs. The receive events results in reading of the message from
}
if (cl2_get_status(chipext, &status) == CL2_NO_REQUEST) {
- /* Reenable interrupts generation, this has to be even there,
+ /* Reenable interrupts generation, this has to be even there,
* because irq_accept disables interrupts
*/
cl2_gen_interrupt(chipext);
* unican_irq_accept: - fast irq accept routine, blocks further interrupts
* @irq: interrupt vector number, this value is system specific
* @chip: pointer to chip state structure
- *
+ *
* This routine only accepts interrupt reception and stops further
* incoming interrupts, but does not handle situation causing interrupt.
* File: src/unican.c
/*void unican_do_tx_timeout(unsigned long data)
{
struct msgobj_t *obj=(struct msgobj_t *)data;
-
+
}*/
/**
CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
can_release_mem_region(candev->io_addr,IO_RANGE);
return -ENODEV;
-
+
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
int i;
struct canchip_t *chip = candev->chip[0];
sCAN_CARD *chipext;
-
+
if(chip->chip_data == NULL) {
chip->chip_data = can_checked_malloc(sizeof(sCAN_CARD));
return -ENODEV;
}
}
-
+
chipext = (sCAN_CARD *)chip->chip_data;
-
+
i = 0;
/* reset and test whether the card is present */
do {
CANMSG("card check failed %d\n",ret);
return -ENODEV;
}
-
+
/* start card firmware */
ret = cl2_start_firmware(chipext);
if(ret != CL2_OK){
CANMSG("cl2_start_firmware returned %d\n",ret);
return -ENODEV;
}
-
+
unican_delay(100);
return 0;
* Return Value: The function always returns zero
* File: src/unican.c
*/
-int unican_init_hw_data(struct candevice_t *candev)
+int unican_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=0;
candev->nr_82527_chips=0;
chip->int_bus_reg = 0x0;
chip->max_objects = 1;
chip->chip_base_addr=candev->dev_base_addr;
-
+
CANMSG("initializing unican chip operations\n");
chip->chipspecops->chip_config=unican_chip_config;
chip->chipspecops->baud_rate=unican_baud_rate;
pci_release_regions(candev->sysdevptr.pcidev);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
return -ENODEV;
-
+
}
can_base_addr_fixup(candev, remap_addr);
DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
- DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
+ DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
can_ioptr2ulong(candev->dev_base_addr),
can_ioptr2ulong(candev->chip[0]->chip_base_addr));
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
-
+
if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
can_pci_dev_put(pcidev);
candev->io_addr=pci_resource_start(pcidev,0);
candev->res_addr=candev->io_addr;
candev->dev_base_addr=NULL;
-
+
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->nr_82527_chips=0;
projects / lincan.git / blobdiff