2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.3 17 Jun 2004
16 #include "./constants.h"
17 #include "./ul_listbase.h"
18 #include "./can_sysless.h"
19 #include "./can_queue.h"
23 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "USBCAN(debug): " fmt,\
26 #define DEBUGMSG(fmt,args...)
29 #define CANMSG(fmt,args...) can_printk(KERN_ERR "USBCAN: " fmt,##args)
32 extern can_spinlock_t canuser_manipulation_lock;
35 * struct canhardware_t - structure representing pointers to all CAN boards
36 * @nr_boards: number of present boards
37 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
38 * @rtr_lock: locking for RTR queue
39 * @candevice: array of pointers to CAN devices/boards
41 struct canhardware_t {
43 struct rtr_id *rtr_queue;
44 can_spinlock_t rtr_lock;
45 struct candevice_t *candevice[MAX_HW_CARDS];
49 * struct candevice_t - CAN device/board structure
50 * @hwname: text string with board type
51 * @candev_idx: board index in canhardware_t.candevice[]
52 * @io_addr: IO/physical MEM address
53 * @res_addr: optional reset register port
54 * @dev_base_addr: CPU translated IO/virtual MEM address
55 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
56 * can be programmed into board
57 * @nr_all_chips: number of chips present on the board
58 * @nr_82527_chips: number of Intel 8257 chips
59 * @nr_sja1000_chips: number of Philips SJA100 chips
60 * @chip: array of pointers to the chip structures
61 * @hwspecops: pointer to board specific operations
62 * @hosthardware_p: pointer to the root hardware structure
63 * @sysdevptr: union reserved for pointer to bus specific
64 * device structure (case @pcidev is used for PCI devices)
66 * The structure represent configuration and state of associated board.
67 * The driver infrastructure prepares this structure and calls
68 * board type specific board_register() function. The board support provided
69 * register function fills right function pointers in @hwspecops structure.
70 * Then driver setup calls functions init_hw_data(), init_chip_data(),
71 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
72 * and init_chip_data() have to specify number and types of connected chips
73 * or objects respectively.
74 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
75 * and @nr_sja1000_chips in the board non-specific functions.
76 * The @io_addr and @dev_base_addr is filled from module parameters
77 * to the same value. The request_io function can fix-up @dev_base_addr
78 * field if virtual address is different than bus address.
81 char *hwname; /* text board type */
82 int candev_idx; /* board index in canhardware_t.candevice[] */
83 unsigned long io_addr; /* IO/physical MEM address */
84 unsigned long res_addr; /* optional reset register port */
85 unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */
90 can_spinlock_t device_lock;
91 struct canchip_t *chip[MAX_HW_CHIPS];
93 struct hwspecops_t *hwspecops;
95 struct canhardware_t *hosthardware_p;
99 #ifdef CAN_ENABLE_PCI_SUPPORT
100 struct pci_dev *pcidev;
101 #endif /*CAN_ENABLE_PCI_SUPPORT*/
107 * struct canchip_t - CAN chip state and type information
108 * @chip_type: text string describing chip type
109 * @chip_idx: index of the chip in candevice_t.chip[] array
110 * @chip_irq: chip interrupt number if any
111 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
112 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
113 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
114 * @clock: chip base clock frequency in Hz
115 * @baudrate: selected chip baudrate in Hz
116 * @write_register: write chip register function copy
117 * @read_register: read chip register function copy
118 * @chip_data: pointer for optional chip specific data extension
119 * @sja_cdr_reg: SJA specific register -
120 * holds hardware specific options for the Clock Divider
121 * register. Options defined in the sja1000.h file:
122 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
123 * @sja_ocr_reg: SJA specific register -
124 * hold hardware specific options for the Output Control
125 * register. Options defined in the sja1000.h file:
126 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
127 * %OCR_TX0_LH, %OCR_TX1_ZZ.
128 * @int_cpu_reg: Intel specific register -
129 * holds hardware specific options for the CPU Interface
130 * register. Options defined in the i82527.h file:
131 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
132 * @int_clk_reg: Intel specific register -
133 * holds hardware specific options for the Clock Out
134 * register. Options defined in the i82527.h file:
135 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
136 * @int_bus_reg: Intel specific register -
137 * holds hardware specific options for the Bus Configuration
138 * register. Options defined in the i82527.h file:
139 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
140 * @msgobj: array of pointers to individual communication objects
141 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
142 * @hostdevice: pointer to chip hosting board
143 * @max_objects: maximal number of communication objects connected to this chip
144 * @chip_lock: reserved for synchronization of the chip supporting routines
145 * (not used in the current driver version)
146 * @worker_thread: chip worker thread ID (RT-Linux specific field)
147 * @pend_flags: holds information about pending interrupt and tx_wake() operations
148 * (RT-Linux specific field). Masks values:
149 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
150 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
151 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
152 * for some of above reasons
154 * The fields @write_register and @read_register are copied from
155 * corresponding fields from @hwspecops structure
156 * (chip->hostdevice->hwspecops->write_register and
157 * chip->hostdevice->hwspecops->read_register)
158 * to speedup can_write_reg() and can_read_reg() functions.
162 int chip_idx; /* chip index in candevice_t.chip[] */
164 unsigned long chip_base_addr;
166 long clock; /* Chip clock in Hz */
169 void (*write_register)(unsigned data,unsigned long address);
170 unsigned (*read_register)(unsigned long address);
174 unsigned short sja_cdr_reg; /* sja1000 only! */
175 unsigned short sja_ocr_reg; /* sja1000 only! */
176 unsigned short int_cpu_reg; /* intel 82527 only! */
177 unsigned short int_clk_reg; /* intel 82527 only! */
178 unsigned short int_bus_reg; /* intel 82527 only! */
180 struct msgobj_t *msgobj[MAX_MSGOBJS];
182 struct chipspecops_t *chipspecops;
184 struct candevice_t *hostdevice;
186 int max_objects; /* 1 for sja1000, 15 for i82527 */
188 can_spinlock_t chip_lock;
191 pthread_t worker_thread;
192 unsigned long pend_flags;
193 #endif /*CAN_WITH_RTL*/
197 * struct msgobj_t - structure holding communication object state
199 * @minor: associated device minor number
200 * @object: object number in canchip_t structure +1
201 * @flags: message object flags
202 * @ret: field holding status of the last Tx operation
203 * @qends: pointer to message object corresponding ends structure
204 * @tx_qedge: edge corresponding to transmitted message
205 * @tx_slot: slot holding transmitted message, slot is taken from
206 * canque_test_outslot() call and is freed by canque_free_outslot()
207 * or rescheduled canque_again_outslot()
208 * @tx_retry_cnt: transmission attempt counter
209 * @tx_timeout: can be used by chip driver to check for the transmission timeout
210 * @rx_msg: temporary storage to hold received messages before
211 * calling to canque_filter_msg2edges()
212 * @hostchip: pointer to the &canchip_t structure this object belongs to
213 * @obj_used: counter of users (associated file structures for Linux
214 * userspace clients) of this object
215 * @obj_users: list of user structures of type &canuser_t.
216 * @obj_flags: message object specific flags. Masks values:
217 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
218 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
219 * is running inside TX activation processing code
220 * @rx_preconfig_id: place to store RX message identifier for some chip types
221 * that reuse same object for TX
224 unsigned long obj_base_addr;
225 unsigned int minor; /* associated device minor number */
226 unsigned int object; /* object number in canchip_t +1 for debug printk */
227 unsigned long obj_flags;
230 struct canque_ends_t *qends;
232 struct canque_edge_t *tx_qedge;
233 struct canque_slot_t *tx_slot;
235 struct timer_list tx_timeout;
237 struct canmsg_t rx_msg;
239 struct canchip_t *hostchip;
241 unsigned long rx_preconfig_id;
244 struct list_head obj_users;
247 #define CAN_USER_MAGIC 0x05402033
250 * struct canuser_t - structure holding CAN user/client state
251 * @flags: used to distinguish Linux/RT-Linux type
252 * @peers: for connection into list of object users
253 * @qends: pointer to the ends structure corresponding for this user
254 * @msgobj: communication object the user is connected to
255 * @rx_edge0: default receive queue for filter IOCTL
256 * @userinfo: stores user context specific information.
257 * The field @fileinfo.file holds pointer to open device file state structure
258 * for the Linux user-space client applications
259 * @magic: magic number to check consistency when pointer is retrieved
260 * from file private field
264 struct list_head peers;
265 struct canque_ends_t *qends;
266 struct msgobj_t *msgobj;
267 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
270 struct file *file; /* back ptr to file */
274 struct rtl_file *file;
276 #endif /*CAN_WITH_RTL*/
282 * struct hwspecops_t - hardware/board specific operations
283 * @request_io: reserve io or memory range for can board
284 * @release_io: free reserved io memory range
285 * @reset: hardware reset routine
286 * @init_hw_data: called to initialize &candevice_t structure, mainly
287 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
289 * @init_chip_data: called initialize each &canchip_t structure, mainly
290 * @chip_type, @chip_base_addr, @clock and chip specific registers.
291 * It is responsible to setup &canchip_t->@chipspecops functions
292 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
293 * @init_obj_data: called initialize each &msgobj_t structure,
294 * mainly @obj_base_addr field.
295 * @program_irq: program interrupt generation hardware of the board
296 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
297 * @write_register: low level write register routine
298 * @read_register: low level read register routine
301 int (*request_io)(struct candevice_t *candev);
302 int (*release_io)(struct candevice_t *candev);
303 int (*reset)(struct candevice_t *candev);
304 int (*init_hw_data)(struct candevice_t *candev);
305 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
306 int (*init_obj_data)(struct canchip_t *chip, int objnr);
307 int (*program_irq)(struct candevice_t *candev);
308 void (*write_register)(unsigned data,unsigned long address);
309 unsigned (*read_register)(unsigned long address);
313 * struct chipspecops_t - can controller chip specific operations
314 * @chip_config: CAN chip configuration
315 * @baud_rate: set communication parameters
316 * @standard_mask: setup of mask for message filtering
317 * @extended_mask: setup of extended mask for message filtering
318 * @message15_mask: set mask of i82527 message object 15
319 * @clear_objects: clears state of all message object residing in chip
320 * @config_irqs: tunes chip hardware interrupt delivery
321 * @pre_read_config: prepares message object for message reception
322 * @pre_write_config: prepares message object for message transmission
323 * @send_msg: initiate message transmission
324 * @remote_request: configures message object and asks for RTR message
325 * @check_tx_stat: checks state of transmission engine
326 * @wakeup_tx: wakeup TX processing
327 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
328 * @enable_configuration: enable chip configuration mode
329 * @disable_configuration: disable chip configuration mode
330 * @set_btregs: configures bitrate registers
331 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
332 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
333 * @start_chip: starts chip message processing
334 * @stop_chip: stops chip message processing
335 * @irq_handler: interrupt service routine
336 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
338 struct chipspecops_t {
339 int (*chip_config)(struct canchip_t *chip);
340 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
341 int sampl_pt, int flags);
342 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
343 unsigned short mask);
344 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
346 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
348 int (*clear_objects)(struct canchip_t *chip);
349 int (*config_irqs)(struct canchip_t *chip, short irqs);
350 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
351 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
352 struct canmsg_t *msg);
353 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
354 struct canmsg_t *msg);
355 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
356 int (*check_tx_stat)(struct canchip_t *chip);
357 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
358 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
359 int (*enable_configuration)(struct canchip_t *chip);
360 int (*disable_configuration)(struct canchip_t *chip);
361 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
362 unsigned short btr1);
363 int (*attach_to_chip)(struct canchip_t *chip);
364 int (*release_chip)(struct canchip_t *chip);
365 int (*start_chip)(struct canchip_t *chip);
366 int (*stop_chip)(struct canchip_t *chip);
367 int (*irq_handler)(int irq, struct canchip_t *chip);
368 int (*irq_accept)(int irq, struct canchip_t *chip);
373 struct mem_addr *next;
377 /* Structure for the RTR queue */
380 struct canmsg_t *rtr_message;
381 wait_queue_head_t rtr_wq;
386 extern int minor[MAX_TOT_CHIPS];
388 extern int baudrate[MAX_TOT_CHIPS];
389 extern char *hw[MAX_HW_CARDS];
390 extern int irq[MAX_IRQ];
391 extern unsigned long io[MAX_HW_CARDS];
392 extern int processlocal;
394 extern struct canhardware_t *hardware_p;
395 //extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
396 struct canchip_t *chips_p[MAX_TOT_CHIPS];
397 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
399 extern struct mem_addr *mem_head;
402 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
403 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
405 outb(data, chip->chip_base_addr+address);
407 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
409 return inb(chip->chip_base_addr+address);
411 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
412 unsigned char data, unsigned address)
414 outb(data, obj->obj_base_addr+address);
416 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
419 return inb(obj->obj_base_addr+address);
422 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
423 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
425 writeb(data, chip->chip_base_addr+address);
427 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
429 return readb(chip->chip_base_addr+address);
431 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
432 unsigned char data, unsigned address)
434 writeb(data, obj->obj_base_addr+address);
436 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
439 return readb(obj->obj_base_addr+address);
442 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
443 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
444 #define CONFIG_OC_LINCAN_DYNAMICIO
447 /* Inline function to write to the hardware registers. The argument address is
448 * relative to the memory map of the chip and not the absolute memory address.
450 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
452 unsigned long address_to_write;
453 address_to_write = chip->chip_base_addr+address;
454 chip->write_register(data, address_to_write);
457 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
459 unsigned long address_to_read;
460 address_to_read = chip->chip_base_addr+address;
461 return chip->read_register(address_to_read);
464 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
465 unsigned char data, unsigned address)
467 unsigned long address_to_write;
468 address_to_write = obj->obj_base_addr+address;
469 chip->write_register(data, address_to_write);
472 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
475 unsigned long address_to_read;
476 address_to_read = obj->obj_base_addr+address;
477 return chip->read_register(address_to_read);
480 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
482 int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base);
483 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
484 void can_release_io_region(unsigned long start, unsigned long n);
485 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
486 void can_release_mem_region(unsigned long start, unsigned long n);
489 const char *boardtype;
490 int (*board_register)(struct hwspecops_t *hwspecops);
494 const struct boardtype_t* boardtype_find(const char *str);
496 int can_check_dev_taken(void *anydev);
498 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
500 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
502 can_gettimeofday(ptimestamp);
504 #else /* No timestamp support, set field to zero */
506 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
508 #ifdef CAN_MSG_VERSION_2
509 ptimestamp->tv_sec = 0;
510 ptimestamp->tv_usec = 0;
511 #else /* CAN_MSG_VERSION_2 */
513 #endif /* CAN_MSG_VERSION_2 */
516 #endif /* End of timestamp source selection */
519 extern int can_rtl_priority;
520 #endif /*CAN_WITH_RTL*/