1 /**************************************************************************/
2 /* File: ssv.c - SSV board support */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
35 #include "../include/can.h"
36 #include "../include/can_sysdep.h"
37 #include "../include/main.h"
38 #include "../include/ssv.h"
39 #include "../include/i82527.h"
41 int ssvcan_irq[2]={-1,-1};
42 can_ioptr_t ssvcan_base=0x0;
44 static CAN_DEFINE_SPINLOCK(ssv_port_lock);
46 /* IO_RANGE is the io-memory range that gets reserved, please adjust according
47 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
48 * #define IO_RANGE 0x20 for sja1000 chips.
52 /* The function template_request_io is used to reserve the io-memory. If your
53 * hardware uses a dedicated memory range as hardware control registers you
54 * will have to add the code to reserve this memory as well.
55 * The reserved memory starts at io_addr, wich is the module parameter io.
57 int ssv_request_io(struct candevice_t *candev)
60 if (!can_request_io_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
61 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
64 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
65 candev->io_addr + IO_RANGE - 1);
70 /* The function template_release_io is used to free the previously reserved
71 * io-memory. In case you reserved more memory, don't forget to free it here.
73 int ssv_release_io(struct candevice_t *candev)
76 can_release_io_region(candev->io_addr,IO_RANGE);
81 /* The function template_reset is used to give a hardware reset. This is rather
82 * hardware specific so I haven't included example code. Don't forget to check
83 * the reset status of the chip before returning.
85 int ssv_reset(struct candevice_t *candev)
89 DEBUGMSG("Resetting ssv hardware ...\n");
90 ssv_write_register(1,ssvcan_base+iCPU);
91 ssv_write_register(0,ssvcan_base+iCPU);
92 ssv_write_register(1,ssvcan_base+0x100+iCPU);
93 ssv_write_register(0,ssvcan_base+0x100+iCPU);
95 for (i = 1; i < 1000; i++)
98 /* Check hardware reset status */
100 while ( (ssv_read_register(ssvcan_base+iCPU) & iCPU_RST) && (i<=15)) {
105 CANMSG("Reset status timeout!\n");
106 CANMSG("Please check your hardware.\n");
110 DEBUGMSG("Chip0 reset status ok.\n");
112 /* Check hardware reset status */
114 while ( (ssv_read_register(ssvcan_base+0x100+iCPU) & iCPU_RST) && (i<=15)) {
119 CANMSG("Reset status timeout!\n");
120 CANMSG("Please check your hardware.\n");
124 DEBUGMSG("Chip1 reset status ok.\n");
131 /* The function template_init_hw_data is used to initialize the hardware
132 * structure containing information about the installed CAN-board.
133 * RESET_ADDR represents the io-address of the hardware reset register.
134 * NR_82527 represents the number of intel 82527 chips on the board.
135 * NR_SJA1000 represents the number of philips sja1000 chips on the board.
136 * The flags entry can currently only be CANDEV_PROGRAMMABLE_IRQ to indicate that
137 * the hardware uses programmable interrupts.
139 #define RESET_ADDR 0x02
143 int ssv_init_hw_data(struct candevice_t *candev)
145 candev->res_addr=RESET_ADDR;
146 candev->nr_82527_chips=NR_82527;
147 candev->nr_sja1000_chips=0;
148 candev->nr_all_chips=NR_82527;
149 candev->flags |= CANDEV_PROGRAMMABLE_IRQ;
154 /* The function template_init_chip_data is used to initialize the hardware
155 * structure containing information about the CAN chips.
156 * CHIP_TYPE represents the type of CAN chip. CHIP_TYPE can be "i82527" or
158 * The chip_base_addr entry represents the start of the 'official' memory map
159 * of the installed chip. It's likely that this is the same as the io_addr
160 * argument supplied at module loading time.
161 * The clock argument holds the chip clock value in Hz.
163 int ssv_init_chip_data(struct candevice_t *candev, int chipnr)
165 i82527_fill_chipspecops(candev->chip[chipnr]);
166 candev->chip[chipnr]->chip_base_addr=
167 can_ioport2ioptr(candev->io_addr+0x100*chipnr);
168 candev->chip[chipnr]->clock = 16000000;
169 ssvcan_irq[chipnr]=candev->chip[chipnr]->chip_irq;
171 ssvcan_base=candev->io_addr;
173 candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
174 candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
175 candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
179 /* The function template_init_obj_data is used to initialize the hardware
180 * structure containing information about the different message objects on the
181 * CAN chip. In case of the sja1000 there's only one message object but on the
182 * i82527 chip there are 15.
183 * The code below is for a i82527 chip and initializes the object base addresses
184 * The entry obj_base_addr represents the first memory address of the message
185 * object. In case of the sja1000 obj_base_addr is taken the same as the chips
187 * Unless the hardware uses a segmented memory map, flags can be set zero.
189 int ssv_init_obj_data(struct canchip_t *chip, int objnr)
192 chip->msgobj[objnr]->obj_base_addr=
193 chip->chip_base_addr+(objnr+1)*0x10;
198 /* The function template_program_irq is used for hardware that uses programmable
199 * interrupts. If your hardware doesn't use programmable interrupts you should
200 * not set the candevices_t->flags entry to CANDEV_PROGRAMMABLE_IRQ and leave this
201 * function unedited. Again this function is hardware specific so there's no
204 int ssv_program_irq(struct candevice_t *candev)
209 /* The function template_write_register is used to write to hardware registers
210 * on the CAN chip. You should only have to edit this function if your hardware
211 * uses some specific write process.
213 void ssv_write_register(unsigned data, can_ioptr_t address)
215 /* address is an absolute address */
217 /* the ssv card has two registers, the address register at 0x0
218 and the data register at 0x01 */
220 /* write the relative address on the eight LSB bits
221 and the data on the eight MSB bits in one time */
222 if((address-ssvcan_base)<0x100)
223 can_outw(address-ssvcan_base + (256 * data), ssvcan_base);
225 can_outw(address-ssvcan_base-0x100 + (256 * data), ssvcan_base+0x02);
228 /* The function template_read_register is used to read from hardware registers
229 * on the CAN chip. You should only have to edit this function if your hardware
230 * uses some specific read process.
232 unsigned ssv_read_register(can_ioptr_t address)
234 /* this is the same thing that the function write_register.
235 We use the two register, we write the address where we
236 want to read in a first time. In a second time we read the
239 can_spin_irqflags_t flags;
242 if((address-ssvcan_base)<0x100)
244 can_spin_lock_irqsave(&ssv_port_lock,flags);
245 can_outb(address-ssvcan_base, ssvcan_base);
246 ret=can_inb(ssvcan_base+1);
247 can_spin_unlock_irqrestore(&ssv_port_lock,flags);
251 can_spin_lock_irqsave(&ssv_port_lock,flags);
252 can_outb(address-ssvcan_base-0x100, ssvcan_base+0x02);
253 ret=can_inb(ssvcan_base+1+0x02);
254 can_spin_unlock_irqrestore(&ssv_port_lock,flags);
261 /* !!! Don't change this function !!! */
262 int ssv_register(struct hwspecops_t *hwspecops)
264 hwspecops->request_io = ssv_request_io;
265 hwspecops->release_io = ssv_release_io;
266 hwspecops->reset = ssv_reset;
267 hwspecops->init_hw_data = ssv_init_hw_data;
268 hwspecops->init_chip_data = ssv_init_chip_data;
269 hwspecops->init_obj_data = ssv_init_obj_data;
270 hwspecops->write_register = ssv_write_register;
271 hwspecops->read_register = ssv_read_register;
272 hwspecops->program_irq = ssv_program_irq;