2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.3 17 Jun 2004
10 #include "../include/can.h"
11 #include "../include/can_sysdep.h"
12 #include "../include/main.h"
13 #include "../include/eb8245.h"
14 #include "../include/sja1000p.h"
17 * IO_RANGE is the io-memory range that gets reserved, please adjust according
18 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
19 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
21 #define IO_RANGE 0x100
24 * eb8245_request_io: - reserve io or memory range for can board
25 * @candev: pointer to candevice/board which asks for io. Field @io_addr
26 * of @candev is used in most cases to define start of the range
28 * The function eb8245_request_io() is used to reserve the io-memory. If your
29 * hardware uses a dedicated memory range as hardware control registers you
30 * will have to add the code to reserve this memory as well.
31 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
32 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
33 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
34 * Return Value: The function returns zero on success or %-ENODEV on failure
37 int eb8245_request_io(struct candevice_t *candev)
39 can_ioptr_t remap_addr;
41 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - eb8245")) {
42 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
45 if ( !( remap_addr = ioremap( candev->io_addr, IO_RANGE ) ) ) {
46 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
47 can_release_mem_region(candev->io_addr,IO_RANGE);
51 can_base_addr_fixup(candev, remap_addr);
52 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
57 * eb8245_release_io - free reserved io memory range
58 * @candev: pointer to candevice/board which releases io
60 * The function eb8245_release_io() is used to free reserved io-memory.
61 * In case you have reserved more io memory, don't forget to free it here.
62 * IO_RANGE is the io-memory range that gets released, please adjust according
63 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
64 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
65 * Return Value: The function always returns zero
68 int eb8245_release_io(struct candevice_t *candev)
70 /* release I/O memory mapping */
71 iounmap((void*)candev->dev_base_addr);
72 can_release_mem_region(candev->io_addr,IO_RANGE);
78 * eb8245_reset - hardware reset routine
79 * @candev: Pointer to candevice/board structure
81 * The function eb8245_reset() is used to give a hardware reset. This is
82 * rather hardware specific so I haven't included example code. Don't forget to
83 * check the reset status of the chip before returning.
84 * Return Value: The function returns zero on success or %-ENODEV on failure
87 int eb8245_reset(struct candevice_t *candev)
90 struct canchip_t *chip=candev->chip[0];
93 eb8245_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
96 cdr=eb8245_read_register(chip->chip_base_addr+SJACDR);
97 eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
99 eb8245_write_register(0, chip->chip_base_addr+SJAIER);
102 eb8245_write_register(0, chip->chip_base_addr+SJAMOD);
103 while (eb8245_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
104 if(!i--) return -ENODEV;
106 eb8245_write_register(0, chip->chip_base_addr+SJAMOD);
109 cdr=eb8245_read_register(chip->chip_base_addr+SJACDR);
110 eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
112 eb8245_write_register(0, chip->chip_base_addr+SJAIER);
117 #define RESET_ADDR 0x0
122 * eb8245_init_hw_data - Initialize hardware cards
123 * @candev: Pointer to candevice/board structure
125 * The function eb8245_init_hw_data() is used to initialize the hardware
126 * structure containing information about the installed CAN-board.
127 * %RESET_ADDR represents the io-address of the hardware reset register.
128 * %NR_82527 represents the number of intel 82527 chips on the board.
129 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
130 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
131 * the hardware uses programmable interrupts.
132 * Return Value: The function always returns zero
135 int eb8245_init_hw_data(struct candevice_t *candev)
137 candev->res_addr=RESET_ADDR;
138 candev->nr_82527_chips=0;
139 candev->nr_sja1000_chips=1;
140 candev->nr_all_chips=1;
141 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
147 * eb8245_init_chip_data - Initialize chips
148 * @candev: Pointer to candevice/board structure
149 * @chipnr: Number of the CAN chip on the hardware card
151 * The function eb8245_init_chip_data() is used to initialize the hardware
152 * structure containing information about the CAN chips.
153 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
155 * The @chip_base_addr entry represents the start of the 'official' memory map
156 * of the installed chip. It's likely that this is the same as the @io_addr
157 * argument supplied at module loading time.
158 * The @clock entry holds the chip clock value in Hz.
159 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
160 * register. Options defined in the %sja1000.h file:
161 * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
162 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
163 * register. Options defined in the %sja1000.h file:
164 * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
165 * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
166 * The entry @int_clk_reg holds hardware specific options for the Clock Out
167 * register. Options defined in the %i82527.h file:
168 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
169 * The entry @int_bus_reg holds hardware specific options for the Bus
170 * Configuration register. Options defined in the %i82527.h file:
171 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
172 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
173 * register. Options defined in the %i82527.h file:
174 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
175 * Return Value: The function always returns zero
178 int eb8245_init_chip_data(struct candevice_t *candev, int chipnr)
180 /*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
181 sja1000p_fill_chipspecops(candev->chip[chipnr]);
183 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
184 candev->chip[chipnr]->clock = 16000000;
185 candev->chip[chipnr]->int_clk_reg = 0x0;
186 candev->chip[chipnr]->int_bus_reg = 0x0;
187 candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
188 candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
194 * eb8245_init_obj_data - Initialize message buffers
195 * @chip: Pointer to chip specific structure
196 * @objnr: Number of the message buffer
198 * The function eb8245_init_obj_data() is used to initialize the hardware
199 * structure containing information about the different message objects on the
200 * CAN chip. In case of the sja1000 there's only one message object but on the
201 * i82527 chip there are 15.
202 * The code below is for a i82527 chip and initializes the object base addresses
203 * The entry @obj_base_addr represents the first memory address of the message
204 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
206 * Unless the hardware uses a segmented memory map, flags can be set zero.
207 * Return Value: The function always returns zero
210 int eb8245_init_obj_data(struct canchip_t *chip, int objnr)
212 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
217 * eb8245_program_irq - program interrupts
218 * @candev: Pointer to candevice/board structure
220 * The function eb8245_program_irq() is used for hardware that uses
221 * programmable interrupts. If your hardware doesn't use programmable interrupts
222 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
223 * leave this function unedited. Again this function is hardware specific so
224 * there's no example code.
225 * Return value: The function returns zero on success or %-ENODEV on failure
228 int eb8245_program_irq(struct candevice_t *candev)
234 * eb8245_write_register - Low level write register routine
235 * @data: data to be written
236 * @address: memory address to write to
238 * The function eb8245_write_register() is used to write to hardware registers
239 * on the CAN chip. You should only have to edit this function if your hardware
240 * uses some specific write process.
241 * Return Value: The function does not return a value
244 void eb8245_write_register(unsigned data, can_ioptr_t address)
246 /*DEBUGMSG("eb8245_write_register: addr=0x%lx data=0x%x",
248 can_writeb(data,address);
252 * eb8245_read_register - Low level read register routine
253 * @address: memory address to read from
255 * The function eb8245_read_register() is used to read from hardware registers
256 * on the CAN chip. You should only have to edit this function if your hardware
257 * uses some specific read process.
258 * Return Value: The function returns the value stored in @address
261 unsigned eb8245_read_register(can_ioptr_t address)
263 return can_readb(address);
266 /* !!! Don't change this function !!! */
267 int eb8245_register(struct hwspecops_t *hwspecops)
269 hwspecops->request_io = eb8245_request_io;
270 hwspecops->release_io = eb8245_release_io;
271 hwspecops->reset = eb8245_reset;
272 hwspecops->init_hw_data = eb8245_init_hw_data;
273 hwspecops->init_chip_data = eb8245_init_chip_data;
274 hwspecops->init_obj_data = eb8245_init_obj_data;
275 hwspecops->write_register = eb8245_write_register;
276 hwspecops->read_register = eb8245_read_register;
277 hwspecops->program_irq = eb8245_program_irq;