1 /**************************************************************************/
2 /* File: eb8245.c - Kontron EB8245 onboard CAN with SJA1000 controller */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Copyright (C) 2005 Petr Cvachoucek, Unicontrols */
8 /* Funded by OCERA and FRESCOR IST projects */
9 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
11 /* LinCAN is free software; you can redistribute it and/or modify it */
12 /* under terms of the GNU General Public License as published by the */
13 /* Free Software Foundation; either version 2, or (at your option) any */
14 /* later version. LinCAN is distributed in the hope that it will be */
15 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
16 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
17 /* General Public License for more details. You should have received a */
18 /* copy of the GNU General Public License along with LinCAN; see file */
19 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
20 /* Cambridge, MA 02139, USA. */
22 /* To allow use of LinCAN in the compact embedded systems firmware */
23 /* and RT-executives (RTEMS for example), main authors agree with next */
24 /* special exception: */
26 /* Including LinCAN header files in a file, instantiating LinCAN generics */
27 /* or templates, or linking other files with LinCAN objects to produce */
28 /* an application image/executable, does not by itself cause the */
29 /* resulting application image/executable to be covered by */
30 /* the GNU General Public License. */
31 /* This exception does not however invalidate any other reasons */
32 /* why the executable file might be covered by the GNU Public License. */
33 /* Publication of enhanced or derived LinCAN files is required although. */
34 /**************************************************************************/
36 #include "../include/can.h"
37 #include "../include/can_sysdep.h"
38 #include "../include/main.h"
39 #include "../include/eb8245.h"
40 #include "../include/sja1000p.h"
43 * IO_RANGE is the io-memory range that gets reserved, please adjust according
44 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
45 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
47 #define IO_RANGE 0x100
50 * eb8245_request_io: - reserve io or memory range for can board
51 * @candev: pointer to candevice/board which asks for io. Field @io_addr
52 * of @candev is used in most cases to define start of the range
54 * The function eb8245_request_io() is used to reserve the io-memory. If your
55 * hardware uses a dedicated memory range as hardware control registers you
56 * will have to add the code to reserve this memory as well.
57 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
58 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
59 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
60 * Return Value: The function returns zero on success or %-ENODEV on failure
63 int eb8245_request_io(struct candevice_t *candev)
65 can_ioptr_t remap_addr;
67 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - eb8245")) {
68 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
71 if ( !( remap_addr = ioremap( candev->io_addr, IO_RANGE ) ) ) {
72 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
73 can_release_mem_region(candev->io_addr,IO_RANGE);
77 can_base_addr_fixup(candev, remap_addr);
78 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
83 * eb8245_release_io - free reserved io memory range
84 * @candev: pointer to candevice/board which releases io
86 * The function eb8245_release_io() is used to free reserved io-memory.
87 * In case you have reserved more io memory, don't forget to free it here.
88 * IO_RANGE is the io-memory range that gets released, please adjust according
89 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
90 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
91 * Return Value: The function always returns zero
94 int eb8245_release_io(struct candevice_t *candev)
96 /* release I/O memory mapping */
97 iounmap((void*)candev->dev_base_addr);
98 can_release_mem_region(candev->io_addr,IO_RANGE);
104 * eb8245_reset - hardware reset routine
105 * @candev: Pointer to candevice/board structure
107 * The function eb8245_reset() is used to give a hardware reset. This is
108 * rather hardware specific so I haven't included example code. Don't forget to
109 * check the reset status of the chip before returning.
110 * Return Value: The function returns zero on success or %-ENODEV on failure
113 int eb8245_reset(struct candevice_t *candev)
116 struct canchip_t *chip=candev->chip[0];
119 eb8245_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
122 cdr=eb8245_read_register(chip->chip_base_addr+SJACDR);
123 eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
125 eb8245_write_register(0, chip->chip_base_addr+SJAIER);
128 eb8245_write_register(0, chip->chip_base_addr+SJAMOD);
129 while (eb8245_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
130 if(!i--) return -ENODEV;
132 eb8245_write_register(0, chip->chip_base_addr+SJAMOD);
135 cdr=eb8245_read_register(chip->chip_base_addr+SJACDR);
136 eb8245_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
138 eb8245_write_register(0, chip->chip_base_addr+SJAIER);
143 #define RESET_ADDR 0x0
148 * eb8245_init_hw_data - Initialize hardware cards
149 * @candev: Pointer to candevice/board structure
151 * The function eb8245_init_hw_data() is used to initialize the hardware
152 * structure containing information about the installed CAN-board.
153 * %RESET_ADDR represents the io-address of the hardware reset register.
154 * %NR_82527 represents the number of intel 82527 chips on the board.
155 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
156 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
157 * the hardware uses programmable interrupts.
158 * Return Value: The function always returns zero
161 int eb8245_init_hw_data(struct candevice_t *candev)
163 candev->res_addr=RESET_ADDR;
164 candev->nr_82527_chips=0;
165 candev->nr_sja1000_chips=1;
166 candev->nr_all_chips=1;
167 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
173 * eb8245_init_chip_data - Initialize chips
174 * @candev: Pointer to candevice/board structure
175 * @chipnr: Number of the CAN chip on the hardware card
177 * The function eb8245_init_chip_data() is used to initialize the hardware
178 * structure containing information about the CAN chips.
179 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
181 * The @chip_base_addr entry represents the start of the 'official' memory map
182 * of the installed chip. It's likely that this is the same as the @io_addr
183 * argument supplied at module loading time.
184 * The @clock entry holds the chip clock value in Hz.
185 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
186 * register. Options defined in the %sja1000.h file:
187 * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
188 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
189 * register. Options defined in the %sja1000.h file:
190 * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
191 * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
192 * The entry @int_clk_reg holds hardware specific options for the Clock Out
193 * register. Options defined in the %i82527.h file:
194 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
195 * The entry @int_bus_reg holds hardware specific options for the Bus
196 * Configuration register. Options defined in the %i82527.h file:
197 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
198 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
199 * register. Options defined in the %i82527.h file:
200 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
201 * Return Value: The function always returns zero
204 int eb8245_init_chip_data(struct candevice_t *candev, int chipnr)
206 /*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
207 sja1000p_fill_chipspecops(candev->chip[chipnr]);
209 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
210 candev->chip[chipnr]->clock = 16000000;
211 candev->chip[chipnr]->int_clk_reg = 0x0;
212 candev->chip[chipnr]->int_bus_reg = 0x0;
213 candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
214 candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
220 * eb8245_init_obj_data - Initialize message buffers
221 * @chip: Pointer to chip specific structure
222 * @objnr: Number of the message buffer
224 * The function eb8245_init_obj_data() is used to initialize the hardware
225 * structure containing information about the different message objects on the
226 * CAN chip. In case of the sja1000 there's only one message object but on the
227 * i82527 chip there are 15.
228 * The code below is for a i82527 chip and initializes the object base addresses
229 * The entry @obj_base_addr represents the first memory address of the message
230 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
232 * Unless the hardware uses a segmented memory map, flags can be set zero.
233 * Return Value: The function always returns zero
236 int eb8245_init_obj_data(struct canchip_t *chip, int objnr)
238 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
243 * eb8245_program_irq - program interrupts
244 * @candev: Pointer to candevice/board structure
246 * The function eb8245_program_irq() is used for hardware that uses
247 * programmable interrupts. If your hardware doesn't use programmable interrupts
248 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
249 * leave this function unedited. Again this function is hardware specific so
250 * there's no example code.
251 * Return value: The function returns zero on success or %-ENODEV on failure
254 int eb8245_program_irq(struct candevice_t *candev)
260 * eb8245_write_register - Low level write register routine
261 * @data: data to be written
262 * @address: memory address to write to
264 * The function eb8245_write_register() is used to write to hardware registers
265 * on the CAN chip. You should only have to edit this function if your hardware
266 * uses some specific write process.
267 * Return Value: The function does not return a value
270 void eb8245_write_register(unsigned data, can_ioptr_t address)
272 /*DEBUGMSG("eb8245_write_register: addr=0x%lx data=0x%x",
274 can_writeb(data,address);
278 * eb8245_read_register - Low level read register routine
279 * @address: memory address to read from
281 * The function eb8245_read_register() is used to read from hardware registers
282 * on the CAN chip. You should only have to edit this function if your hardware
283 * uses some specific read process.
284 * Return Value: The function returns the value stored in @address
287 unsigned eb8245_read_register(can_ioptr_t address)
289 return can_readb(address);
292 /* !!! Don't change this function !!! */
293 int eb8245_register(struct hwspecops_t *hwspecops)
295 hwspecops->request_io = eb8245_request_io;
296 hwspecops->release_io = eb8245_release_io;
297 hwspecops->reset = eb8245_reset;
298 hwspecops->init_hw_data = eb8245_init_hw_data;
299 hwspecops->init_chip_data = eb8245_init_chip_data;
300 hwspecops->init_obj_data = eb8245_init_obj_data;
301 hwspecops->write_register = eb8245_write_register;
302 hwspecops->read_register = eb8245_read_register;
303 hwspecops->program_irq = eb8245_program_irq;