2 * Linux CAN-bus device driver.
3 * Written for new CAN driver version by Pavel Pisa - OCERA team member
4 * email:pisa@cmp.felk.cvut.cz
5 * This software is released under the GPL-License.
6 * Version lincan-0.3 17 Jun 2004
9 #include "../include/can.h"
10 #include "../include/can_sysdep.h"
11 #include "../include/main.h"
12 #include "../include/unican_cl2.h"
13 #include "../include/setup.h"
15 #define UNICAN_PCI_VENDOR 0xFA3C
16 #define UNICAN_PCI_ID 0x0101
18 static void unican_delay(long msdelay)
21 if(!rtl_rt_system_is_idle()) {
22 rtl_delay(1000000l*msdelay);
24 #endif /*CAN_WITH_RTL*/
26 set_current_state(TASK_UNINTERRUPTIBLE);
27 schedule_timeout((msdelay*HZ)/1000+1);
32 /* * * unican Chip Functionality * * */
34 int unican_enable_configuration(struct canchip_t *chip)
39 int unican_disable_configuration(struct canchip_t *chip)
45 * unican_chip_config: - can chip configuration
46 * @chip: pointer to chip state structure
48 * Return Value: negative value reports error.
51 int unican_chip_config(struct canchip_t *chip)
54 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
58 /* disable all card interrupts */
59 ret = cl2_int_mode(chipext, INT_MODE_ALL*0);
61 CANMSG("disable interrupts by cl2_iit_mode returned %d\n",ret);
66 if (chip->baudrate == 0)
67 chip->baudrate=1000000;
69 ret = chip->chipspecops->baud_rate(chip,chip->baudrate,chip->clock,0,75,0);
71 CANMSG("can not set baudrate\n");
76 /* set interrupt inhibit time to 1 ms */
77 ret = cl2_set_iit(chipext, 10);
79 CANMSG("cl2_set_iit returned %d\n",ret);
84 /* enable start interrupt inhibit time command */
85 ret = cl2_iit_mode(chipext, 1);
87 CANMSG("cl2_iit_mode returned %d\n",ret);
92 /* enable all card interrupts */
93 ret = cl2_int_mode(chipext, INT_MODE_ALL);
95 CANMSG("cl2_iit_mode returned %d\n",ret);
100 /* generate interrupt command */
101 cl2_gen_interrupt(chipext);
108 * unican_extended_mask: - setup of extended mask for message filtering
109 * @chip: pointer to chip state structure
110 * @code: can message acceptance code
111 * @mask: can message acceptance mask
113 * Return Value: negative value reports error.
116 int unican_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask)
122 * unican_baud_rate: - set communication parameters.
123 * @chip: pointer to chip state structure
124 * @rate: baud rate in Hz
125 * @clock: frequency of sja1000 clock in Hz (ISA osc is 14318000)
126 * @sjw: synchronization jump width (0-3) prescaled clock cycles
127 * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
128 * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
130 * Return Value: negative value reports error.
133 int unican_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
134 int sampl_pt, int flags)
137 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
141 case 5000: bt_val = CL2_BITRATE_5K; break;
142 case 10000: bt_val = CL2_BITRATE_10K; break;
143 case 20000: bt_val = CL2_BITRATE_20K; break;
144 case 50000: bt_val = CL2_BITRATE_50K; break;
145 case 100000: bt_val = CL2_BITRATE_100K; break;
146 case 125000: bt_val = CL2_BITRATE_125K; break;
147 case 200000: bt_val = CL2_BITRATE_200K; break;
148 case 250000: bt_val = CL2_BITRATE_250K; break;
149 case 500000: bt_val = CL2_BITRATE_500K; break;
150 case 800000: bt_val = CL2_BITRATE_800K; break;
151 case 1000000:bt_val = CL2_BITRATE_1M; break;
152 default: return -EINVAL;
155 ret=cl2_set_bitrate(chipext,bt_val);
156 if(ret == CL2_COMMAND_BUSY) return -EBUSY;
157 if(ret != CL2_OK) return -EINVAL;
164 * unican_read: - reads and distributes one or more received messages
165 * @chip: pointer to chip state structure
166 * @obj: pinter to CAN message queue information
168 * This is rewritten cl2_receive_data function. The direct use of CL2
169 * function would require one more message data copy to reformat message
170 * data into different structure layout. Other way is to rewrite CL2 sources.
171 * No of these solutions is perfect.
175 void unican_read(struct canchip_t *chip, struct msgobj_t *obj) {
176 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
179 unsigned long timestamp;
183 ptr16 = (__u16*)chipext->rxBufPtr;
184 u = unican_readw(ptr16++);
185 if ( !(u & CL2_MESSAGE_VALID) ) break; /* No more messages in the queue */
187 obj->rx_msg.id = ((__u32)(u & 0xFF00 )) << 16;
188 u = unican_readw(ptr16++);
189 obj->rx_msg.id |= ((__u32)( u & 0x00FF )) << 16;
190 obj->rx_msg.id |= (__u32)( u & 0xFF00 );
191 u = unican_readw(ptr16++);
192 obj->rx_msg.id |= (__u32)( u & 0x00FF );
197 if ( u & CL2_EXT_FRAME ) { /* 2.0B frame */
198 obj->rx_msg.id >>= 3;
199 obj->rx_msg.flags = MSG_EXT;
200 } else { /* 2.0A frame */
201 obj->rx_msg.id >>= 21;
202 obj->rx_msg.flags = 0;
205 /*if ( !(u & (CL2_REMOTE_FRAME<<8)) )
206 obj->rx_msg.flags |= MSG_RTR;*/
208 obj->rx_msg.length = ( (u >> 4) & 0x000F );
209 if(obj->rx_msg.length > CAN_MSG_LENGTH) obj->rx_msg.length = CAN_MSG_LENGTH;
211 for ( i = 0; i < obj->rx_msg.length; ) {
212 u = unican_readw(ptr16++);
213 obj->rx_msg.data[i++] = (__u8)( u );
214 obj->rx_msg.data[i++] = (__u8)( u >> 8 );
216 if ( obj->rx_msg.length & 0x01 ) { /* odd */
217 timestamp = ( (unican_readw(ptr16++) & 0x00FF) | (u & 0xFF00) );
219 u = unican_readw(ptr16++);
220 timestamp = (u << 8) | (u >> 8);
222 unican_writew(0x000,(__u16*)chipext->rxBufPtr);
224 #ifdef CAN_MSG_VERSION_2
225 obj->rx_msg.timestamp.tv_sec = 0;
226 obj->rx_msg.timestamp.tv_usec = timestamp;
227 #else /* CAN_MSG_VERSION_2 */
228 obj->rx_msg.timestamp = timestamp;
229 #endif /* CAN_MSG_VERSION_2 */
231 /* increment rx-buffer pointer */
232 if ( (chipext->rxBufBase + chipext->rxBufSize*16 ) <= (chipext->rxBufPtr += 16) ) {
233 chipext->rxBufPtr = chipext->rxBufBase;
236 canque_filter_msg2edges(obj->qends, &obj->rx_msg);
242 * unican_pre_read_config: - prepares message object for message reception
243 * @chip: pointer to chip state structure
244 * @obj: pointer to message object state structure
246 * Return Value: negative value reports error.
247 * Positive value indicates immediate reception of message.
250 int unican_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
255 #define MAX_TRANSMIT_WAIT_LOOPS 10
257 * unican_pre_write_config: - prepares message object for message transmission
258 * @chip: pointer to chip state structure
259 * @obj: pointer to message object state structure
260 * @msg: pointer to CAN message
262 * Return Value: negative value reports error.
265 int unican_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
266 struct canmsg_t *msg)
272 * unican_send_msg: - initiate message transmission
273 * @chip: pointer to chip state structure
274 * @obj: pointer to message object state structure
275 * @msg: pointer to CAN message
277 * This function is called after unican_pre_write_config() function,
278 * which prepares data in chip buffer.
279 * Return Value: negative value reports error.
282 int unican_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
283 struct canmsg_t *msg)
289 * unican_check_tx_stat: - checks state of transmission engine
290 * @chip: pointer to chip state structure
292 * Return Value: negative value reports error.
293 * Positive return value indicates transmission under way status.
294 * Zero value indicates finishing of all issued transmission requests.
297 int unican_check_tx_stat(struct canchip_t *chip)
303 * unican_set_btregs: - configures bitrate registers
304 * @chip: pointer to chip state structure
305 * @btr0: bitrate register 0
306 * @btr1: bitrate register 1
308 * Return Value: negative value reports error.
311 int unican_set_btregs(struct canchip_t *chip, unsigned short btr0,
315 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
318 bt_val=btr0 | (btr1<<8);
319 ret=cl2_set_bitrate(chipext,bt_val);
320 if(ret == CL2_COMMAND_BUSY) return -EBUSY;
321 if(ret != CL2_OK) return -EINVAL;
327 * unican_stop_chip: - starts chip message processing
328 * @chip: pointer to chip state structure
330 * Return Value: negative value reports error.
333 int unican_start_chip(struct canchip_t *chip)
339 * unican_stop_chip: - stops chip message processing
340 * @chip: pointer to chip state structure
342 * Return Value: negative value reports error.
345 int unican_stop_chip(struct canchip_t *chip)
351 * unican_attach_to_chip: - attaches to the chip, setups registers and state
352 * @chip: pointer to chip state structure
354 * Return Value: negative value reports error.
355 * File: src/sja1000p.c
357 int unican_attach_to_chip(struct canchip_t *chip)
363 * unican_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set
364 * @chip: pointer to chip state structure
366 * Return Value: negative value reports error.
367 * File: src/sja1000p.c
369 int unican_release_chip(struct canchip_t *chip)
371 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
373 unican_stop_chip(chip);
374 cl2_clear_interrupt(chipext);
380 * unican_remote_request: - configures message object and asks for RTR message
381 * @chip: pointer to chip state structure
382 * @obj: pointer to message object structure
384 * Return Value: negative value reports error.
387 int unican_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
389 CANMSG("unican_remote_request not implemented\n");
394 * unican_standard_mask: - setup of mask for message filtering
395 * @chip: pointer to chip state structure
396 * @code: can message acceptance code
397 * @mask: can message acceptance mask
399 * Return Value: negative value reports error.
402 int unican_standard_mask(struct canchip_t *chip, unsigned short code,
405 CANMSG("unican_standard_mask not implemented\n");
410 * unican_clear_objects: - clears state of all message object residing in chip
411 * @chip: pointer to chip state structure
413 * Return Value: negative value reports error.
416 int unican_clear_objects(struct canchip_t *chip)
418 CANMSG("unican_clear_objects not implemented\n");
423 * unican_config_irqs: - tunes chip hardware interrupt delivery
424 * @chip: pointer to chip state structure
425 * @irqs: requested chip IRQ configuration
427 * Return Value: negative value reports error.
430 int unican_config_irqs(struct canchip_t *chip, short irqs)
433 CANMSG("unican_config_irqs not implemented\n");
438 * unican_irq_write_handler: - part of ISR code responsible for transmit events
439 * @chip: pointer to chip state structure
440 * @obj: pointer to attached queue description
442 * The main purpose of this function is to read message from attached queues
443 * and transfer message contents into CAN controller chip.
444 * This subroutine is called by
445 * unican_irq_write_handler() for transmit events.
448 void unican_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
451 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
452 __u16 *ptr16 = (__u16*)chipext->rxBufPtr;
454 unsigned long timestamp=0;
461 /* Do local transmitted message distribution if enabled */
463 obj->tx_slot->msg.flags |= MSG_LOCAL;
464 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
466 /* Free transmitted slot */
467 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
472 if ( chipext->asyncTxBufSize==0 ) {
473 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
474 return; /* No asynchronous queue configured */
478 ptr16 = (__u16*)chipext->asyncTxBufPtr;
479 if(unican_readw(ptr16) & CL2_MESSAGE_VALID)
480 return; /* No free space in asynchronous Tx queue */
482 cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
484 return; /* No more messages to send */
487 cobid = obj->tx_slot->msg.id;
489 if ( (obj->tx_slot->msg.flags & MSG_EXT) ) { /* 2.0B frame */
491 } else { /* 2.0A frame */
495 u = ((cobid>>16) & 0x00FF ) + (cobid & 0xFF00);
496 unican_writew(u,ptr16++);
498 len = obj->tx_slot->msg.length;
499 if(len > CAN_MSG_LENGTH)
500 len = CAN_MSG_LENGTH;
501 u = (len << 12) | (cobid & 0x00FF);
503 if ( !(obj->tx_slot->msg.flags & MSG_RTR) )
504 u |= CL2_REMOTE_FRAME<<8;
505 if ( obj->tx_slot->msg.flags & MSG_EXT )
506 u |= CL2_EXT_FRAME<<8;
508 unican_writew(u,ptr16++);
510 for ( i = 0; i < len-1; ) {
511 u = obj->tx_slot->msg.data[i++];
512 u |= ((__u16)obj->tx_slot->msg.data[i]<<8); i++;
513 unican_writew(u,ptr16++);
516 unican_writew(timestamp,ptr16);
518 u = obj->tx_slot->msg.data[i++];
519 u |= ((timestamp & 0x00FF)<<8);
520 unican_writew(u,ptr16++);
521 unican_writew(timestamp & 0x00FF, ptr16);
524 u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
525 unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
527 if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
528 (chipext->asyncTxBufPtr += 16) ) {
529 chipext->asyncTxBufPtr = chipext->asyncTxBufBase;
533 /* Do local transmitted message distribution if enabled. */
534 /* This code should not be called directly there, because it breaks strict
535 behavior of queues if O_SYNC is set. */
537 obj->tx_slot->msg.flags |= MSG_LOCAL;
538 canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
540 /* Free transmitted slot */
541 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
550 void unican_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
552 while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
554 if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
555 unican_irq_write_handler(chip, obj);
558 /*if(can_msgobj_test_and_clear_fl(obj,FILTCH_REQUEST)) {
559 unican_irq_update_filter(chip, obj);
562 can_msgobj_clear_fl(obj,TX_LOCK);
563 if(can_msgobj_test_fl(obj,TX_REQUEST))
565 if(can_msgobj_test_fl(obj,FILTCH_REQUEST) && !obj->tx_slot)
575 * unican_irq_handler: - interrupt service routine
576 * @irq: interrupt vector number, this value is system specific
577 * @chip: pointer to chip state structure
579 * Interrupt handler is activated when state of CAN controller chip changes,
580 * there is message to be read or there is more space for new messages or
581 * error occurs. The receive events results in reading of the message from
582 * CAN controller chip and distribution of message through attached
586 int unican_irq_handler(int irq, struct canchip_t *chip)
588 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
589 struct msgobj_t *obj=chip->msgobj[0];
593 if(!(chip->flags&CHIP_CONFIGURED)) {
594 CANMSG("unican_irq_handler: called for non-configured device\n");
595 return CANCHIP_IRQ_NONE;
598 if (cl2_get_status(chipext, &status) == CL2_NO_REQUEST) {
599 /* Reenable interrupts generation, this has to be even there,
600 * because irq_accept disables interrupts
602 cl2_gen_interrupt(chipext);
603 return CANCHIP_IRQ_NONE;
606 cl2_clear_interrupt(chipext);
609 if(status & CL2_CARD_ERROR) {
610 cl2_get_error(chipext, &error);
611 CANMSG("unican_irq_handler: card status=0x%04x error=0x%04x \n",status,error);
613 if(status & CL2_ASYNC_QUEUE_EMPTY) {
616 if(status & CL2_SYNC_QUEUE_EMPTY) {
617 can_msgobj_set_fl(obj,TX_REQUEST);
619 /* calls unican_irq_write_handler synchronized with other invocations */
620 unican_irq_sync_activities(chip, obj);
623 if(status & CL2_DATA_IN_RBUF) {
624 unican_read(chip, obj);
627 /* Reenable interrupts generation */
628 cl2_gen_interrupt(chipext);
630 return CANCHIP_IRQ_HANDLED;
635 * unican_irq_accept: - fast irq accept routine, blocks further interrupts
636 * @irq: interrupt vector number, this value is system specific
637 * @chip: pointer to chip state structure
639 * This routine only accepts interrupt reception and stops further
640 * incoming interrupts, but does not handle situation causing interrupt.
643 int unican_irq_accept(int irq, struct canchip_t *chip)
645 sCAN_CARD *chipext = (sCAN_CARD *)chip->chip_data;
647 cl2_clear_interrupt(chipext);
649 return CANCHIP_IRQ_ACCEPTED;
652 /*void unican_do_tx_timeout(unsigned long data)
654 struct msgobj_t *obj=(struct msgobj_t *)data;
659 * unican_wakeup_tx: - wakeups TX processing
660 * @chip: pointer to chip state structure
661 * @obj: pointer to message object structure
663 * Return Value: negative value reports error.
666 int unican_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
668 can_preempt_disable();
670 can_msgobj_set_fl(obj,TX_REQUEST);
672 /* calls unican_irq_write_handler synchronized with other invocations
673 from kernel and IRQ context */
674 unican_irq_sync_activities(chip, obj);
676 can_preempt_enable();
682 /* * * unican Board Functionality * * */
684 #define IO_RANGE 0x1000
687 * unican_request_io: - reserve io or memory range for can board
688 * @candev: pointer to candevice/board which asks for io. Field @io_addr
689 * of @candev is used in most cases to define start of the range
691 * Return Value: The function returns zero on success or %-ENODEV on failure
694 int unican_request_io(struct candevice_t *candev)
696 can_ioptr_t remap_addr;
697 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - unican")) {
698 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
701 if ( !( remap_addr = ioremap( candev->io_addr, IO_RANGE ) ) ) {
702 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
703 can_release_mem_region(candev->io_addr,IO_RANGE);
707 can_base_addr_fixup(candev, remap_addr);
708 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
713 * unican_elease_io - free reserved io memory range
714 * @candev: pointer to candevice/board which releases io
716 * Return Value: The function always returns zero
719 int unican_release_io(struct candevice_t *candev)
721 iounmap(candev->dev_base_addr);
722 can_release_mem_region(candev->io_addr,IO_RANGE);
727 * unican_reset - hardware reset routine
728 * @candev: Pointer to candevice/board structure
730 * Return Value: The function returns zero on success or %-ENODEV on failure
733 int unican_reset(struct candevice_t *candev)
737 struct canchip_t *chip = candev->chip[0];
741 if(chip->chip_data == NULL) {
742 chip->chip_data = can_checked_malloc(sizeof(sCAN_CARD));
743 if(!chip->chip_data) return -ENOMEM;
744 memset(chip->chip_data,0,sizeof(sCAN_CARD));
745 ret = cl2_init_card(chip->chip_data,(void*)chip->chip_base_addr,chip->chip_irq);
747 CANMSG("cl2_init_card returned %d\n",ret);
752 chipext = (sCAN_CARD *)chip->chip_data;
755 /* reset and test whether the card is present */
757 cl2_reset_card(chipext);
760 ret = cl2_test_card(chipext);
761 } while((ret != CL2_OK)&&(i<10));
764 CANMSG("card check failed %d\n",ret);
768 /* start card firmware */
769 ret = cl2_start_firmware(chipext);
771 CANMSG("cl2_start_firmware returned %d\n",ret);
781 * unican_init_hw_data - Initialize hardware cards
782 * @candev: Pointer to candevice/board structure
784 * Return Value: The function always returns zero
787 int unican_init_hw_data(struct candevice_t *candev)
790 candev->nr_82527_chips=0;
791 candev->nr_sja1000_chips=0;
792 candev->nr_all_chips=1;
793 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
799 * unican_init_chip_data - Initialize chips
800 * @candev: Pointer to candevice/board structure
801 * @chipnr: Number of the CAN chip on the hardware card
803 * Return Value: The function always returns zero
806 int unican_init_chip_data(struct candevice_t *candev, int chipnr)
808 struct canchip_t *chip = candev->chip[chipnr];
809 chip->chip_type = "unican";
810 chip->chip_base_addr = 0;
811 chip->clock = 10000000;
812 chip->int_clk_reg = 0x0;
813 chip->int_bus_reg = 0x0;
814 chip->max_objects = 1;
815 chip->chip_base_addr=candev->dev_base_addr;
817 CANMSG("initializing unican chip operations\n");
818 chip->chipspecops->chip_config=unican_chip_config;
819 chip->chipspecops->baud_rate=unican_baud_rate;
820 chip->chipspecops->standard_mask=unican_standard_mask;
821 chip->chipspecops->extended_mask=unican_extended_mask;
822 chip->chipspecops->message15_mask=unican_extended_mask;
823 chip->chipspecops->clear_objects=unican_clear_objects;
824 chip->chipspecops->config_irqs=unican_config_irqs;
825 chip->chipspecops->pre_read_config=unican_pre_read_config;
826 chip->chipspecops->pre_write_config=unican_pre_write_config;
827 chip->chipspecops->send_msg=unican_send_msg;
828 chip->chipspecops->check_tx_stat=unican_check_tx_stat;
829 chip->chipspecops->wakeup_tx=unican_wakeup_tx;
830 chip->chipspecops->remote_request=unican_remote_request;
831 chip->chipspecops->enable_configuration=unican_enable_configuration;
832 chip->chipspecops->disable_configuration=unican_disable_configuration;
833 chip->chipspecops->set_btregs=unican_set_btregs;
834 chip->chipspecops->attach_to_chip=unican_attach_to_chip;
835 chip->chipspecops->release_chip=unican_release_chip;
836 chip->chipspecops->start_chip=unican_start_chip;
837 chip->chipspecops->stop_chip=unican_stop_chip;
838 chip->chipspecops->irq_handler=unican_irq_handler;
839 chip->chipspecops->irq_accept=unican_irq_accept;
845 * unican_init_obj_data - Initialize message buffers
846 * @chip: Pointer to chip specific structure
847 * @objnr: Number of the message buffer
849 * Return Value: The function always returns zero
852 int unican_init_obj_data(struct canchip_t *chip, int objnr)
854 struct msgobj_t *obj=chip->msgobj[objnr];
855 obj->obj_base_addr=chip->chip_base_addr;
856 /*obj->tx_timeout.function=unican_do_tx_timeout;
857 obj->tx_timeout.data=(unsigned long)obj;*/
862 * unican_program_irq - program interrupts
863 * @candev: Pointer to candevice/board structure
865 * Return value: The function returns zero on success or %-ENODEV on failure
868 int unican_program_irq(struct candevice_t *candev)
873 int unican_register(struct hwspecops_t *hwspecops)
875 hwspecops->request_io = unican_request_io;
876 hwspecops->release_io = unican_release_io;
877 hwspecops->reset = unican_reset;
878 hwspecops->init_hw_data = unican_init_hw_data;
879 hwspecops->init_chip_data = unican_init_chip_data;
880 hwspecops->init_obj_data = unican_init_obj_data;
881 hwspecops->write_register = NULL;
882 hwspecops->read_register = NULL;
883 hwspecops->program_irq = unican_program_irq;
888 /* Unicontrols PCI board specific functions */
890 #ifdef CAN_ENABLE_PCI_SUPPORT
892 int unican_pci_request_io(struct candevice_t *candev)
894 can_ioptr_t remap_addr;
896 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
897 if(pci_request_region(candev->sysdevptr.pcidev, 0, "unican_pci") != 0){
898 CANMSG("Request of Unican PCI range failed\n");
901 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
902 if(pci_request_regions(candev->sysdevptr.pcidev, "kv_pcican") != 0){
903 CANMSG("Request of Unican PCI range failed\n");
906 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
908 candev->io_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
909 candev->res_addr=candev->io_addr;
911 if ( !( remap_addr = ioremap( candev->io_addr, IO_RANGE ) ) ) {
912 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
913 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
914 pci_release_region(candev->sysdevptr.pcidev, 0);
915 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
916 pci_release_regions(candev->sysdevptr.pcidev);
917 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
921 can_base_addr_fixup(candev, remap_addr);
922 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
923 DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
924 can_ioptr2ulong(candev->dev_base_addr),
925 can_ioptr2ulong(candev->chip[0]->chip_base_addr));
931 int unican_pci_release_io(struct candevice_t *candev)
933 iounmap(candev->dev_base_addr);
934 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
935 pci_release_region(candev->sysdevptr.pcidev, 0);
936 #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
937 pci_release_regions(candev->sysdevptr.pcidev);
938 #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
943 int unican_pci_init_hw_data(struct candevice_t *candev)
945 struct pci_dev *pcidev = NULL;
948 pcidev = pci_find_device(UNICAN_PCI_VENDOR, UNICAN_PCI_ID, pcidev);
949 if(pcidev == NULL) return -ENODEV;
950 } while(can_check_dev_taken(pcidev));
952 if (pci_enable_device (pcidev)){
953 printk(KERN_CRIT "Setup of Unican PCI failed\n");
956 candev->sysdevptr.pcidev=pcidev;
958 if(!(pci_resource_flags(pcidev,0)&IORESOURCE_MEM)){
959 printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
962 candev->io_addr=pci_resource_start(pcidev,0);
963 candev->res_addr=candev->io_addr;
964 candev->dev_base_addr=NULL;
966 /*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
968 candev->nr_82527_chips=0;
969 candev->nr_sja1000_chips=0;
970 candev->nr_all_chips=1;
976 int unican_pci_init_chip_data(struct candevice_t *candev, int chipnr)
979 candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
980 ret = unican_init_chip_data(candev, chipnr);
981 candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
985 int unican_pci_register(struct hwspecops_t *hwspecops)
987 hwspecops->request_io = unican_pci_request_io;
988 hwspecops->release_io = unican_pci_release_io;
989 hwspecops->reset = unican_reset;
990 hwspecops->init_hw_data = unican_pci_init_hw_data;
991 hwspecops->init_chip_data = unican_pci_init_chip_data;
992 hwspecops->init_obj_data = unican_init_obj_data;
993 hwspecops->write_register = NULL;
994 hwspecops->read_register = NULL;
995 hwspecops->program_irq = unican_program_irq;
999 #endif /*CAN_ENABLE_PCI_SUPPORT*/
1001 #ifdef CAN_ENABLE_VME_SUPPORT
1003 #include "unican_vme.c"
1005 #endif /*CAN_ENABLE_VME_SUPPORT*/