2 * Linux CAN-bus device driver for IXXAT iPC-I 165 (PCI) compatible HW.
3 * Written for new CAN driver version by Radim Kalas
4 * email:kalas@unicontrols.cz
5 * This software is released under the GPL-License.
6 * Version lincan-0.3 17 Jun 2004
9 #include "../include/can_sysdep.h"
10 #include "../include/kthread.h"
12 /* PCI device identification */
13 #define IPCI165_VENDOR_ID PCI_VENDOR_ID_PLX
14 #define IPCI165_DEVICE_ID PCI_DEVICE_ID_PLX_9050
16 #define IPCI165_SUBSYSTEM_ID 0x1067 /* subsystem ID for IXXAT iPC-I 165 card */
17 #define CP350_SUBSYSTEM_ID 0x1089 /* subsystem ID for PEP/Kontron CP350 card */
20 /*****************************************************************************
21 * Control Registers Memory specific defines *
22 *****************************************************************************/
23 #define CRM_SIZE 0x80 /* region size */
25 #define CRM_UCR 0x50 /* user control register */
26 #define CRM_ICR 0x4C /* interrupt control register */
28 /*****************************************************************************
29 * DP-RAM (PCI Memory Window 2) specific defines *
30 *****************************************************************************/
31 #define DPRAM_SIZE 8*1024 /* DP-RAM size - PCI Memory Window 2 */
33 #define OF_CMD_BUFFER 0 /* Offset of Command Buffer \
36 #define OF_CH1_TX_QUEUE 0x50 /* offset to TX queue for channel 1 */
37 #define OF_CH2_TX_QUEUE 0x438 /* offset to TX queue for channel 2 */
38 #define OF_CH1_RX_QUEUE 0x820 /* offset to RX queue for channel 1 */
39 #define OF_CH2_RX_QUEUE 0xc08 /* offset to RX queue for channel 2 */
41 #define OF_STATUS_BUFFER 0xff0 /* offset to status buffer */
43 #define BCI_QUEUE_SIZE 50 /* Size of TX and RX message queues \
44 (number of messages) */
45 #define BCI_MSG_SIZE 20 /* Size of one message */
47 /*****************************************************************************
48 * Bootstrap loader specific defines *
49 *****************************************************************************/
51 /* identification strings offsets & lengths */
52 #define BOARD_NAME_OFS 0x00 /* Name (string) */
53 #define BOARD_NAME_LEN 7 /* String length */
55 #define HW_VERSION_OFS 0x20 /* Version (string) */
56 #define HW_VERSION_LEN 6 /* String length */
58 #define MODE_OFS 0x102 /* Mode (string) */
59 #define MODE_LEN 14 /* String length */
61 #define TYPE_LEN 11 /* Type length */
63 /* FW loader command buffer offsets */
64 #define OF_LD_SYNC 0x100 /* Synchronization flag */
65 #define OF_LD_CMD 0x101 /* Command code */
66 #define OF_LD_NUM 0x102 /* Size of FW block */
67 #define OF_LD_ADDRESS 0x104 /* Start Address of FW block */
68 #define OF_LD_DATA 0x108 /* Data of FW block */
71 #define LD_CMD_DOWNLOAD 1 /* Download FW block */
72 #define LD_CMD_START_FW 2 /* Start FW */
74 /*****************************************************************************
75 * BCI specific defines *
76 *****************************************************************************/
78 /* BCI command buffer offsets */
79 #define OF_BCI_SYNC 0x00 /* Synchronization flag */
80 #define OF_BCI_NUM 0x01 /* Command size */
81 #define OF_BCI_CMD 0x04 /* Command code */
82 #define OF_BCI_DATA 0x05 /* Command data */
83 #define BCI_CMD_MAX_LEN 76 /* Max command length */
86 #define CMD_ID 1 /* Get identification string */
87 #define CMD_VERSION 2 /* Get version number string */
88 #define CMD_TEST 3 /* Test the command buffer, invert data bytes */
89 #define CMD_INIT_CAN 4 /* Initialization of the CAN controller */
90 #define CMD_START_CAN 6 /* Start the CAN controller */
91 #define CMD_STOP_CAN 7 /* Stop the CAN controller */
92 #define CMD_RESET_CAN 8 /* Reset the CAN controller */
93 #define CMD_SET_EXT_FILTER_MASK 9 /* Set global filter mask */
94 #define CMD_CONFIG_RX_QUEUE 11 /* Config receive queue mode */
95 #define CMD_GET_BOARD_INFO 12 /* Get board information */
96 #define CMD_START_TIMER 13 /* Start cyclic timer */
97 #define CMD_STOP_TIMER 14 /* Stop cyclic timer */
98 #define CMD_SET_ACC_MASK 15 /* Set acceptance mask */
100 /* CMD_BOARD_INFO offsets */
101 #define BOARD_INFO_SIZE 26 /* Size */
102 #define OF_BOARD_INFO_VER 1 /* Version in BCD, UINT16 */
103 #define OF_BOARD_INFO_CHIPS 3 /* Num of chips, UINT16 */
104 #define OF_BOARD_INFO_CHIP1_TYPE 5 /* Type of first chip, UINT8[10] */
105 #define OF_BOARD_INFO_CHIP2_TYPE 15 /* Type of second chip, UINT8[10] */
107 /* baud rates BTR0, BTR1 for SJA1000 */
108 #define BCI_10KB 0x67,0x2F
109 #define BCI_20KB 0x53,0x2F
110 #define BCI_50KB 0x47,0x2F
111 #define BCI_100KB 0x43,0x2F
112 #define BCI_125KB 0x03,0x1C
113 #define BCI_250KB 0x01,0x1C
114 #define BCI_500KB 0x00,0x1C
115 #define BCI_1000KB 0x00,0x14
117 #define CAN_FRAME_MIN_BIT_LEN 47 /* Min no of bits in CAN standard data frame */
118 #define CAN_FRAME_MAX_BIT_LEN 111 /* Max no of bits in CAN standard data frame */
120 /* BCI_CONFIG_RX Queue Modes */
121 #define BCI_POLL_MODE 0
122 #define BCI_LATENCY_MODE 1
123 #define BCI_THROUGHPUT_MODE 2
127 int idx; /* points to the active record in buffer */
128 can_ioptr_t addr; /* start address of the message queue */
131 /* ipci165 chip data */
132 struct ipci165_chip_t {
133 struct bci_queue_t rx_queue; /* RX queue info */
134 struct bci_queue_t tx_queue; /* TX queue info */
135 kthread_t kthread; /* kernel thread info */
136 long flags; /* flag for syncing with kernel thread */
139 #define CHIP_FLAG_BUS_OFF 1 /* bus-off signal to kthread */
140 #define CHIP_FLAG_RESET 2 /* chip is being reseted */
143 /* RX & TX Queue message structure */
144 #define BCI_MSG_STATUS 0 /* status (U8) */
145 #define BCI_MSG_NUM 1 /* size (U8) */
146 #define BCI_MSG_TIMESTAMP 2 /* timestamp (U32)*/
147 #define BCI_MSG_TYPE 6 /* message type (U8) */
150 #define BCI_MSG_FRAME 7 /* frame info (U8) */
151 #define BCI_MSG_ID 8 /* ID 11/29b (U16/U32) */
152 #define BCI_MSG_STD_DATA 10 /* message data */
153 #define BCI_MSG_EXT_DATA 12 /* message data */
156 #define BCI_MSG_CAN_STATUS 8 /* status info (U16) */
158 #define BCI_MSG_STATUS_FREE 0 /* message buffer is free */
159 #define BCI_MSG_STATUS_FULL 1 /* message buffer is used */
161 #define BCI_MSG_TYPE_CAN 0 /* message containing CAN frame */
162 #define BCI_MSG_TYPE_STATUS 1 /* message containing status info */
164 #define BCI_MSG_FRAME_RTR 0x40 /* RTR flag */
165 #define BCI_MSG_FRAME_EXT 0x80 /* Extended Frame */
167 #define BCI_TIMESTAMP_RES 125 /* Time stamp resolution in usec */
170 #define OF_CAN1_STATUS (OF_STATUS_BUFFER + 0)
171 #define OF_CAN1_LOAD (OF_STATUS_BUFFER + 2)
172 #define OF_CAN2_STATUS (OF_STATUS_BUFFER + 4)
173 #define OF_CAN2_LOAD (OF_STATUS_BUFFER + 6)
174 #define OF_CPU_LOAD (OF_STATUS_BUFFER + 8)
175 #define OF_LIFE_COUNTER (OF_STATUS_BUFFER + 10)
177 #define BCI_CAN_STATUS_INIT 0x0001 /* ctrl is in init mode */
178 #define BCI_CAN_STATUS_WARNING_LEVEL 0x0002 /* warning level has been reached */
179 #define BCI_CAN_STATUS_BUS_OFF 0x0004 /* ctrl disconnected from net */
180 #define BCI_CAN_STATUS_DATA_OVERRUN 0x0008 /* overrun of can message happend */
181 #define BCI_CAN_STATUS_RX 0x0010 /* ctrl is recieving */
182 #define BCI_CAN_STATUS_TX 0x0020 /* ctrl is sending */
183 #define BCI_CAN_STATUS_QUEUE_OVERRUN 0x0100 /* queue overrun */