1 /**************************************************************************/
2 /* File: msmcan.c - MICROSPACE IO space indexed i82527 PC104 card */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
35 #include "../include/can.h"
36 #include "../include/can_sysdep.h"
37 #include "../include/main.h"
38 #include "../include/msmcan.h"
39 #include "../include/i82527.h"
41 static CAN_DEFINE_SPINLOCK(msmcan_port_lock);
43 /* IO_RANGE is the io-memory range that gets reserved, please adjust according
44 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
45 * #define IO_RANGE 0x20 for sja1000 chips.
49 /* The function template_request_io is used to reserve the io-memory. If your
50 * hardware uses a dedicated memory range as hardware control registers you
51 * will have to add the code to reserve this memory as well.
52 * The reserved memory starts at candev->io_addr, wich is the module parameter io.
54 int msmcan_request_io(struct candevice_t *candev)
57 if (!can_request_io_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
58 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
61 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
62 candev->io_addr + IO_RANGE - 1);
67 /* The function template_release_io is used to free the previously reserved
68 * io-memory. In case you reserved more memory, don't forget to free it here.
70 int msmcan_release_io(struct candevice_t *candev)
73 can_release_io_region(candev->io_addr,IO_RANGE);
78 /* The function template_reset is used to give a hardware reset. This is rather
79 * hardware specific so I haven't included example code. Don't forget to check
80 * the reset status of the chip before returning.
82 int msmcan_reset(struct candevice_t *candev)
84 struct canchip_t *chip=candev->chip[0];
86 DEBUGMSG("Resetting msmcan hardware ...\n");
87 /* we don't use template_write_register because we don't use the two first
88 registers of the card but the third in order to make a hard reset */
89 /* can_outb (1, msmcan_base + candev->res_addr); */
92 /* terrible MSMCAN reset design - best to comment out */
97 msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
98 /*CLKOUT stopped (iCPU_CEN=0) */
99 msmcan_write_register(iCPU_DSC, chip->chip_base_addr+iCPU);
100 while(!(msmcan_read_register(chip->chip_base_addr+iCPU)&iCPU_CEN)){
103 CANMSG("Unable to reset board\n");
112 can_disable_irq(chip->chip_irq);
113 msmcan_write_register(iCTL_INI, chip->chip_base_addr+iCTL);
114 can_enable_irq(chip->chip_irq);
119 /* The function template_init_hw_data is used to initialize the hardware
120 * structure containing information about the installed CAN-board.
121 * RESET_ADDR represents the io-address of the hardware reset register.
122 * NR_82527 represents the number of intel 82527 chips on the board.
123 * NR_SJA1000 represents the number of philips sja1000 chips on the board.
124 * The flags entry can currently only be CANDEV_PROGRAMMABLE_IRQ to indicate that
125 * the hardware uses programmable interrupts.
130 int msmcan_init_hw_data(struct candevice_t *candev)
133 candev->nr_82527_chips=1;
134 candev->nr_sja1000_chips=0;
135 candev->nr_all_chips=1;
136 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
141 /* The function template_init_chip_data is used to initialize the hardware
142 * structure containing information about the CAN chips.
143 * CHIP_TYPE represents the type of CAN chip. CHIP_TYPE can be "i82527" or
145 * The chip_base_addr entry represents the start of the 'official' memory map
146 * of the installed chip. It's likely that this is the same as the candev->io_addr
147 * argument supplied at module loading time.
148 * The clock argument holds the chip clock value in Hz.
151 int msmcan_init_chip_data(struct candevice_t *candev, int chipnr)
153 i82527_fill_chipspecops(candev->chip[chipnr]);
154 /* device uses indexed access */
155 candev->chip[chipnr]->chip_base_addr=
156 can_ioport2ioptr(candev->io_addr << 16);
157 candev->chip[chipnr]->clock = 16000000;
158 /* The CLKOUT has to be enabled to reset MSMCAN MAX1232 watchdog */
159 candev->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_CEN;
160 candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
161 candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
166 /* The function template_init_obj_data is used to initialize the hardware
167 * structure containing information about the different message objects on the
168 * CAN chip. In case of the sja1000 there's only one message object but on the
169 * i82527 chip there are 15.
170 * The code below is for a i82527 chip and initializes the object base addresses
171 * The entry obj_base_addr represents the first memory address of the message
172 * object. In case of the sja1000 obj_base_addr is taken the same as the chips
174 * Unless the hardware uses a segmented memory map, flags can be set zero.
176 int msmcan_init_obj_data(struct canchip_t *chip, int objnr)
179 chip->msgobj[objnr]->obj_base_addr=
180 chip->chip_base_addr+(objnr+1)*0x10;
185 /* The function template_program_irq is used for hardware that uses programmable
186 * interrupts. If your hardware doesn't use programmable interrupts you should
187 * not set the candevices_t->flags entry to CANDEV_PROGRAMMABLE_IRQ and leave this
188 * function unedited. Again this function is hardware specific so there's no
191 int msmcan_program_irq(struct candevice_t *candev)
196 /* The function template_write_register is used to write to hardware registers
197 * on the CAN chip. You should only have to edit this function if your hardware
198 * uses some specific write process.
200 void msmcan_write_register(unsigned data, can_ioptr_t address)
202 /* address is combination of base address shifted left by 16 and index */
203 can_spin_irqflags_t flags;
204 unsigned long addr=can_ioptr2ulong(address);
206 /* the msmcan card has two registers, the data register at 0x0
207 and the address register at 0x01 */
209 can_spin_lock_irqsave(&msmcan_port_lock,flags);
210 can_outb(addr & 0xff, (addr>>16)+1);
211 can_outb(data, addr>>16);
212 can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
215 /* The function template_read_register is used to read from hardware registers
216 * on the CAN chip. You should only have to edit this function if your hardware
217 * uses some specific read process.
219 unsigned msmcan_read_register(can_ioptr_t address)
221 /* this is the same thing that the function write_register.
222 We use the two register, we write the address where we
223 want to read in a first time. In a second time we read the
226 can_spin_irqflags_t flags;
227 unsigned long addr=can_ioptr2ulong(address);
229 can_spin_lock_irqsave(&msmcan_port_lock,flags);
230 can_outb(addr & 0xff, (addr>>16)+1);
231 ret=can_inb(addr>>16);
232 can_spin_unlock_irqrestore(&msmcan_port_lock,flags);
237 /* !!! Don't change this function !!! */
238 int msmcan_register(struct hwspecops_t *hwspecops)
240 hwspecops->request_io = msmcan_request_io;
241 hwspecops->release_io = msmcan_release_io;
242 hwspecops->reset = msmcan_reset;
243 hwspecops->init_hw_data = msmcan_init_hw_data;
244 hwspecops->init_chip_data = msmcan_init_chip_data;
245 hwspecops->init_obj_data = msmcan_init_obj_data;
246 hwspecops->write_register = msmcan_write_register;
247 hwspecops->read_register = msmcan_read_register;
248 hwspecops->program_irq = msmcan_program_irq;