2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.2 9 Jul 2003
11 * Support for the SECO M437
13 * SECO M437 is a pc104 format, i82527 controller based card
14 * produced by SECO http://www.seco.it
15 * This driver uses the Memory Mapped I/O mode, and should be
16 * working with all cards supporting this mode.
18 * Written by Fabio Parodi (fabio.parodi@iname.com)
19 * Additional changes by Giampiero Giancipoli (gianci@freemail.it)
21 * Version 0.1 08 Jun 2001
25 #include "../include/can.h"
26 #include "../include/can_sysdep.h"
27 #include "../include/main.h"
28 #include "../include/m437.h"
29 #include "../include/i82527.h"
32 * IO_RANGE is the io-memory range that gets reserved, please adjust according
33 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
34 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
36 #define IO_RANGE 0x100
39 static long base = 0L;
42 * m437_request_io: - reserve io or memory range for can board
43 * @candev: pointer to candevice/board which asks for io. Field @io_addr
44 * of @candev is used in most cases to define start of the range
46 * The function m437_request_io() is used to reserve the io-memory. If your
47 * hardware uses a dedicated memory range as hardware control registers you
48 * will have to add the code to reserve this memory as well.
49 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
50 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
51 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
52 * Return Value: The function returns zero on success or %-ENODEV on failure
55 int m437_request_io(struct candevice_t *candev)
58 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
59 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
63 if ( !( base = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
64 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
65 can_release_mem_region(candev->io_addr,IO_RANGE);
69 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
74 * m437_elease_io - free reserved io memory range
75 * @candev: pointer to candevice/board which releases io
77 * The function m437_release_io() is used to free reserved io-memory.
78 * In case you have reserved more io memory, don't forget to free it here.
79 * IO_RANGE is the io-memory range that gets released, please adjust according
80 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
81 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
82 * Return Value: The function always returns zero
85 int m437_release_io(struct candevice_t *candev)
89 /* disable IRQ generation */
90 m437_write_register(iCTL_CCE, iCTL);
92 /* clear all message objects */
93 for (i=1; i<=15; i++) {
109 /* power down i82527 */
110 m437_write_register(iCPU_PWD, iCPU);
112 /* release I/O memory mapping */
113 iounmap((void*)base);
115 can_release_mem_region(candev->io_addr,IO_RANGE);
121 * m437_reset - hardware reset routine
122 * @candev: Pointer to candevice/board structure
124 * The function m437_reset() is used to give a hardware reset. This is
125 * rather hardware specific so I haven't included example code. Don't forget to
126 * check the reset status of the chip before returning.
127 * Return Value: The function returns zero on success or %-ENODEV on failure
130 int m437_reset(struct candevice_t *candev)
135 #define RESET_ADDR 0x0
140 * m437_init_hw_data - Initialize hardware cards
141 * @candev: Pointer to candevice/board structure
143 * The function m437_init_hw_data() is used to initialize the hardware
144 * structure containing information about the installed CAN-board.
145 * %RESET_ADDR represents the io-address of the hardware reset register.
146 * %NR_82527 represents the number of intel 82527 chips on the board.
147 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
148 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
149 * the hardware uses programmable interrupts.
150 * Return Value: The function always returns zero
153 int m437_init_hw_data(struct candevice_t *candev)
155 DEBUGMSG("m437_init_hw_data()\n");
156 candev->res_addr=RESET_ADDR;
157 candev->nr_82527_chips=1;
158 candev->nr_sja1000_chips=0;
159 candev->nr_all_chips=1;
160 candev->flags &= ~CANDEV_PROGRAMMABLE_IRQ;
161 /* The M437 has no programmable IRQ */
166 #define CHIP_TYPE "i82527"
168 * m437_init_chip_data - Initialize chips
169 * @candev: Pointer to candevice/board structure
170 * @chipnr: Number of the CAN chip on the hardware card
172 * The function m437_init_chip_data() is used to initialize the hardware
173 * structure containing information about the CAN chips.
174 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
176 * The @chip_base_addr entry represents the start of the 'official' memory map
177 * of the installed chip. It's likely that this is the same as the @io_addr
178 * argument supplied at module loading time.
179 * The @clock entry holds the chip clock value in Hz.
180 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
181 * register. Options defined in the %sja1000.h file:
182 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
183 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
184 * register. Options defined in the %sja1000.h file:
185 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
186 * %OCR_TX0_LH, %OCR_TX1_ZZ.
187 * The entry @int_clk_reg holds hardware specific options for the Clock Out
188 * register. Options defined in the %i82527.h file:
189 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
190 * The entry @int_bus_reg holds hardware specific options for the Bus
191 * Configuration register. Options defined in the %i82527.h file:
192 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
193 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
194 * register. Options defined in the %i82527.h file:
195 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
196 * Return Value: The function always returns zero
199 int m437_init_chip_data(struct candevice_t *candev, int chipnr)
201 candev->chip[chipnr]->chip_type=CHIP_TYPE;
202 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
203 candev->chip[chipnr]->clock = 16000000;
204 candev->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_CEN;
205 candev->chip[chipnr]->int_clk_reg =
206 iCLK_CD0 | iCLK_CD1 | iCLK_CD2 | iCLK_SL0 | iCLK_SL1;
207 candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
213 * m437_init_obj_data - Initialize message buffers
214 * @chip: Pointer to chip specific structure
215 * @objnr: Number of the message buffer
217 * The function m437_init_obj_data() is used to initialize the hardware
218 * structure containing information about the different message objects on the
219 * CAN chip. In case of the sja1000 there's only one message object but on the
220 * i82527 chip there are 15.
221 * The code below is for a i82527 chip and initializes the object base addresses
222 * The entry @obj_base_addr represents the first memory address of the message
223 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
225 * Unless the hardware uses a segmented memory map, flags can be set zero.
226 * Return Value: The function always returns zero
229 int m437_init_obj_data(struct chip_t *chip, int objnr)
231 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
237 * m437_program_irq - program interrupts
238 * @candev: Pointer to candevice/board structure
240 * The function m437_program_irq() is used for hardware that uses
241 * programmable interrupts. If your hardware doesn't use programmable interrupts
242 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
243 * leave this function unedited. Again this function is hardware specific so
244 * there's no example code.
245 * Return value: The function returns zero on success or %-ENODEV on failure
248 int m437_program_irq(struct candevice_t *candev)
254 * m437_write_register - Low level write register routine
255 * @data: data to be written
256 * @address: memory address to write to
258 * The function m437_write_register() is used to write to hardware registers
259 * on the CAN chip. You should only have to edit this function if your hardware
260 * uses some specific write process.
261 * Return Value: The function does not return a value
264 void m437_write_register(unsigned data, unsigned long address)
266 writeb(data,base+address);
270 * m437_read_register - Low level read register routine
271 * @address: memory address to read from
273 * The function m437_read_register() is used to read from hardware registers
274 * on the CAN chip. You should only have to edit this function if your hardware
275 * uses some specific read process.
276 * Return Value: The function returns the value stored in @address
279 unsigned m437_read_register(unsigned long address)
281 return readb(base+address);
284 /* !!! Don't change this function !!! */
285 int m437_register(struct hwspecops_t *hwspecops)
287 DEBUGMSG("m437_register()\n");
288 hwspecops->request_io = m437_request_io;
289 hwspecops->release_io = m437_release_io;
290 hwspecops->reset = m437_reset;
291 hwspecops->init_hw_data = m437_init_hw_data;
292 hwspecops->init_chip_data = m437_init_chip_data;
293 hwspecops->init_obj_data = m437_init_obj_data;
294 hwspecops->write_register = m437_write_register;
295 hwspecops->read_register = m437_read_register;
296 hwspecops->program_irq = m437_program_irq;