2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * This software is released under the GPL-License.
5 * Version 0.7 6 Aug 2001
8 /* This file contains the low level functions for the pcccan-1 card from Gespac.
9 * You can probably find more information at http://www.gespac.com
12 #include <linux/autoconf.h>
13 #if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
17 #if defined (MODVERSIONS)
18 #include <linux/modversions.h>
21 #include <linux/ioport.h>
22 #include <linux/delay.h>
23 #include <linux/sched.h>
24 #include <asm/errno.h>
28 #include "../include/main.h"
29 #include "../include/pcccan.h"
30 #include "../include/i82527.h"
33 unsigned long pcccan_base=0x0;
36 * IO_RANGE is the io-memory range that gets reserved, please adjust according
37 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
38 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
41 /* The pcccan card uses indexed addressing hence the need to only reserve
42 * eight bytes of memory.
44 * base + 1 = Address loading
45 * base + 2 = Read register
46 * base + 3 = Read register + increment loaded address (saves a write operation
47 * when accessing consecutive registers)
49 * base + 5 = Address read
50 * base + 6 = Write register
51 * base + 7 = Write register + increment loaded address
56 * pcccan_request_io: - reserve io memory
57 * @io_addr: The reserved memory starts at @io_addr, wich is the module
60 * The function pcccan_request_io() is used to reserve the io-memory. If your
61 * hardware uses a dedicated memory range as hardware control registers you
62 * will have to add the code to reserve this memory as well.
63 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
64 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
65 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
66 * Return Value: The function returns zero on success or %-ENODEV on failure
69 int pcccan_request_io(unsigned long io_addr)
71 if (check_region(io_addr,IO_RANGE)) {
72 CANMSG("Unable to open port: 0x%lx\n",io_addr);
76 request_region(io_addr,IO_RANGE,DEVICE_NAME);
77 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + IO_RANGE - 1);
83 * pcccan_release_io - free reserved io-memory
84 * @io_addr: Start of the memory range to be released.
86 * The function pcccan_release_io() is used to free reserved io-memory.
87 * In case you have reserved more io memory, don't forget to free it here.
88 * IO_RANGE is the io-memory range that gets released, please adjust according
89 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
90 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
91 * Return Value: The function always returns zero
94 int pcccan_release_io(unsigned long io_addr)
96 release_region(io_addr,IO_RANGE);
102 * pcccan_reset - hardware reset routine
103 * @card: Number of the hardware card.
105 * The function pcccan_reset() is used to give a hardware reset. This is
106 * rather hardware specific so I haven't included example code. Don't forget to
107 * check the reset status of the chip before returning.
108 * Return Value: The function returns zero on success or %-ENODEV on failure
111 int pcccan_reset(int card)
115 DEBUGMSG("Resetting pcccan-1 hardware ...\n");
116 while (i < 1000000) {
118 outb(0x0,candevices_p[card]->res_addr);
121 /* Check hardware reset status */
123 outb(iCPU,candevices_p[card]->io_addr+0x1);
124 while ( (inb(candevices_p[card]->io_addr+0x2)&0x80) && (i<=15) ) {
129 CANMSG("Reset status timeout!\n");
130 CANMSG("Please check your hardware.\n");
134 DEBUGMSG("Chip reset status ok.\n");
143 * pcccan_init_hw_data - Initialze hardware cards
144 * @card: Number of the hardware card.
146 * The function pcccan_init_hw_data() is used to initialize the hardware
147 * structure containing information about the installed CAN-board.
148 * %RESET_ADDR represents the io-address of the hardware reset register.
149 * %NR_82527 represents the number of intel 82527 chips on the board.
150 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
151 * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that
152 * the hardware uses programmable interrupts.
153 * Return Value: The function always returns zero
156 int pcccan_init_hw_data(int card)
158 candevices_p[card]->res_addr=candevices_p[card]->io_addr;
159 candevices_p[card]->nr_82527_chips=NR_82527;
160 candevices_p[card]->nr_sja1000_chips=NR_SJA1000;
161 candevices_p[card]->flags |= ~PROGRAMMABLE_IRQ;
166 #define CHIP_TYPE "i82527"
168 * pcccan_init_chip_data - Initialize chips
169 * @card: Number of the hardware card
170 * @chipnr: Number of the CAN chip on the hardware card
172 * The function pcccan_init_chip_data() is used to initialize the hardware
173 * structure containing information about the CAN chips.
174 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
176 * The @chip_base_addr entry represents the start of the 'official' memory map
177 * of the installed chip. It's likely that this is the same as the @io_addr
178 * argument supplied at module loading time.
179 * The @clock entry holds the chip clock value in Hz.
180 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
181 * register. Options defined in the %sja1000.h file:
182 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
183 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
184 * register. Options defined in the %sja1000.h file:
185 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
186 * %OCR_TX0_LH, %OCR_TX1_ZZ.
187 * The entry @int_clk_reg holds hardware specific options for the Clock Out
188 * register. Options defined in the %i82527.h file:
189 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
190 * The entry @int_bus_reg holds hardware specific options for the Bus
191 * Configuration register. Options defined in the %i82527.h file:
192 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
193 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
194 * register. Options defined in the %i82527.h file:
195 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
196 * Return Value: The function always returns zero
199 int pcccan_init_chip_data(int card, int chipnr)
201 candevices_p[card]->chip[chipnr]->chip_type=CHIP_TYPE;
202 candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
203 candevices_p[card]->chip[chipnr]->clock = 16000000;
204 candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_DMC;
205 candevices_p[card]->chip[chipnr]->int_clk_reg = iCLK_SL1 | iCLK_CD0;
206 candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY | iBUS_DR1;
207 candevices_p[card]->chip[chipnr]->sja_cdr_reg = 0;
208 candevices_p[card]->chip[chipnr]->sja_ocr_reg = 0;
209 pcccan_irq=candevices_p[card]->chip[chipnr]->chip_irq;
210 pcccan_base=candevices_p[card]->chip[chipnr]->chip_base_addr;
216 * pcccan_init_obj_data - Initialize message buffers
217 * @chipnr: Number of the CAN chip
218 * @objnr: Number of the message buffer
220 * The function pcccan_init_obj_data() is used to initialize the hardware
221 * structure containing information about the different message objects on the
222 * CAN chip. In case of the sja1000 there's only one message object but on the
223 * i82527 chip there are 15.
224 * The code below is for a i82527 chip and initializes the object base addresses
225 * The entry @obj_base_addr represents the first memory address of the message
226 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
228 * Unless the hardware uses a segmented memory map, flags can be set zero.
229 * Return Value: The function always returns zero
232 int pcccan_init_obj_data(int chipnr, int objnr)
234 chips_p[chipnr]->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
235 chips_p[chipnr]->msgobj[objnr]->flags=0;
241 * pcccan_program_irq - program interrupts
242 * @card: Number of the hardware card.
244 * The function pcccan_program_irq() is used for hardware that uses
245 * programmable interrupts. If your hardware doesn't use programmable interrupts
246 * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and
247 * leave this function unedited. Again this function is hardware specific so
248 * there's no example code.
249 * Return value: The function returns zero on success or %-ENODEV on failure
252 int pcccan_program_irq(int card)
258 * pcccan_write_register - Low level write register routine
259 * @data: data to be written
260 * @address: memory address to write to
262 * The function pcccan_write_register() is used to write to hardware registers
263 * on the CAN chip. You should only have to edit this function if your hardware
264 * uses some specific write process.
265 * Return Value: The function does not return a value
268 void pcccan_write_register(unsigned char data, unsigned long address)
270 disable_irq(pcccan_irq);
271 outb(address - pcccan_base, pcccan_base+1);
272 outb(data, pcccan_base+6);
273 enable_irq(pcccan_irq);
277 * pcccan_read_register - Low level read register routine
278 * @address: memory address to read from
280 * The function pcccan_read_register() is used to read from hardware registers
281 * on the CAN chip. You should only have to edit this function if your hardware
282 * uses some specific read process.
283 * Return Value: The function returns the value stored in @address
286 unsigned pcccan_read_register(unsigned long address)
289 disable_irq(pcccan_irq);
290 outb(address - pcccan_base, pcccan_base+1);
291 ret=inb(pcccan_base+2);
292 enable_irq(pcccan_irq);
297 /* !!! Don't change this function !!! */
298 int pcccan_register(struct hwspecops_t *hwspecops)
300 hwspecops->request_io = pcccan_request_io;
301 hwspecops->release_io = pcccan_release_io;
302 hwspecops->reset = pcccan_reset;
303 hwspecops->init_hw_data = pcccan_init_hw_data;
304 hwspecops->init_chip_data = pcccan_init_chip_data;
305 hwspecops->init_obj_data = pcccan_init_obj_data;
306 hwspecops->write_register = pcccan_write_register;
307 hwspecops->read_register = pcccan_read_register;
308 hwspecops->program_irq = pcccan_program_irq;