2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * This software is released under the GPL-License.
5 * Version 0.7 6 Aug 2001
9 * Support for the SECO M437
11 * SECO M437 is a pc104 format, i82527 controller based card
12 * produced by SECO http://www.seco.it
13 * This driver uses the Memory Mapped I/O mode, and should be
14 * working with all cards supporting this mode.
16 * Written by Fabio Parodi (fabio.parodi@iname.com)
17 * Additional changes by Giampiero Giancipoli (gianci@freemail.it)
19 * Version 0.1 08 Jun 2001
23 #include <linux/autoconf.h>
24 #if defined (CONFIG_MODVERSIONS) && !defined (MODVERSIONS)
29 #include <linux/modversions.h>
32 #include <linux/ioport.h>
33 #include <linux/delay.h>
34 #include <asm/errno.h>
37 #include "../include/main.h"
38 #include "../include/m437.h"
39 #include "../include/i82527.h"
42 * IO_RANGE is the io-memory range that gets reserved, please adjust according
43 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
44 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
46 #define IO_RANGE 0x100
49 static long base = 0L;
52 * m437_request_io: - reserve io memory
53 * @io_addr: The reserved memory starts at @io_addr, wich is the module
56 * The function m437_request_io() is used to reserve the io-memory. If your
57 * hardware uses a dedicated memory range as hardware control registers you
58 * will have to add the code to reserve this memory as well.
59 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
60 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
61 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
62 * Return Value: The function returns zero on success or %-ENODEV on failure
65 int m437_request_io(unsigned long io_addr)
68 if ( !( base = (long) ioremap( io_addr, IO_RANGE ) ) ) {
69 CANMSG("Unable to access I/O memory at: 0x%lx\n", io_addr);
73 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", io_addr, io_addr + IO_RANGE - 1);
78 * m437_release_io - free reserved io-memory
79 * @io_addr: Start of the memory range to be released.
81 * The function m437_release_io() is used to free reserved io-memory.
82 * In case you have reserved more io memory, don't forget to free it here.
83 * IO_RANGE is the io-memory range that gets released, please adjust according
84 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
85 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
86 * Return Value: The function always returns zero
89 int m437_release_io(unsigned long io_addr)
93 /* disable IRQ generation */
94 m437_write_register(iCTL_CCE, iCTL);
96 /* clear all message objects */
97 for (i=1; i<=15; i++) {
113 /* power down i82527 */
114 m437_write_register(iCPU_PWD, iCPU);
116 /* release I/O memory mapping */
117 iounmap((void*)base);
123 * m437_reset - hardware reset routine
124 * @card: Number of the hardware card.
126 * The function m437_reset() is used to give a hardware reset. This is
127 * rather hardware specific so I haven't included example code. Don't forget to
128 * check the reset status of the chip before returning.
129 * Return Value: The function returns zero on success or %-ENODEV on failure
132 int m437_reset(int card)
137 #define RESET_ADDR 0x0
142 * m437_init_hw_data - Initialze hardware cards
143 * @card: Number of the hardware card.
145 * The function m437_init_hw_data() is used to initialize the hardware
146 * structure containing information about the installed CAN-board.
147 * %RESET_ADDR represents the io-address of the hardware reset register.
148 * %NR_82527 represents the number of intel 82527 chips on the board.
149 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
150 * The flags entry can currently only be %PROGRAMMABLE_IRQ to indicate that
151 * the hardware uses programmable interrupts.
152 * Return Value: The function always returns zero
155 int m437_init_hw_data(int card)
157 DEBUGMSG("m437_init_hw_data()\n");
158 candevices_p[card]->res_addr=RESET_ADDR;
159 candevices_p[card]->nr_82527_chips=1;
160 candevices_p[card]->nr_sja1000_chips=0;
161 candevices_p[card]->flags &= ~PROGRAMMABLE_IRQ;
162 /* The M437 has no programmable IRQ */
167 #define CHIP_TYPE "i82527"
169 * m437_init_chip_data - Initialize chips
170 * @card: Number of the hardware card
171 * @chipnr: Number of the CAN chip on the hardware card
173 * The function m437_init_chip_data() is used to initialize the hardware
174 * structure containing information about the CAN chips.
175 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
177 * The @chip_base_addr entry represents the start of the 'official' memory map
178 * of the installed chip. It's likely that this is the same as the @io_addr
179 * argument supplied at module loading time.
180 * The @clock entry holds the chip clock value in Hz.
181 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
182 * register. Options defined in the %sja1000.h file:
183 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
184 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
185 * register. Options defined in the %sja1000.h file:
186 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
187 * %OCR_TX0_LH, %OCR_TX1_ZZ.
188 * The entry @int_clk_reg holds hardware specific options for the Clock Out
189 * register. Options defined in the %i82527.h file:
190 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
191 * The entry @int_bus_reg holds hardware specific options for the Bus
192 * Configuration register. Options defined in the %i82527.h file:
193 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
194 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
195 * register. Options defined in the %i82527.h file:
196 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
197 * Return Value: The function always returns zero
200 int m437_init_chip_data(int card, int chipnr)
202 candevices_p[card]->chip[chipnr]->chip_type=CHIP_TYPE;
203 candevices_p[card]->chip[chipnr]->chip_base_addr=candevices_p[card]->io_addr;
204 candevices_p[card]->chip[chipnr]->clock = 16000000;
205 candevices_p[card]->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_CEN;
206 candevices_p[card]->chip[chipnr]->int_clk_reg =
207 iCLK_CD0 | iCLK_CD1 | iCLK_CD2 | iCLK_SL0 | iCLK_SL1;
208 candevices_p[card]->chip[chipnr]->int_bus_reg = iBUS_CBY;
214 * m437_init_obj_data - Initialize message buffers
215 * @chipnr: Number of the CAN chip
216 * @objnr: Number of the message buffer
218 * The function m437_init_obj_data() is used to initialize the hardware
219 * structure containing information about the different message objects on the
220 * CAN chip. In case of the sja1000 there's only one message object but on the
221 * i82527 chip there are 15.
222 * The code below is for a i82527 chip and initializes the object base addresses
223 * The entry @obj_base_addr represents the first memory address of the message
224 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
226 * Unless the hardware uses a segmented memory map, flags can be set zero.
227 * Return Value: The function always returns zero
230 int m437_init_obj_data(int chipnr, int objnr)
232 chips_p[chipnr]->msgobj[objnr]->obj_base_addr=chips_p[chipnr]->chip_base_addr+(objnr+1)*0x10;
233 chips_p[chipnr]->msgobj[objnr]->flags=0;
239 * m437_program_irq - program interrupts
240 * @card: Number of the hardware card.
242 * The function m437_program_irq() is used for hardware that uses
243 * programmable interrupts. If your hardware doesn't use programmable interrupts
244 * you should not set the @candevices_t->flags entry to %PROGRAMMABLE_IRQ and
245 * leave this function unedited. Again this function is hardware specific so
246 * there's no example code.
247 * Return value: The function returns zero on success or %-ENODEV on failure
250 int m437_program_irq(int card)
256 * m437_write_register - Low level write register routine
257 * @data: data to be written
258 * @address: memory address to write to
260 * The function m437_write_register() is used to write to hardware registers
261 * on the CAN chip. You should only have to edit this function if your hardware
262 * uses some specific write process.
263 * Return Value: The function does not return a value
266 void m437_write_register(unsigned char data, unsigned long address)
268 writeb(data,base+address);
272 * m437_read_register - Low level read register routine
273 * @address: memory address to read from
275 * The function m437_read_register() is used to read from hardware registers
276 * on the CAN chip. You should only have to edit this function if your hardware
277 * uses some specific read process.
278 * Return Value: The function returns the value stored in @address
281 unsigned m437_read_register(unsigned long address)
283 return readb(base+address);
286 /* !!! Don't change this function !!! */
287 int m437_register(struct hwspecops_t *hwspecops)
289 DEBUGMSG("m437_register()\n");
290 hwspecops->request_io = m437_request_io;
291 hwspecops->release_io = m437_release_io;
292 hwspecops->reset = m437_reset;
293 hwspecops->init_hw_data = m437_init_hw_data;
294 hwspecops->init_chip_data = m437_init_chip_data;
295 hwspecops->init_obj_data = m437_init_obj_data;
296 hwspecops->write_register = m437_write_register;
297 hwspecops->read_register = m437_read_register;
298 hwspecops->program_irq = m437_program_irq;