2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * This software is released under the GPL-License.
5 * Version 0.7 6 Aug 2001
9 #include <linux/version.h>
10 #include <linux/wait.h>
13 #include "./constants.h"
16 #define DEBUGMSG(fmt,args...) printk(KERN_ERR "can.o (debug): " fmt,\
19 #define DEBUGMSG(fmt,args...)
22 #define CANMSG(fmt,args...) printk(KERN_ERR "can.o: " fmt,##args)
24 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,7))
27 (MINOR(file->f_dentry->d_inode->i_rdev))
29 #else /* Linux kernel > 2.5.7 */
32 (minor(file->f_dentry->d_inode->i_rdev))
33 #endif /* Linux kernel > 2.5.7 */
35 #define MSG_OFFSET(object) ((object)*0x10)
37 struct canhardware_t {
39 struct rtr_id *rtr_queue;
41 struct candevice_t *candevice[MAX_HW_CARDS];
46 unsigned long io_addr;
47 unsigned long res_addr;
50 /* Hardware chip configuration. In case of multiple chips *chip
51 * is the first in an array of chip_t structures.
55 struct chip_t *chip[MAX_HW_CHIPS];
57 struct hwspecops_t *hwspecops;
59 struct canhardware_t *hosthardware_p;
65 unsigned long chip_base_addr;
67 int clock; // Chip clock in Hz
69 /* sja_cdr_reg holds hardware specific options for the Clock Divider
70 * register. Options defined in the sja1000.h file:
71 * CDR_CLKOUT_MASK, CDR_CLK_OFF, CDR_RXINPEN, CDR_CBP, CDR_PELICAN
73 * sja_ocr_reg holds hardware specific options for the Output Control
74 * register. Options defined in the sja1000.h file:
75 * OCR_MODE_BIPHASE, OCR_MODE_TEST, OCR_MODE_NORMAL, OCR_MODE_CLOCK,
76 * OCR_TX0_LH, OCR_TX1_ZZ.
78 * int_clk_reg holds hardware specific options for the Clock Out
79 * register. Options defined in the i82527.h file:
80 * iCLK_CD0, iCLK_CD1, iCLK_CD2, iCLK_CD3, iCLK_SL0, iCLK_SL1.
82 * int_bus_reg holds hardware specific options for the Bus Configuration
83 * register. Options defined in the i82527.h file:
84 * iBUS_DR0, iBUS_DR1, iBUS_DT1, iBUS_POL, iBUS_CBY.
86 * int_cpu_reg holds hardware specific options for the CPU Interface
87 * register. Options defined in the i82527.h file:
88 * iCPU_CEN, iCPU_MUX, iCPU_SLP, iCPU_PWD, iCPU_DMC, iCPU_DSC, iCPU_RST.
90 unsigned short sja_cdr_reg; // sja1000 only!
91 unsigned short sja_ocr_reg; // sja1000 only!
92 unsigned short int_cpu_reg; // intel 82527 only!
93 unsigned short int_clk_reg; // intel 82527 only!
94 unsigned short int_bus_reg; // intel 82527 only!
96 struct msgobj_t *msgobj[MAX_MSGOBJS];
98 struct chipspecops_t *chipspecops;
100 struct candevice_t *hostdevice;
104 unsigned long obj_base_addr;
110 struct canfifo_t *fifo;
112 struct chip_t *hostchip;
116 int (*request_io)(unsigned long io_addr);
117 int (*release_io)(unsigned long io_addr);
118 int (*reset)(int card);
119 int (*init_hw_data)(int card);
120 int (*init_chip_data)(int card, int chipnr);
121 int (*init_obj_data)(int chipnr, int objnr);
122 void (*write_register)(unsigned char data,unsigned long address);
123 unsigned (*read_register)(unsigned long address);
124 int (*program_irq)(int card);
127 struct chipspecops_t {
128 int (*chip_config)(struct chip_t *chip);
129 int (*baud_rate)(struct chip_t *chip, int rate, int clock, int sjw,
130 int sampl_pt, int flags);
131 int (*standard_mask)(struct chip_t *chip, unsigned short code,
132 unsigned short mask);
133 int (*extended_mask)(struct chip_t *chip, unsigned long code,
135 int (*message15_mask)(struct chip_t *chip, unsigned long code,
137 int (*clear_objects)(struct chip_t *chip);
138 int (*config_irqs)(struct chip_t *chip, short irqs);
139 int (*pre_read_config)(struct chip_t *chip, struct msgobj_t *obj);
140 int (*pre_write_config)(struct chip_t *chip, struct msgobj_t *obj,
141 struct canmsg_t *msg);
142 int (*send_msg)(struct chip_t *chip, struct msgobj_t *obj,
143 struct canmsg_t *msg);
144 int (*remote_request)(struct chip_t *chip, struct msgobj_t *obj);
145 int (*check_tx_stat)(struct chip_t *chip);
146 int (*enable_configuration)(struct chip_t *chip);
147 int (*disable_configuration)(struct chip_t *chip);
148 int (*set_btregs)(struct chip_t *chip, unsigned short btr0,
149 unsigned short btr1);
150 int (*start_chip)(struct chip_t *chip);
151 int (*stop_chip)(struct chip_t *chip);
152 void (*irq_handler)(int irq, void *dev_id, struct pt_regs *regs);
157 struct mem_addr *next;
160 /* Structure for the drivers main input and output buffers. The readq, writeq
161 * entries are the wait queues for the driver to sleep on in case of blocking
162 * read/write calls. buf_rx_entry and buf_tx_entry are pointers to the input and
163 * output buffers. The buffers are dynamically allocated. The tx_readp,
164 * tx_writep, rx_readp and rx_writep pointers are the various read/write
165 * pointers used when reading or writing the input and output buffers. The
166 * rx/tx_size entries are the dynamically allocated input and output buffer size
167 * The rx/tx_in_progress entries are used to determine whether the device is
168 * already set up for transmission.
170 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,3,0))
172 struct wait_queue *readq, *writeq;
173 struct canmsg_t *buf_tx_entry;
174 struct canmsg_t *buf_rx_entry;
175 struct canmsg_t *tx_readp;
176 struct canmsg_t *rx_writep;
177 struct canmsg_t *tx_writep;
178 struct canmsg_t *rx_readp;
179 int rx_size, tx_size;
180 volatile int rx_in_progress, tx_in_progress;
181 /*int head, tail;*/ /* removed */
185 struct __wait_queue_head readq;
186 struct __wait_queue_head writeq;
187 struct canmsg_t *buf_tx_entry;
188 struct canmsg_t *buf_rx_entry;
189 struct canmsg_t *tx_readp;
190 struct canmsg_t *rx_writep;
191 struct canmsg_t *tx_writep;
192 struct canmsg_t *rx_readp;
193 int rx_size, tx_size;
194 volatile int rx_in_progress, tx_in_progress;
195 /*int head, tail;*/ /* removed */
199 /* Structure for the RTR queue */
202 struct canmsg_t *rtr_message;
203 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,3,0))
204 struct wait_queue *rtr_wq;
206 struct __wait_queue_head rtr_wq;
212 extern int minor[MAX_TOT_CHIPS];
215 extern char *hw[MAX_HW_CARDS];
216 extern int irq[MAX_IRQ];
217 extern unsigned long io[MAX_HW_CARDS];
219 extern struct canhardware_t *hardware_p;
220 extern struct candevice_t *candevices_p[MAX_HW_CARDS];
221 extern struct chip_t *chips_p[MAX_TOT_CHIPS];
222 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
224 extern struct mem_addr *mem_head;
226 /* Inline function to write to the hardware registers. The argument address is
227 * relative to the memory map of the chip and not the absolute memory address.
229 extern inline void can_write_reg(const struct chip_t *chip, unsigned char data, unsigned short address)
231 unsigned short segment_number;
232 unsigned long address_to_write;
234 address_to_write = chip->chip_base_addr+address;
236 if ( (chip->flags & SEGMENTED) != 0) {
237 segment_number = (unsigned short)(address >> 6);
238 address_to_write += SPACING * segment_number;
241 chip->hostdevice->hwspecops->write_register(data, address_to_write);
244 extern inline unsigned can_read_reg(const struct chip_t *chip, unsigned short address)
246 unsigned short segment_number;
247 unsigned long address_to_read;
249 address_to_read = chip->chip_base_addr+address;
251 if ( (chip->flags & SEGMENTED) != 0) {
252 segment_number = (unsigned short)(address >> 6);
253 address_to_read += SPACING * segment_number;
255 return chip->hostdevice->hwspecops->read_register(address_to_read);