2 * Header file for the Linux CAN-bus driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.3 17 Jun 2004
11 #include "./constants.h"
12 #include "./can_sysdep.h"
13 #include "./can_queue.h"
16 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "can.o (debug): " fmt,\
19 #define DEBUGMSG(fmt,args...)
22 #define CANMSG(fmt,args...) can_printk(KERN_ERR "can.o: " fmt,##args)
25 extern can_spinlock_t canuser_manipulation_lock;
28 * struct canhardware_t - structure representing pointers to all CAN boards
29 * @nr_boards: number of present boards
30 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
31 * @rtr_lock: locking for RTR queue
32 * @candevice: array of pointers to CAN devices/boards
34 struct canhardware_t {
36 struct rtr_id *rtr_queue;
37 can_spinlock_t rtr_lock;
38 struct candevice_t *candevice[MAX_HW_CARDS];
42 * struct candevice_t - CAN device/board structure
43 * @hwname: text string with board type
44 * @candev_idx: board index in canhardware_t.candevice[]
45 * @io_addr: IO/physical MEM address
46 * @res_addr: optional reset register port
47 * @dev_base_addr: CPU translated IO/virtual MEM address
48 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
49 * can be programmed into board
50 * @nr_all_chips: number of chips present on the board
51 * @nr_82527_chips: number of Intel 8257 chips
52 * @nr_sja1000_chips: number of Philips SJA100 chips
53 * @chip: array of pointers to the chip structures
54 * @hwspecops: pointer to board specific operations
55 * @hosthardware_p: pointer to the root hardware structure
56 * @sysdevptr: union reserved for pointer to bus specific
57 * device structure (case @pcidev is used for PCI devices)
59 * The structure represent configuration and state of associated board.
60 * The driver infrastructure prepares this structure and calls
61 * board type specific board_register() function. The board support provided
62 * register function fills right function pointers in @hwspecops structure.
63 * Then driver setup calls functions init_hw_data(), init_chip_data(),
64 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
65 * and init_chip_data() have to specify number and types of connected chips
66 * or objects respectively.
67 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
68 * and @nr_sja1000_chips in the board non-specific functions.
69 * The @io_addr and @dev_base_addr is filled from module parameters
70 * to the same value. The request_io function can fix-up @dev_base_addr
71 * field if virtual address is different than bus address.
74 char *hwname; /* text board type */
75 int candev_idx; /* board index in canhardware_t.candevice[] */
76 unsigned long io_addr; /* IO/physical MEM address */
77 unsigned long res_addr; /* optional reset register port */
78 unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */
83 can_spinlock_t device_lock;
84 struct canchip_t *chip[MAX_HW_CHIPS];
86 struct hwspecops_t *hwspecops;
88 struct canhardware_t *hosthardware_p;
92 #ifdef CAN_ENABLE_PCI_SUPPORT
93 struct pci_dev *pcidev;
94 #endif /*CAN_ENABLE_PCI_SUPPORT*/
100 * struct canchip_t - CAN chip state and type information
101 * @chip_type: text string describing chip type
102 * @chip_idx: index of the chip in candevice_t.chip[] array
103 * @chip_irq: chip interrupt number if any
104 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
105 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
106 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
107 * @clock: chip base clock frequency in Hz
108 * @baudrate: selected chip baudrate in Hz
109 * @write_register: write chip register function copy
110 * @read_register: read chip register function copy
111 * @chip_data: pointer for optional chip specific data extension
112 * @sja_cdr_reg: SJA specific register -
113 * holds hardware specific options for the Clock Divider
114 * register. Options defined in the sja1000.h file:
115 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
116 * @sja_ocr_reg: SJA specific register -
117 * hold hardware specific options for the Output Control
118 * register. Options defined in the sja1000.h file:
119 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
120 * %OCR_TX0_LH, %OCR_TX1_ZZ.
121 * @int_cpu_reg: Intel specific register -
122 * holds hardware specific options for the CPU Interface
123 * register. Options defined in the i82527.h file:
124 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
125 * @int_clk_reg: Intel specific register -
126 * holds hardware specific options for the Clock Out
127 * register. Options defined in the i82527.h file:
128 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
129 * @int_bus_reg: Intel specific register -
130 * holds hardware specific options for the Bus Configuration
131 * register. Options defined in the i82527.h file:
132 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
133 * @msgobj: array of pointers to individual communication objects
134 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
135 * @hostdevice: pointer to chip hosting board
136 * @max_objects: maximal number of communication objects connected to this chip
137 * @chip_lock: reserved for synchronization of the chip supporting routines
138 * (not used in the current driver version)
139 * @worker_thread: chip worker thread ID (RT-Linux specific field)
140 * @pend_flags: holds information about pending interrupt and tx_wake() operations
141 * (RT-Linux specific field). Masks values:
142 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
143 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
144 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
145 * for some of above reasons
147 * The fields @write_register and @read_register are copied from
148 * corresponding fields from @hwspecops structure
149 * (chip->hostdevice->hwspecops->write_register and
150 * chip->hostdevice->hwspecops->read_register)
151 * to speedup can_write_reg() and can_read_reg() functions.
155 int chip_idx; /* chip index in candevice_t.chip[] */
157 unsigned long chip_base_addr;
159 long clock; /* Chip clock in Hz */
162 void (*write_register)(unsigned data,unsigned long address);
163 unsigned (*read_register)(unsigned long address);
167 unsigned short sja_cdr_reg; /* sja1000 only! */
168 unsigned short sja_ocr_reg; /* sja1000 only! */
169 unsigned short int_cpu_reg; /* intel 82527 only! */
170 unsigned short int_clk_reg; /* intel 82527 only! */
171 unsigned short int_bus_reg; /* intel 82527 only! */
173 struct msgobj_t *msgobj[MAX_MSGOBJS];
175 struct chipspecops_t *chipspecops;
177 struct candevice_t *hostdevice;
179 int max_objects; /* 1 for sja1000, 15 for i82527 */
181 can_spinlock_t chip_lock;
184 pthread_t worker_thread;
185 unsigned long pend_flags;
186 #endif /*CAN_WITH_RTL*/
190 * struct msgobj_t - structure holding communication object state
192 * @minor: associated device minor number
193 * @object: object number in canchip_t structure +1
194 * @flags: message object flags
195 * @ret: field holding status of the last Tx operation
196 * @qends: pointer to message object corresponding ends structure
197 * @tx_qedge: edge corresponding to transmitted message
198 * @tx_slot: slot holding transmitted message, slot is taken from
199 * canque_test_outslot() call and is freed by canque_free_outslot()
200 * or rescheduled canque_again_outslot()
201 * @tx_retry_cnt: transmission attempt counter
202 * @tx_timeout: can be used by chip driver to check for the transmission timeout
203 * @rx_msg: temporary storage to hold received messages before
204 * calling to canque_filter_msg2edges()
205 * @hostchip: pointer to the &canchip_t structure this object belongs to
206 * @obj_used: counter of users (associated file structures for Linux
207 * userspace clients) of this object
208 * @obj_users: list of user structures of type &canuser_t.
209 * @obj_flags: message object specific flags. Masks values:
210 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
211 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
212 * is running inside TX activation processing code
213 * @rx_preconfig_id: place to store RX message identifier for some chip types
214 * that reuse same object for TX
217 unsigned long obj_base_addr;
218 unsigned int minor; /* associated device minor number */
219 unsigned int object; /* object number in canchip_t +1 for debug printk */
220 unsigned long obj_flags;
223 struct canque_ends_t *qends;
225 struct canque_edge_t *tx_qedge;
226 struct canque_slot_t *tx_slot;
228 struct timer_list tx_timeout;
230 struct canmsg_t rx_msg;
232 struct canchip_t *hostchip;
234 unsigned long rx_preconfig_id;
237 struct list_head obj_users;
240 #define CAN_USER_MAGIC 0x05402033
243 * struct canuser_t - structure holding CAN user/client state
244 * @flags: used to distinguish Linux/RT-Linux type
245 * @peers: for connection into list of object users
246 * @qends: pointer to the ends structure corresponding for this user
247 * @msgobj: communication object the user is connected to
248 * @rx_edge0: default receive queue for filter IOCTL
249 * @userinfo: stores user context specific information.
250 * The field @fileinfo.file holds pointer to open device file state structure
251 * for the Linux user-space client applications
252 * @magic: magic number to check consistency when pointer is retrieved
253 * from file private field
257 struct list_head peers;
258 struct canque_ends_t *qends;
259 struct msgobj_t *msgobj;
260 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
263 struct file *file; /* back ptr to file */
267 struct rtl_file *file;
269 #endif /*CAN_WITH_RTL*/
275 * struct hwspecops_t - hardware/board specific operations
276 * @request_io: reserve io or memory range for can board
277 * @release_io: free reserved io memory range
278 * @reset: hardware reset routine
279 * @init_hw_data: called to initialize &candevice_t structure, mainly
280 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
282 * @init_chip_data: called initialize each &canchip_t structure, mainly
283 * @chip_type, @chip_base_addr, @clock and chip specific registers.
284 * It is responsible to setup &canchip_t->@chipspecops functions
285 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
286 * @init_obj_data: called initialize each &msgobj_t structure,
287 * mainly @obj_base_addr field.
288 * @program_irq: program interrupt generation hardware of the board
289 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
290 * @write_register: low level write register routine
291 * @read_register: low level read register routine
294 int (*request_io)(struct candevice_t *candev);
295 int (*release_io)(struct candevice_t *candev);
296 int (*reset)(struct candevice_t *candev);
297 int (*init_hw_data)(struct candevice_t *candev);
298 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
299 int (*init_obj_data)(struct canchip_t *chip, int objnr);
300 int (*program_irq)(struct candevice_t *candev);
301 void (*write_register)(unsigned data,unsigned long address);
302 unsigned (*read_register)(unsigned long address);
306 * struct chipspecops_t - can controller chip specific operations
307 * @chip_config: CAN chip configuration
308 * @baud_rate: set communication parameters
309 * @standard_mask: setup of mask for message filtering
310 * @extended_mask: setup of extended mask for message filtering
311 * @message15_mask: set mask of i82527 message object 15
312 * @clear_objects: clears state of all message object residing in chip
313 * @config_irqs: tunes chip hardware interrupt delivery
314 * @pre_read_config: prepares message object for message reception
315 * @pre_write_config: prepares message object for message transmission
316 * @send_msg: initiate message transmission
317 * @remote_request: configures message object and asks for RTR message
318 * @check_tx_stat: checks state of transmission engine
319 * @wakeup_tx: wakeup TX processing
320 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
321 * @enable_configuration: enable chip configuration mode
322 * @disable_configuration: disable chip configuration mode
323 * @set_btregs: configures bitrate registers
324 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
325 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
326 * @start_chip: starts chip message processing
327 * @stop_chip: stops chip message processing
328 * @irq_handler: interrupt service routine
329 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
331 struct chipspecops_t {
332 int (*chip_config)(struct canchip_t *chip);
333 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
334 int sampl_pt, int flags);
335 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
336 unsigned short mask);
337 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
339 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
341 int (*clear_objects)(struct canchip_t *chip);
342 int (*config_irqs)(struct canchip_t *chip, short irqs);
343 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
344 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
345 struct canmsg_t *msg);
346 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
347 struct canmsg_t *msg);
348 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
349 int (*check_tx_stat)(struct canchip_t *chip);
350 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
351 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
352 int (*enable_configuration)(struct canchip_t *chip);
353 int (*disable_configuration)(struct canchip_t *chip);
354 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
355 unsigned short btr1);
356 int (*attach_to_chip)(struct canchip_t *chip);
357 int (*release_chip)(struct canchip_t *chip);
358 int (*start_chip)(struct canchip_t *chip);
359 int (*stop_chip)(struct canchip_t *chip);
360 int (*irq_handler)(int irq, struct canchip_t *chip);
361 int (*irq_accept)(int irq, struct canchip_t *chip);
366 struct mem_addr *next;
370 /* Structure for the RTR queue */
373 struct canmsg_t *rtr_message;
374 wait_queue_head_t rtr_wq;
379 extern int minor[MAX_TOT_CHIPS];
381 extern int baudrate[MAX_TOT_CHIPS];
382 extern char *hw[MAX_HW_CARDS];
383 extern int irq[MAX_IRQ];
384 extern unsigned long io[MAX_HW_CARDS];
385 extern int processlocal;
387 extern struct canhardware_t *hardware_p;
388 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
389 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
391 extern struct mem_addr *mem_head;
394 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
395 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
397 outb(data, chip->chip_base_addr+address);
399 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
401 return inb(chip->chip_base_addr+address);
403 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
404 unsigned char data, unsigned address)
406 outb(data, obj->obj_base_addr+address);
408 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
411 return inb(obj->obj_base_addr+address);
414 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
415 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
417 writeb(data, chip->chip_base_addr+address);
419 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
421 return readb(chip->chip_base_addr+address);
423 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
424 unsigned char data, unsigned address)
426 writeb(data, obj->obj_base_addr+address);
428 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
431 return readb(obj->obj_base_addr+address);
434 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
435 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
436 #define CONFIG_OC_LINCAN_DYNAMICIO
439 /* Inline function to write to the hardware registers. The argument address is
440 * relative to the memory map of the chip and not the absolute memory address.
442 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
444 unsigned long address_to_write;
445 address_to_write = chip->chip_base_addr+address;
446 chip->write_register(data, address_to_write);
449 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
451 unsigned long address_to_read;
452 address_to_read = chip->chip_base_addr+address;
453 return chip->read_register(address_to_read);
456 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
457 unsigned char data, unsigned address)
459 unsigned long address_to_write;
460 address_to_write = obj->obj_base_addr+address;
461 chip->write_register(data, address_to_write);
464 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
467 unsigned long address_to_read;
468 address_to_read = obj->obj_base_addr+address;
469 return chip->read_register(address_to_read);
472 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
474 int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base);
475 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
476 void can_release_io_region(unsigned long start, unsigned long n);
477 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
478 void can_release_mem_region(unsigned long start, unsigned long n);
481 const char *boardtype;
482 int (*board_register)(struct hwspecops_t *hwspecops);
486 const struct boardtype_t* boardtype_find(const char *str);
488 int can_check_dev_taken(void *anydev);
490 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
492 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
494 can_gettimeofday(ptimestamp);
496 #else /* No timestamp support, set field to zero */
498 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
500 #ifdef CAN_MSG_VERSION_2
501 ptimestamp->tv_sec = 0;
502 ptimestamp->tv_usec = 0;
503 #else /* CAN_MSG_VERSION_2 */
505 #endif /* CAN_MSG_VERSION_2 */
508 #endif /* End of timestamp source selection */
511 extern int can_rtl_priority;
512 #endif /*CAN_WITH_RTL*/