2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.2 9 Jul 2003
10 #include "../include/can.h"
11 #include "../include/can_sysdep.h"
12 #include "../include/main.h"
13 #include "../include/pip.h"
14 #include "../include/i82527.h"
16 int pip5_request_io(struct candevice_t *candev)
18 if (candev->io_addr != 0x8000) {
19 CANMSG("Invalid base io address\n");
20 CANMSG("The PIP5 uses a fixed base address of 0x8000,\n");
21 CANMSG("please consult your user manual.\n");
24 if (!can_request_io_region(candev->io_addr,0x100,DEVICE_NAME)) {
25 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
28 else if(!can_request_io_region(candev->io_addr+0x102,0x01,DEVICE_NAME)) {
29 can_release_io_region(candev->io_addr,0x100);
30 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr+0x102);
34 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + 0x100 - 1);
35 DEBUGMSG("Registered IO-memory: 0x%lx\n", candev->io_addr+0x102);
40 int pip6_request_io(struct candevice_t *candev)
42 if ( (candev->io_addr != 0x1000)&&(candev->io_addr != 0x8000)&&(candev->io_addr != 0xe000)) {
43 CANMSG("Invalid base io address\n");
44 CANMSG("Valid values for the PIP6 are: 0x1000, 0x8000 or 0xe000\n");
45 CANMSG("Please consult your user manual.\n");
48 if (!can_request_io_region(candev->io_addr,0x100, DEVICE_NAME)) {
49 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
52 else if (!can_request_io_region(0x804,0x02,DEVICE_NAME)) {
53 can_release_io_region(candev->io_addr,0x100);
54 CANMSG("Unable to open port: 0x%x\n", 0x804);
58 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + 0x100 -1);
59 DEBUGMSG("Registered IO-memory : 0x%x - 0x%x\n",0x804,0x805);
64 int pip5_release_io(struct candevice_t *candev)
66 can_release_io_region(candev->io_addr,0x100);
67 can_release_io_region(candev->io_addr+0x102,0x01);
72 int pip6_release_io(struct candevice_t *candev)
74 can_release_io_region(candev->io_addr,0x100);
75 can_release_io_region(0x804,0x02);
80 int pip_reset(struct candevice_t *candev)
84 DEBUGMSG("Resetting %s hardware ...\n", candev->hwname);
85 if (!strcmp(candev->hwname,"pip5"))
91 outb(res_value,candev->res_addr);
93 outb(0x0,candev->res_addr);
95 /* Check hardware reset status */
97 while ( (inb(candev->io_addr+iCPU) & iCPU_RST) && (i<=15)) {
102 CANMSG("Reset status timeout!\n");
103 CANMSG("Please check your hardware.\n");
107 DEBUGMSG("Chip0 reset status ok.\n");
113 int pip_init_hw_data(struct candevice_t *candev)
115 if (!strcmp(candev->hwname,"pip5"))
116 candev->res_addr=candev->io_addr+0x102;
118 candev->res_addr=0x805;
119 candev->nr_82527_chips=1;
120 candev->nr_sja1000_chips=0;
121 candev->nr_all_chips=1;
122 candev->flags |= CANDEV_PROGRAMMABLE_IRQ;
127 int pip_init_chip_data(struct candevice_t *candev, int chipnr)
129 candev->chip[chipnr]->chip_type="i82527";
130 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
131 candev->chip[chipnr]->clock = 16000000;
132 if (!strcmp(candev->hwname,"pip5"))
133 candev->chip[chipnr]->int_cpu_reg = iCPU_DSC;
135 candev->chip[chipnr]->int_cpu_reg = 0x0;
136 candev->chip[chipnr]->int_clk_reg = iCLK_SL1;
137 candev->chip[chipnr]->int_bus_reg = iBUS_CBY;
138 candev->chip[chipnr]->sja_cdr_reg = 0;
139 candev->chip[chipnr]->sja_ocr_reg = 0;
144 int pip_init_obj_data(struct chip_t *chip, int objnr)
146 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr+(objnr+1)*0x10;
151 int pip5_program_irq(struct candevice_t *candev)
153 outb(0x01, candev->res_addr);
154 switch (candev->chip[0]->chip_irq) {
155 case 3: { outb(0x03, candev->res_addr); break; }
156 case 4: { outb(0x05, candev->res_addr); break; }
157 case 5: { outb(0x07, candev->res_addr); break; }
158 case 10: { outb(0x09, candev->res_addr); break; }
159 case 11: { outb(0x0c, candev->res_addr); break; }
160 case 15: { outb(0x0d, candev->res_addr); break; }
162 CANMSG("Supplied interrupt is not supported by the hardware\n");
163 CANMSG("Please consult your user manual.\n");
167 outb(0x00, candev->res_addr);
172 int pip6_program_irq(struct candevice_t *candev)
174 unsigned char can_int = 0, can_addr = 0;
176 can_int = candev->chip[0]->chip_irq;
177 if ((can_int != 3) && (can_int != 4) && (can_int != 5) && (can_int != 6)
178 && (can_int != 7) && (can_int != 9) && (can_int != 10) &&
179 (can_int != 11) && (can_int != 12) && (can_int != 14) &&
181 CANMSG("Invalid interrupt number\n");
182 CANMSG("Valid interrupt numbers for the PIP6: 3,4,5,6,7,9,10,11,12,14 or 15\n");
183 CANMSG("Please consult your user manual.\n");
186 switch (candev->io_addr) {
187 case 0x1000: { can_addr = 0x01; break; }
188 case 0x8000: { can_addr = 0x02; break; }
189 case 0xe000: { can_addr = 0x03; break; }
191 CANMSG("Supplied io address is not valid, please check your manual\n");
195 outb( (can_int<<4)|can_addr, 0x804);
200 void pip_write_register(unsigned data, unsigned long address)
205 unsigned pip_read_register(unsigned long address)
210 /* !!! Don't change these functions !!! */
211 int pip5_register(struct hwspecops_t *hwspecops)
213 hwspecops->request_io = pip5_request_io;
214 hwspecops->release_io = pip5_release_io;
215 hwspecops->reset = pip_reset;
216 hwspecops->init_hw_data = pip_init_hw_data;
217 hwspecops->init_chip_data = pip_init_chip_data;
218 hwspecops->init_obj_data = pip_init_obj_data;
219 hwspecops->write_register = pip_write_register;
220 hwspecops->read_register = pip_read_register;
221 hwspecops->program_irq = pip5_program_irq;
225 int pip6_register(struct hwspecops_t *hwspecops)
227 hwspecops->request_io = pip6_request_io;
228 hwspecops->release_io = pip6_release_io;
229 hwspecops->reset = pip_reset;
230 hwspecops->init_hw_data = pip_init_hw_data;
231 hwspecops->init_chip_data = pip_init_chip_data;
232 hwspecops->init_obj_data = pip_init_obj_data;
233 hwspecops->write_register = pip_write_register;
234 hwspecops->read_register = pip_read_register;
235 hwspecops->program_irq = pip6_program_irq;