1 /**************************************************************************/
2 /* File: main.h - the CAN driver basic data structures and functions */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
38 #include "./constants.h"
39 #include "./can_sysdep.h"
40 #include "./can_queue.h"
43 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,\
46 #define DEBUGMSG(fmt,args...)
49 #define CANMSG(fmt,args...) can_printk(KERN_ERR "lincan: " fmt,##args)
52 extern can_spinlock_t canuser_manipulation_lock;
55 * struct canhardware_t - structure representing pointers to all CAN boards
56 * @nr_boards: number of present boards
57 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
58 * @rtr_lock: locking for RTR queue
59 * @candevice: array of pointers to CAN devices/boards
61 struct canhardware_t {
63 struct rtr_id *rtr_queue;
64 can_spinlock_t rtr_lock;
65 struct candevice_t *candevice[MAX_HW_CARDS];
69 * struct candevice_t - CAN device/board structure
70 * @hwname: text string with board type
71 * @candev_idx: board index in canhardware_t.candevice[]
72 * @io_addr: IO/physical MEM address
73 * @res_addr: optional reset register port
74 * @dev_base_addr: CPU translated IO/virtual MEM address
75 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
76 * can be programmed into board
77 * @nr_all_chips: number of chips present on the board
78 * @nr_82527_chips: number of Intel 8257 chips
79 * @nr_sja1000_chips: number of Philips SJA100 chips
80 * @chip: array of pointers to the chip structures
81 * @hwspecops: pointer to board specific operations
82 * @hosthardware_p: pointer to the root hardware structure
83 * @sysdevptr: union reserved for pointer to bus specific
84 * device structure (case @pcidev is used for PCI devices)
86 * The structure represent configuration and state of associated board.
87 * The driver infrastructure prepares this structure and calls
88 * board type specific board_register() function. The board support provided
89 * register function fills right function pointers in @hwspecops structure.
90 * Then driver setup calls functions init_hw_data(), init_chip_data(),
91 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
92 * and init_chip_data() have to specify number and types of connected chips
93 * or objects respectively.
94 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
95 * and @nr_sja1000_chips in the board non-specific functions.
96 * The @io_addr and @dev_base_addr is filled from module parameters
97 * to the same value. The request_io function can fix-up @dev_base_addr
98 * field if virtual address is different than bus address.
101 char *hwname; /* text board type */
102 int candev_idx; /* board index in canhardware_t.candevice[] */
103 unsigned long io_addr; /* IO/physical MEM address */
104 unsigned long res_addr; /* optional reset register port */
105 can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */
106 can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */
110 int nr_sja1000_chips;
111 int nr_mcp2515_chips;
112 can_spinlock_t device_lock;
113 struct canchip_t *chip[MAX_HW_CHIPS];
115 struct hwspecops_t *hwspecops;
117 struct canhardware_t *hosthardware_p;
119 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
120 struct kref refcount;
125 #ifdef CAN_ENABLE_PCI_SUPPORT
126 struct pci_dev *pcidev;
127 #endif /*CAN_ENABLE_PCI_SUPPORT*/
133 * struct canchip_t - CAN chip state and type information
134 * @chip_type: text string describing chip type
135 * @chip_idx: index of the chip in candevice_t.chip[] array
136 * @chip_irq: chip interrupt number if any
137 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
138 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
139 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
140 * @clock: chip base clock frequency in Hz
141 * @baudrate: selected chip baudrate in Hz
142 * @write_register: write chip register function copy
143 * @read_register: read chip register function copy
144 * @chip_data: pointer for optional chip specific data extension
145 * @sja_cdr_reg: SJA specific register -
146 * holds hardware specific options for the Clock Divider
147 * register. Options defined in the sja1000.h file:
148 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
149 * @sja_ocr_reg: SJA specific register -
150 * hold hardware specific options for the Output Control
151 * register. Options defined in the sja1000.h file:
152 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
153 * %OCR_TX0_LH, %OCR_TX1_ZZ.
154 * @int_cpu_reg: Intel specific register -
155 * holds hardware specific options for the CPU Interface
156 * register. Options defined in the i82527.h file:
157 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
158 * @int_clk_reg: Intel specific register -
159 * holds hardware specific options for the Clock Out
160 * register. Options defined in the i82527.h file:
161 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
162 * @int_bus_reg: Intel specific register -
163 * holds hardware specific options for the Bus Configuration
164 * register. Options defined in the i82527.h file:
165 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
166 * @msgobj: array of pointers to individual communication objects
167 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
168 * @hostdevice: pointer to chip hosting board
169 * @max_objects: maximal number of communication objects connected to this chip
170 * @chip_lock: reserved for synchronization of the chip supporting routines
171 * (not used in the current driver version)
172 * @worker_thread: chip worker thread ID (RT-Linux specific field)
173 * @pend_flags: holds information about pending interrupt and tx_wake() operations
174 * (RT-Linux specific field). Masks values:
175 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
176 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
177 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
178 * for some of above reasons
180 * The fields @write_register and @read_register are copied from
181 * corresponding fields from @hwspecops structure
182 * (chip->hostdevice->hwspecops->write_register and
183 * chip->hostdevice->hwspecops->read_register)
184 * to speedup can_write_reg() and can_read_reg() functions.
188 int chip_idx; /* chip index in candevice_t.chip[] */
190 can_ioptr_t chip_base_addr;
192 long clock; /* Chip clock in Hz */
195 void (*write_register)(unsigned data, can_ioptr_t address);
196 unsigned (*read_register)(can_ioptr_t address);
198 /* SPI / mcp2515 specific */
199 int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
200 void (*spi_release_bus)(struct candevice_t *candev, short channel);
201 int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
202 int (*spi_async_transfer)(struct candevice_t *candev, void (*callback)(void *data, uint8_t count), void *data, uint8_t count, uint8_t fasthandler);
208 unsigned short sja_cdr_reg; /* sja1000 only! */
209 unsigned short sja_ocr_reg; /* sja1000 only! */
210 unsigned short int_cpu_reg; /* intel 82527 only! */
211 unsigned short int_clk_reg; /* intel 82527 only! */
212 unsigned short int_bus_reg; /* intel 82527 only! */
214 struct msgobj_t *msgobj[MAX_MSGOBJS];
216 struct chipspecops_t *chipspecops;
218 struct candevice_t *hostdevice;
220 int max_objects; /* 1 for sja1000, 15 for i82527 */
222 can_spinlock_t chip_lock;
225 pthread_t worker_thread;
226 unsigned long pend_flags;
227 #endif /*CAN_WITH_RTL*/
231 * struct msgobj_t - structure holding communication object state
233 * @minor: associated device minor number
234 * @object: object number in canchip_t structure +1
235 * @flags: message object flags
236 * @ret: field holding status of the last Tx operation
237 * @qends: pointer to message object corresponding ends structure
238 * @tx_qedge: edge corresponding to transmitted message
239 * @tx_slot: slot holding transmitted message, slot is taken from
240 * canque_test_outslot() call and is freed by canque_free_outslot()
241 * or rescheduled canque_again_outslot()
242 * @tx_retry_cnt: transmission attempt counter
243 * @tx_timeout: can be used by chip driver to check for the transmission timeout
244 * @rx_msg: temporary storage to hold received messages before
245 * calling to canque_filter_msg2edges()
246 * @hostchip: pointer to the &canchip_t structure this object belongs to
247 * @obj_used: counter of users (associated file structures for Linux
248 * userspace clients) of this object
249 * @obj_users: list of user structures of type &canuser_t.
250 * @obj_flags: message object specific flags. Masks values:
251 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
252 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
253 * is running inside TX activation processing code
254 * @rx_preconfig_id: place to store RX message identifier for some chip types
255 * that reuse same object for TX
258 can_ioptr_t obj_base_addr;
259 unsigned int minor; /* associated device minor number */
260 unsigned int object; /* object number in canchip_t +1 for debug printk */
261 unsigned long obj_flags;
264 struct canque_ends_t *qends;
266 struct canque_edge_t *tx_qedge;
267 struct canque_slot_t *tx_slot;
269 struct timer_list tx_timeout;
271 struct canmsg_t rx_msg;
273 struct canchip_t *hostchip;
275 unsigned long rx_preconfig_id;
278 struct list_head obj_users;
281 #define CAN_USER_MAGIC 0x05402033
284 * struct canuser_t - structure holding CAN user/client state
285 * @flags: used to distinguish Linux/RT-Linux type
286 * @peers: for connection into list of object users
287 * @qends: pointer to the ends structure corresponding for this user
288 * @msgobj: communication object the user is connected to
289 * @rx_edge0: default receive queue for filter IOCTL
290 * @userinfo: stores user context specific information.
291 * The field @fileinfo.file holds pointer to open device file state structure
292 * for the Linux user-space client applications
293 * @magic: magic number to check consistency when pointer is retrieved
294 * from file private field
298 struct list_head peers;
299 struct canque_ends_t *qends;
300 struct msgobj_t *msgobj;
301 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
304 struct file *file; /* back ptr to file */
308 struct rtl_file *file;
310 #endif /*CAN_WITH_RTL*/
316 * struct hwspecops_t - hardware/board specific operations
317 * @request_io: reserve io or memory range for can board
318 * @release_io: free reserved io memory range
319 * @reset: hardware reset routine
320 * @init_hw_data: called to initialize &candevice_t structure, mainly
321 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
323 * @init_chip_data: called initialize each &canchip_t structure, mainly
324 * @chip_type, @chip_base_addr, @clock and chip specific registers.
325 * It is responsible to setup &canchip_t->@chipspecops functions
326 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
327 * @init_obj_data: called initialize each &msgobj_t structure,
328 * mainly @obj_base_addr field.
329 * @program_irq: program interrupt generation hardware of the board
330 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
331 * @write_register: low level write register routine
332 * @read_register: low level read register routine
335 int (*request_io)(struct candevice_t *candev);
336 int (*release_io)(struct candevice_t *candev);
337 int (*reset)(struct candevice_t *candev);
338 int (*init_hw_data)(struct candevice_t *candev);
339 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
340 int (*init_obj_data)(struct canchip_t *chip, int objnr);
341 int (*program_irq)(struct candevice_t *candev);
342 void (*write_register)(unsigned data, can_ioptr_t address);
343 unsigned (*read_register)(can_ioptr_t address);
345 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
346 void (*release_device)(struct kref *refcount);
349 int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
350 void (*spi_release_bus)(struct candevice_t *candev, short channel);
351 int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
352 int (*spi_async_transfer)(struct candevice_t *candev, void (*callback)(void *data, uint8_t count), void *data, uint8_t count, uint8_t fasthandler);
356 * struct chipspecops_t - can controller chip specific operations
357 * @chip_config: CAN chip configuration
358 * @baud_rate: set communication parameters
359 * @standard_mask: setup of mask for message filtering
360 * @extended_mask: setup of extended mask for message filtering
361 * @message15_mask: set mask of i82527 message object 15
362 * @clear_objects: clears state of all message object residing in chip
363 * @config_irqs: tunes chip hardware interrupt delivery
364 * @pre_read_config: prepares message object for message reception
365 * @pre_write_config: prepares message object for message transmission
366 * @send_msg: initiate message transmission
367 * @remote_request: configures message object and asks for RTR message
368 * @check_tx_stat: checks state of transmission engine
369 * @wakeup_tx: wakeup TX processing
370 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
371 * @enable_configuration: enable chip configuration mode
372 * @disable_configuration: disable chip configuration mode
373 * @set_btregs: configures bitrate registers
374 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
375 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
376 * @start_chip: starts chip message processing
377 * @stop_chip: stops chip message processing
378 * @irq_handler: interrupt service routine
379 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
380 * @get_info: retrieve chp-specifc info for display in proc fs
382 struct chipspecops_t {
383 int (*chip_config)(struct canchip_t *chip);
384 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
385 int sampl_pt, int flags);
386 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
387 unsigned short mask);
388 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
390 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
392 int (*clear_objects)(struct canchip_t *chip);
393 int (*config_irqs)(struct canchip_t *chip, short irqs);
394 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
395 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
396 struct canmsg_t *msg);
397 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
398 struct canmsg_t *msg);
399 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
400 int (*check_tx_stat)(struct canchip_t *chip);
401 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
402 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
403 int (*enable_configuration)(struct canchip_t *chip);
404 int (*disable_configuration)(struct canchip_t *chip);
405 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
406 unsigned short btr1);
407 int (*attach_to_chip)(struct canchip_t *chip);
408 int (*release_chip)(struct canchip_t *chip);
409 int (*start_chip)(struct canchip_t *chip);
410 int (*stop_chip)(struct canchip_t *chip);
411 int (*irq_handler)(int irq, struct canchip_t *chip);
412 int (*irq_accept)(int irq, struct canchip_t *chip);
413 int (*reset_chip)(struct canchip_t *chip);
414 int (*get_info)(struct canchip_t *chip, char *buf);
419 struct mem_addr *next;
423 /* Structure for the RTR queue */
426 struct canmsg_t *rtr_message;
427 wait_queue_head_t rtr_wq;
432 extern int minor[MAX_TOT_CHIPS];
434 extern int baudrate[MAX_TOT_CHIPS];
435 extern int irq[MAX_IRQ];
436 extern char *hw[MAX_HW_CARDS];
437 extern unsigned long io[MAX_HW_CARDS];
438 extern long clockfreq[MAX_HW_CARDS];
439 extern int processlocal;
441 extern struct canhardware_t *hardware_p;
442 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
443 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
445 extern struct mem_addr *mem_head;
448 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
449 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
451 can_outb(data, chip->chip_base_addr+reg_offs);
453 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
455 return can_inb(chip->chip_base_addr+reg_offs);
457 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
458 unsigned char data, unsigned reg_offs)
460 can_outb(data, obj->obj_base_addr+reg_offs);
462 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
465 return can_inb(obj->obj_base_addr+reg_offs);
468 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
469 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
471 can_writeb(data, chip->chip_base_addr+reg_offs);
473 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
475 return can_readb(chip->chip_base_addr+reg_offs);
477 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
478 unsigned char data, unsigned reg_offs)
480 can_writeb(data, obj->obj_base_addr+reg_offs);
482 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
485 return can_readb(obj->obj_base_addr+reg_offs);
488 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
489 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
490 #define CONFIG_OC_LINCAN_DYNAMICIO
493 #define SPI_MESSAGE_LENGTH (32)
496 * struct can_spi_async_t - SPI asynchronous communication supplemental data
497 * @chip: pointer to the chip structure
498 * @opcode: Operation code to be identified by spi_async callback function
499 * @tx_buf: a read-only copy of the transfer buffer
500 * @rx_buf: a read-only copy of the transfer buffer
501 * @len: length of the transmitted buffer
502 * @obj: lincan message for data transmission
504 struct can_spi_async_t{
505 struct canchip_t *chip;
507 uint8_t tx_buf[SPI_MESSAGE_LENGTH];
508 uint8_t rx_buf[SPI_MESSAGE_LENGTH];
510 struct msgobj_t *obj;
511 canmsg_tstamp_t timestamp;
515 /* Inline function to write to the hardware registers. The argument reg_offs is
516 * relative to the memory map of the chip and not the absolute memory reg_offs.
518 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
520 can_ioptr_t address_to_write;
521 address_to_write = chip->chip_base_addr+reg_offs;
522 chip->write_register(data, address_to_write);
525 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
527 can_ioptr_t address_to_read;
528 address_to_read = chip->chip_base_addr+reg_offs;
529 return chip->read_register(address_to_read);
532 extern inline int can_spi_transfer(struct canchip_t *chip, void *tx, void *rx, uint16_t len)
534 return chip->spi_transfer(chip->hostdevice, tx, rx, len);
537 extern inline int can_spi_async_transfer(struct canchip_t *chip, void (*callback)(void *data, uint8_t count), struct can_spi_async_t *data, uint8_t count, uint8_t fasthandler)
539 return chip->spi_async_transfer(chip->hostdevice, callback, data, count, fasthandler);
542 extern inline int can_spi_acquire_bus(struct canchip_t *chip, int block)
544 return chip->spi_acquire_bus(chip->hostdevice, chip->spi_channel, block);
547 extern inline void can_spi_release_bus(struct canchip_t *chip)
549 chip->spi_release_bus(chip->hostdevice, chip->spi_channel);
553 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
554 unsigned char data, unsigned reg_offs)
556 can_ioptr_t address_to_write;
557 address_to_write = obj->obj_base_addr+reg_offs;
558 chip->write_register(data, address_to_write);
561 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
564 can_ioptr_t address_to_read;
565 address_to_read = obj->obj_base_addr+reg_offs;
566 return chip->read_register(address_to_read);
569 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
571 int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base);
572 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
573 void can_release_io_region(unsigned long start, unsigned long n);
574 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
575 void can_release_mem_region(unsigned long start, unsigned long n);
578 const char *boardtype;
579 int (*board_register)(struct hwspecops_t *hwspecops);
583 const struct boardtype_t* boardtype_find(const char *str);
585 int can_check_dev_taken(void *anydev);
587 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
589 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
591 can_gettimeofday(ptimestamp);
593 #else /* No timestamp support, set field to zero */
595 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
597 #ifdef CAN_MSG_VERSION_2
598 ptimestamp->tv_sec = 0;
599 ptimestamp->tv_usec = 0;
600 #else /* CAN_MSG_VERSION_2 */
602 #endif /* CAN_MSG_VERSION_2 */
605 #endif /* End of timestamp source selection */
608 extern int can_rtl_priority;
609 #endif /*CAN_WITH_RTL*/
611 extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
612 extern void deregister_hotplug_dev(struct candevice_t *dev);
613 extern void cleanup_hotplug_dev(struct candevice_t *dev);