1 /* hms30c7202_can.c - Hynix HMS30c7202 ARM device specific code
2 * Linux CAN-bus device driver.
3 * Written by Sebastian Stolzenberg email:stolzi@sebastian-stolzenberg.de
4 * Based on code from Arnaud Westenberg email:arnaud@wanadoo.nl
5 * and Ake Hedman, eurosource, akhe@eurosource.se
6 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
7 * email:pisa@cmp.felk.cvut.cz
8 * This software is released under the GPL-License.
9 * Version lincan-0.3 17 Jun 2004
12 #include <linux/delay.h>
14 #include "../include/can.h"
15 #include "../include/can_sysdep.h"
16 #include "../include/main.h"
17 #include "../include/c_can.h"
18 #include "../include/hms30c7202_can.h"
21 * IO_RANGE is the io-memory range that gets reserved, please adjust according
22 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
23 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
25 #define IO_RANGE 0x17E
28 * hms30c7202_request_io: - reserve io or memory range for can board
29 * @candev: pointer to candevice/board which asks for io. Field @io_addr
30 * of @candev is used in most cases to define start of the range
32 * The function hms30c7202_request_io() is used to reserve the io-memory. If your
33 * hardware uses a dedicated memory range as hardware control registers you
34 * will have to add the code to reserve this memory as well.
35 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
36 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
37 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
38 * Return Value: The function returns zero on success or %-ENODEV on failure
39 * File: src/template.c
41 int hms30c7202_request_io(struct candevice_t *candev)
43 DEBUGMSG("(c%d)calling hms30c7202_request_io(...)\n", candev->chip[0]->chip_idx);
45 if(!can_request_mem_region(candev->io_addr, IO_RANGE, DEVICE_NAME )) {
46 CANMSG("hmsc30c7202_can failed to request mem region %lx.\n",
47 (unsigned long)candev->io_addr );
50 if (!( candev->dev_base_addr = (long)ioremap( candev->io_addr, IO_RANGE ))) {
51 DEBUGMSG( "Failed to map IO-memory: 0x%lx - 0x%lx, mapped to 0x%lx\n",
52 (unsigned long)candev->io_addr,
53 (unsigned long)candev->io_addr + IO_RANGE - 1,
54 (unsigned long)candev->dev_base_addr);
55 can_release_mem_region(candev->io_addr, IO_RANGE);
59 DEBUGMSG( "Mapped IO-memory: 0x%lx - 0x%lx, mapped to 0x%lx\n",
60 (unsigned long)candev->io_addr,
61 (unsigned long)candev->io_addr + IO_RANGE - 1,
62 (unsigned long)candev->dev_base_addr);
66 candev->chip[0]->chip_base_addr=candev->dev_base_addr;
68 //pchip->write_register(0, pchip->vbase_addr + CCCR);
69 //DEBUGMSG("C-CAN Control Register : 0x%.4lx\n",
70 // (unsigned long)(c_can_read_reg_w( pchip->vbase_addr + CCCR)));
71 candev->chip[0]->chipspecops->start_chip(candev->chip[0]);
72 //DEBUGMSG("C-CAN Control Register : 0x%.4lx\n",
73 // (unsigned long)(c_can_read_reg_w( pchip->vbase_addr + CCCR)));
75 //DEBUGMSG("hms30c7202_can request i/o, leaving.\n");
81 * hms30c7202_release_io - free reserved io memory range
82 * @candev: pointer to candevice/board which releases io
84 * The function hms30c7202_release_io() is used to free reserved io-memory.
85 * In case you have reserved more io memory, don't forget to free it here.
86 * IO_RANGE is the io-memory range that gets released, please adjust according
87 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
88 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
89 * Return Value: The function always returns zero
90 * File: src/template.c
92 int hms30c7202_release_io(struct candevice_t *candev)
96 //disable IRQ generation
97 tempReg = c_can_read_reg_w(candev->chip[0], CCCR);
99 c_can_config_irqs(candev->chip[0], 0);
101 /* // clear all message objects
102 for (i=1; i<=15; i++) {
103 ccscan_write_register(
110 ccscan_write_register(
120 // power down HMS30c7202 - C_CAN
121 candev->chip[0]->chipspecops->stop_chip(candev->chip[0]);
123 // release I/O memory mapping
124 iounmap((void*)candev->dev_base_addr);
126 // Release the memory region
127 can_release_mem_region(candev->io_addr, IO_RANGE);
133 * hms30c7202_reset - hardware reset routine
134 * @card: Number of the hardware card.
136 * The function hms30c7202_reset() is used to give a hardware reset. This is
137 * rather hardware specific so I haven't included example code. Don't forget to
138 * check the reset status of the chip before returning.
139 * Return Value: The function returns zero on success or %-ENODEV on failure
140 * File: src/template.c
142 int hms30c7202_reset( struct candevice_t *candev)
145 int enableTest=0, disableTest=0;
146 struct canchip_t *pchip = candev->chip[0];
148 enableTest = pchip->chipspecops->enable_configuration(pchip);
149 disableTest = pchip->chipspecops->disable_configuration(pchip);
150 if( enableTest || disableTest) {
151 CANMSG("Reset status timeout!\n");
152 CANMSG("Please check your hardware.\n");
156 /* Check busoff status */
158 while ( (c_can_read_reg_w(pchip, CCSR) & SR_BOFF) && (i<=15)) {
163 CANMSG("Reset status timeout!\n");
164 CANMSG("Please check your hardware.\n");
168 DEBUGMSG("Chip0 reset status ok.\n");
170 //pchip->config_irqs(pchip, CR_MIE | CR_SIE | CR_EIE);
174 #define RESET_ADDR 0x0
179 * hms30c7202_init_hw_data - Initialize hardware cards
180 * @candev: Pointer to candevice/board structure
182 * The function hms30c7202_init_hw_data() is used to initialize the hardware
183 * structure containing information about the installed CAN-board.
184 * %RESET_ADDR represents the io-address of the hardware reset register.
185 * %NR_82527 represents the number of intel 82527 chips on the board.
186 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
187 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
188 * the hardware uses programmable interrupts.
189 * Return Value: The function always returns zero
190 * File: src/template.c
192 int hms30c7202_init_hw_data(struct candevice_t *candev)
193 /*( struct canchip_t *pchip, u16 chip_nr, u16 startminor, u32 baseaddr, u8 irq )*/
195 // u32 intCntrVAddr = 0;
198 u32 baseaddr=candev->io_addr;
200 // if ( (!( intCntrVAddr = (u32)ioremap( 0x80024000, 0xCD ) ))
201 // & (! ( gpioVAddr = (u32)ioremap( 0x80023000, 0xAD ) ))) {
202 // DEBUGMSG("Failed to map Int and GPIO memory\n");
205 if ( ! ( gpioVAddr = (u32)ioremap( 0x80023000, 0xAD ) )) {
206 DEBUGMSG("Failed to map GPIO memory\n");
210 // DEBUGMSG( "Mapped Interrupt Controller IO-memory: 0x%lx - 0x%lx to 0x%lx\n",
211 // (unsigned long)0X80024000,
212 // (unsigned long)0X800240CC,
213 // (unsigned long)intCntrVAddr);
214 DEBUGMSG( "Mapped GPIO IO-memory: 0x%lx - 0x%lx to 0x%lx\n",
215 (unsigned long)0X80023000,
216 (unsigned long)0X800240AC,
217 (unsigned long)gpioVAddr);
220 if (baseaddr == 0x8002f000) {
221 // tempReg = readl(intCntrVAddr);
222 // DEBUGMSG("Read Interrupt Enable Register : 0x%.4lx\n",(long)tempReg);
223 // DEBUGMSG("Trying to activate CAN0 Interrupt (Bit 18)\n");
224 // writel((tempReg | (1<<18)), intCntrVAddr);
225 // tempReg = readl(intCntrVAddr);
226 // DEBUGMSG("Read changed Interrupt Enable Register : 0x%.4lx\n",(long)tempReg);
227 tempReg = readl(gpioVAddr + 0x5C);
228 DEBUGMSG("Read GPIO-C Enable Register : 0x%.4lx\n",(long)tempReg);
229 DEBUGMSG("Trying to activate CAN0 (Bit 1 = 0 for CANTx0, Bit 2 = 0 for CANRx0,)\n");
230 writel(tempReg & ~0x6, gpioVAddr + 0x5C);
231 tempReg = readl(gpioVAddr + 0x5C);
232 DEBUGMSG("Read changed GPIO-C Enable Register : 0x%.4lx\n",(long)tempReg);
233 tempReg = readl(gpioVAddr + 0x44);
234 DEBUGMSG("Read GPIO-C Direction Register : 0x%.4lx\n",(long)tempReg);
235 DEBUGMSG("Trying to set CAN0 directions (Bit 1 = 0 for CANTx0 as OUT, Bit 2 = 1 for CANRx0 as IN,)\n");
236 writel((tempReg & ~0x2) | 0x4, gpioVAddr + 0x44);
237 tempReg = readl(gpioVAddr + 0x44);
238 DEBUGMSG("Read changed GPIO-C Direction Register : 0x%.4lx\n",(long)tempReg);
240 else if (baseaddr == 0x80030000) {
241 // tempReg = readl(intCntrVAddr);
242 // writel((tempReg | (1<<19)), intCntrVAddr);
243 tempReg = readl(gpioVAddr + 0x9C);
244 DEBUGMSG("Read GPIO-E Enable Register : 0x%.8lx\n",(long)tempReg);
245 DEBUGMSG("Trying to activate CAN1 (Bit 22 = 0 for CANRx1, Bit 23 = 0 for CANTx1,)\n");
246 writel(tempReg & 0xFF3FFFFF, gpioVAddr + 0x9C);
247 tempReg = readl(gpioVAddr + 0x9C);
248 DEBUGMSG("Read changed GPIO-E Enable Register : 0x%.8lx\n",(long)tempReg);
249 tempReg = readl(gpioVAddr + 0x84);
250 DEBUGMSG("Read GPIO-E Direction Register : 0x%.8lx\n",(long)tempReg);
251 DEBUGMSG("Trying to set CAN1 directions (Bit 22 = 1 for CANRx1 as IN, Bit 23 = 0 for CANTx1 as OUT,)\n");
252 writel((tempReg & ~(1<<23)) | 1<<22, gpioVAddr + 0x84);
253 tempReg = readl(gpioVAddr + 0x84);
254 DEBUGMSG("Read changed GPIO-E Direction Register : 0x%.8lx\n",(long)tempReg);
257 //DEBUGMSG("Current Interrupt Status Register (ISR): 0x%4.4lx\n",
258 // (long)readl(intCntrVAddr + 4));
259 //DEBUGMSG("Current Interrupt ID: %d\n",
260 // (int)(readl(intCntrVAddr + 0x90) & 0xF));
261 // iounmap( (void*)intCntrVAddr);
262 iounmap( (void*)gpioVAddr );
263 // DEBUGMSG( "Unmapped Interrupt Controller IO-memory: 0x%lx\n",
264 // (unsigned long)intCntrVAddr);
265 DEBUGMSG( "Unmapped GPIO IO-memory: 0x%lx\n",
266 (unsigned long)gpioVAddr);
268 // Initialize chip data ( only one chip )
269 // pcandev->pchip[ 0 ]->powner = pcandev;
270 /*pchip->ntype = CAN_CHIPTYPE_C_CAN;*/
272 candev->nr_82527_chips=0;
273 candev->nr_sja1000_chips=0;
274 candev->nr_all_chips=NR_C_CAN;
280 #define CHIP_TYPE "c_can"
282 * hms30c7202_init_chip_data - Initialize chips
283 * @candev: Pointer to candevice/board structure
284 * @chipnr: Number of the CAN chip on the hardware card
286 * The function hms30c7202_init_chip_data() is used to initialize the hardware
287 * structure containing information about the CAN chips.
288 * %CHIP_TYPE represents the type of CAN chip.
289 * The @chip_base_addr entry represents the start of the 'official' memory map
290 * of the installed chip. It's likely that this is the same as the @io_addr
291 * argument supplied at module loading time.
292 * The @clock entry holds the chip clock value in Hz.
293 * File: src/template.c
295 int hms30c7202_init_chip_data(struct candevice_t *candev, int chipnr)
297 // Register chip operations
298 c_can_fill_chipspecops(candev->chip[chipnr]);
299 /* override chip provided default value */
300 candev->chip[chipnr]->max_objects = NR_MSGOBJ;
302 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
304 candev->chip[chipnr]->clock = 16000000/2;
306 /*candev->chip[chipnr]->int_clk_reg = 0x0;
307 candev->chip[chipnr]->int_bus_reg = 0x0;
308 candev->chip[chipnr]->sja_cdr_reg = 0x0;
309 candev->chip[chipnr]->sja_ocr_reg = 0x0;*/
317 * hms30c7202_init_obj_data - Initialize message buffers
318 * @chip: Pointer to chip specific structure
319 * @objnr: Number of the message buffer
321 * The function hms30c7202_init_obj_data() is used to initialize the hardware
322 * structure containing information about the different message objects on the
324 * The entry @obj_base_addr represents the first memory address of the message
326 * Unless the hardware uses a segmented memory map, flags can be set zero.
327 * Return Value: The function always returns zero
328 * File: src/template.c
330 int hms30c7202_init_obj_data(struct canchip_t *chip, int objnr)
333 DEBUGMSG("(c%d)calling hms30c7202_init_obj_data( ...)\n", chip->chip_idx);
335 /* It seems, that there is no purpose to setup object base address */
336 chip->msgobj[objnr]->obj_base_addr=0;
338 /*can_msgobj_test_fl(pmsgobj,RX_MODE_EXT);*/
343 * hms30c7202_write_register - Low level write register routine
344 * @data: data to be written
345 * @address: memory address to write to
347 * The function hms30c7202_write_register() is used to write to hardware registers
348 * on the CAN chip. The registers are mapped on 32 bit bus on hms30c7202
349 * and thus registers span is twice as one defined by C_CAN manual and defines.
350 * This function compensates this difference.
351 * Return Value: The function does not return a value
352 * File: src/template.c
355 void hms30c7202_write_register(unsigned data, unsigned long address)
358 //unsigned long usecs = 1;
360 address = ((address & C_CAN_REGOFFS_MASK) << 1) |
361 (address & ~C_CAN_REGOFFS_MASK);
363 //DEBUGMSG("Trying to write 0x%u16x to address 0x%lx\n",data,address);
365 writew(data,address);
371 * hms30c7202_read_register - Low level read register routine
372 * @address: memory address to read from
374 * The function hms30c7202_read_register() is used to read from hardware registers
375 * on the CAN chip. The registers are mapped on 32 bit bus on hms30c7202
376 * and thus registers span is twice as one defined by C_CAN manual and defines.
377 * This function compensates this difference.
378 * Return Value: The function returns the value stored in @address
379 * File: src/template.c
381 unsigned hms30c7202_read_register(unsigned long address)
385 address = ((address & C_CAN_REGOFFS_MASK) << 1) |
386 (address & ~C_CAN_REGOFFS_MASK);
388 //DEBUGMSG("Trying to read from address 0x%lx :",address);
390 value = readw(address);
393 value = readw(address);
397 //DEBUGMSG("0x%u16x\n",value);
403 * hms30c7202_program_irq - program interrupts
404 * @candev: Pointer to candevice/board structure
406 * The function hms30c7202_program_irq() is used for hardware that uses
407 * programmable interrupts. If your hardware doesn't use programmable interrupts
408 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
409 * leave this function unedited. Again this function is hardware specific so
410 * there's no example code.
411 * Return value: The function returns zero on success or %-ENODEV on failure
412 * File: src/template.c
414 int hms30c7202_program_irq(struct candevice_t *candev)
419 int hms30c7202_register(struct hwspecops_t *hwspecops)
421 hwspecops->request_io = hms30c7202_request_io;
422 hwspecops->release_io = hms30c7202_release_io;
423 hwspecops->reset = hms30c7202_reset;
424 hwspecops->init_hw_data = hms30c7202_init_hw_data;
425 hwspecops->init_chip_data = hms30c7202_init_chip_data;
426 hwspecops->init_obj_data = hms30c7202_init_obj_data;
427 hwspecops->write_register = hms30c7202_write_register;
428 hwspecops->read_register = hms30c7202_read_register;
429 hwspecops->program_irq = hms30c7202_program_irq;