1 /**************************************************************************/
2 /* File: mpc5200.c - Freescale MPC5200 MSCAN controller support */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Copyright (C) 2007-2008 Martin Petera <peterm4@fel.cvut.cz> */
8 /* Funded by OCERA and FRESCOR IST projects */
9 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
11 /* LinCAN is free software; you can redistribute it and/or modify it */
12 /* under terms of the GNU General Public License as published by the */
13 /* Free Software Foundation; either version 2, or (at your option) any */
14 /* later version. LinCAN is distributed in the hope that it will be */
15 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
16 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
17 /* General Public License for more details. You should have received a */
18 /* copy of the GNU General Public License along with LinCAN; see file */
19 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
20 /* Cambridge, MA 02139, USA. */
22 /* To allow use of LinCAN in the compact embedded systems firmware */
23 /* and RT-executives (RTEMS for example), main authors agree with next */
24 /* special exception: */
26 /* Including LinCAN header files in a file, instantiating LinCAN generics */
27 /* or templates, or linking other files with LinCAN objects to produce */
28 /* an application image/executable, does not by itself cause the */
29 /* resulting application image/executable to be covered by */
30 /* the GNU General Public License. */
31 /* This exception does not however invalidate any other reasons */
32 /* why the executable file might be covered by the GNU Public License. */
33 /* Publication of enhanced or derived LinCAN files is required although. */
34 /**************************************************************************/
36 #include "../include/can.h"
37 #include "../include/can_sysdep.h"
38 #include "../include/main.h"
39 #include "../include/mpc5200.h"
40 #include "../include/mscan.h"
42 #include "linux/of_platform.h"
44 int mpc5200_init_device_node(struct canchip_t * chip, struct device_node * devnode);
46 /* in time when release_io should take place, we dont know the
47 * base addresses that has to be free.
48 * This variable keeps those addresses
50 unsigned long * chips_addr;
53 int mpc5200_request_io(struct candevice_t *candev)
56 struct device_node * dn;
57 const char * of_devname = "can";
59 /* Workaround for OpenFormware */
61 /* Select device by chipnr:
65 * There are only two devices on MPC5200 */
67 /* initialize internal address storage */
68 chips_addr = (unsigned long*)kmalloc(candev->nr_all_chips * sizeof(unsigned long), GFP_KERNEL);
70 /* DEBUGMSG("Looking for device node '%s'\n", of_devname); */
73 for_each_node_by_name(dn, of_devname)
75 /* DEBUGMSG(" got OF node (%s)...\n", of_devname); */
77 if (!of_device_is_available(dn))
79 DEBUGMSG("\tdevice not available\n");
84 if (mpc5200_init_device_node(candev->chip[chipnr], dn))
87 /* fill received address to internal storage */
88 chips_addr[chipnr] = (unsigned long)candev->chip[chipnr]->chip_base_addr;
90 /* original MIDAM Shark board use only one CAN chip - this handles similar cases */
91 if (++chipnr >= candev->nr_all_chips)
96 DEBUGMSG("Succesfully mapped %d can devices\n", chipnr);
100 int mpc5200_release_io(struct candevice_t *candev)
104 /*can_release_io_region(candev->io_addr, candev->nr_all_chips * IO_RANGE);*/
106 /* free all chips memorey space - using internal address storage */
107 for (i = 0; i < candev->nr_all_chips; i++)
108 iounmap((void*)chips_addr[i]);
115 int mpc5200_reset(struct candevice_t *candev)
118 DEBUGMSG("Resetting MSCAN chips ...\n");
120 for (i = 0; i < candev->nr_all_chips; i++)
122 /* !!! Assuming this card has ONLY MSCAN chips !!! */
123 if (mscan_reset_chip(candev->chip[i]))
130 int mpc5200_init_hw_data(struct candevice_t *candev)
132 /* candev->res_addr = RESET_ADDR; */
133 candev->nr_82527_chips = NR_82527;
134 candev->nr_sja1000_chips = NR_SJA1000;
135 candev->nr_all_chips = NR_ALL;
136 /* candev->flags |= CANDEV_PROGRAMMABLE_IRQ; */
141 /* special function for midam board */
142 int mpc5200_midam_init_hw_data(struct candevice_t *candev)
144 /* use same init routine */
145 mpc5200_init_hw_data(candev);
147 /* modify chip count */
148 candev->nr_all_chips = NR_ALL_MIDAM;
153 int mpc5200_init_chip_data(struct candevice_t *candev, int chipnr)
155 mscan_fill_chipspecops(candev->chip[chipnr]);
157 candev->chip[chipnr]->clock = MPC5200_CLK_FREQ;
158 candev->chip[chipnr]->hostdevice = candev;
161 candev->chip[chipnr]->chip_base_addr = can_ioport2ioptr(candev->io_addr) + chipnr * MPC5200_CAN_CHIP_OFFSET; one chip with 2 interfaces
162 candev->chip[chipnr]->chip_irq = MPC5200_CAN_IRQ + chipnr;
164 DEBUGMSG("mpc5200_init_chip_data\n");
169 int mpc5200_init_obj_data(struct canchip_t *chip, int objnr)
171 /* we have only two chips with only one mailbox each */
172 chip->msgobj[objnr]->obj_base_addr = (can_ioptr_t) MSCAN_CTL0 + MPC5200_CAN_CHIP_OFFSET * objnr;
177 int mpc5200_program_irq(struct candevice_t *candev)
179 /* we don't use programmable interrupt on MPC5200 */
184 void mpc5200_write_register(unsigned data, can_ioptr_t address)
186 /* address is an absolute address */
187 /* DEBUGMSG("write register\n"); */
188 writeb(data, address); /* regs in PowerPC (5200) are one-byte length */
191 unsigned mpc5200_read_register(can_ioptr_t address)
193 /* address is an absolute address */
194 /* DEBUGMSG("read register\n"); */
195 return readb(address); /* regs in PowerPC (5200) are one-byte length */
198 int mpc5200_register(struct hwspecops_t *hwspecops)
200 hwspecops->request_io = mpc5200_request_io;
201 hwspecops->release_io = mpc5200_release_io;
202 hwspecops->reset = mpc5200_reset;
203 hwspecops->init_hw_data = mpc5200_init_hw_data;
204 hwspecops->init_chip_data = mpc5200_init_chip_data;
205 hwspecops->init_obj_data = mpc5200_init_obj_data;
206 hwspecops->program_irq = NULL; /* mpc5200_program_irq; */
207 hwspecops->write_register = mpc5200_write_register;
208 hwspecops->read_register = mpc5200_read_register;
212 int mpc5200_midam_register(struct hwspecops_t *hwspecops)
214 /* use same register routine for MIDAM board */
215 mpc5200_register(hwspecops);
217 /* use specific init_hw_data */
218 hwspecops->init_hw_data = mpc5200_midam_init_hw_data;
223 int mpc5200_init_device_node(struct canchip_t * chip, struct device_node * devnode)
225 chip->chip_base_addr = of_iomap(devnode, 0);
226 if (!chip->chip_base_addr)
228 DEBUGMSG("\tcannot map IO - of_iomap\n");
232 chip->chip_irq = irq_of_parse_and_map(devnode, 0);
235 DEBUGMSG("\tcannot map IRQ\n");
236 iounmap(chip->chip_base_addr);
240 DEBUGMSG("Bound to io-addr: 0x%08x IRQ: %d\n", (unsigned int)chip->chip_base_addr, chip->chip_irq);