lincan/src/mcp2515.c

   1 /* mcp2515.c
   2  * Linux CAN-bus device driver.
   3  * Written by Sergei Sharonov email:sharonov@halliburton.com
   4  * sja1000p was used as a prototype
   5  * This software is released under the GPL-License.
   6  * Version lincan-0.3.2  15 Feb 2006
   7  */
   8 #include "../include/can.h"
   9 #include "../include/can_sysdep.h"
  10 #include "../include/main.h"
  11 #include "../include/mcp2515.h"
  12
  13 #define DEBUG 0
  14
  15 #define RESET_CMD  0xc0
  16 #define READ_CMD   0x03
  17 #define WRITE_CMD  0x02
  18 #define BITMOD_CMD 0x05
  19
  20
  21 /*****************************************************************************/
  22 /*                       SPI ACCESS FUNCTIONS                                */
  23 /*****************************************************************************/
  24 static unsigned char read_reg(struct canchip_t *chip, unsigned addr)
  25 {
  26         uint8_t *command, val;
  27
  28         command = ((MCP2515_PRIV*)(chip->chip_data))->spi_buf;
  29         command[0] = READ_CMD;
  30         command[1] = addr;
  31         can_spi_transfer(chip,command,command,3);
  32         val = command[2];
  33
  34 #if DEBUG
  35         DEBUGMSG("reg[0x%02x]=>0x%02x\n",addr,(unsigned)val);
  36 #endif
  37         return val;
  38 }
  39
  40 /*****************************************************************************/
  41 static int read_block(struct canchip_t *chip, unsigned startAddr,
  42                                 size_t len, void *data)
  43 {
  44         uint8_t *command;
  45
  46         command = ((MCP2515_PRIV*)(chip->chip_data))->spi_buf;
  47         memset(command,0,SPI_BUF_LEN);
  48         command[0] = READ_CMD;
  49         command[1] = startAddr;
  50         can_spi_transfer(chip, command, command, len+2);
  51         memcpy(data, command+2, len);
  52
  53 #if DEBUG
  54         {
  55                 int i;
  56                 DEBUGMSG("reg[0x%02x..]=>",startAddr);
  57                 for(i=0;i<len;i++) DEBUGMSG(" 0x%02x",(unsigned)((uint8_t*)data)[i]);
  58                 DEBUGMSG("\n");
  59         }
  60 #endif
  61         return len;
  62 }
  63
  64 /*****************************************************************************/
  65 static void write_reg(struct canchip_t *chip, unsigned addr, unsigned char data)
  66 {
  67         unsigned char *command;
  68
  69         command = ((MCP2515_PRIV*)(chip->chip_data))->spi_buf;
  70         command[0] = WRITE_CMD;
  71         command[1] = addr;
  72         command[2] = data;
  73         can_spi_transfer(chip,command,command,3);
  74
  75 #if DEBUG
  76         DEBUGMSG("reg[0x%02x]<=0x%02x\n",addr,(unsigned)data);
  77 #endif
  78 }
  79
  80
  81 /*****************************************************************************/
  82 static int write_block(struct canchip_t *chip, unsigned startAddr,
  83                         size_t len, void *data)
  84 {
  85         uint8_t *command;
  86
  87         command = ((MCP2515_PRIV*)(chip->chip_data))->spi_buf;
  88         command[0] = WRITE_CMD;
  89         command[1] = startAddr;
  90         memcpy(command+2,data,len);
  91         can_spi_transfer(chip, command, command, len+2);
  92
  93 #if DEBUG
  94         {
  95                 int i;
  96                 DEBUGMSG("reg[0x%02x..]<=",startAddr);
  97                 for(i=0;i<len;i++)
  98                         DEBUGMSG(" 0x%02x", (unsigned)((uint8_t*)data)[i]);
  99                 DEBUGMSG("\n");
 100         }
 101 #endif
 102
 103         return len;
 104 }
 105
 106 /*****************************************************************************/
 107 static void bitmod_reg(struct canchip_t *chip, unsigned addr,
 108                        unsigned char mask, unsigned char data)
 109 {
 110         unsigned char *command;
 111
 112         command = ((MCP2515_PRIV*)(chip->chip_data))->spi_buf;
 113         command[0] = BITMOD_CMD;
 114         command[1] = addr;
 115         command[2] = mask;
 116         command[3] = data;
 117         can_spi_transfer(chip,command,command,4);
 118
 119 #if DEBUG
 120         DEBUGMSG("reg[0x%02x]<=0x%02x mask=0x%02x\n",addr,(unsigned)data,(unsigned)mask);
 121 #endif
 122 }
 123
 124
 125 /*****************************************************************************/
 126 /*                              PROC INTERFACE                               */
 127 /*****************************************************************************/
 128 int mcp2515_get_info(struct canchip_t *chip, char *buf)
 129 {
 130         MCP2515_PRIV *priv=(MCP2515_PRIV *)(chip->chip_data);
 131         int len=0;
 132         uint8_t opmode;
 133
 134         can_spi_acquire_bus(chip, 1);
 135         opmode = read_reg(chip,MCP2515_CANSTAT) & mcpMOD_MASK;
 136         can_spi_release_bus(chip);
 137         len += sprintf(buf+len,"opmode : %s%s%s%s%s\n",
 138                        (opmode == mcpMOD_NORM)     ? "norm"     : "",
 139                        (opmode == mcpMOD_SLEEP)    ? "sleep"    : "",
 140                        (opmode == mcpMOD_LOOPBACK) ? "loopback" : "",
 141                        (opmode == mcpMOD_LISTEN)   ? "listen"   : "",
 142                        (opmode == mcpMOD_CONFIG)   ? "config"   : "");
 143
 144         len += sprintf(buf+len,"spi ch : %d\n",chip->spi_channel);
 145         len += sprintf(buf+len,"rx0ovr : %u\n",priv->errcnt.rx0ovr);
 146         len += sprintf(buf+len,"rx1ovr : %u\n",priv->errcnt.rx1ovr);
 147         len += sprintf(buf+len,"txbo   : %u\n",priv->errcnt.txbo);
 148         len += sprintf(buf+len,"txep   : %u\n",priv->errcnt.txep);
 149         len += sprintf(buf+len,"rxep   : %u\n",priv->errcnt.rxep);
 150         len += sprintf(buf+len,"txwar  : %u\n",priv->errcnt.txwar);
 151         len += sprintf(buf+len,"rxwar  : %u\n",priv->errcnt.rxwar);
 152         len += sprintf(buf+len,"ewarn  : %u\n",priv->errcnt.ewarn);
 153         len += sprintf(buf+len,"merre  : %u\n",priv->errcnt.merre);
 154         len += sprintf(buf+len,"wakeup : %u\n",priv->wakeint_cnt);
 155
 156         return len;
 157 }
 158
 159
 160 /*****************************************************************************/
 161 /*                               IRQ FUNCTIONS                               */
 162 /*****************************************************************************/
 163 static void rx_handler(struct canchip_t *chip, int bufNo, struct msgobj_t *obj)
 164 {
 165         int len;
 166         MCP2515_FRAME frame;
 167
 168         if(chip == NULL) panic("rx_handler: chip==NULL");
 169         if(obj == NULL) panic("rx_handler: obj==NULL");
 170
 171
 172         /* get all frame data */
 173         if(bufNo == 0){
 174                 read_block(chip,MCP2515_RXB0SIDH,sizeof(MCP2515_FRAME),&frame);
 175                 bitmod_reg(chip,MCP2515_CANINTF, mcpRX0INT, ~mcpRX0INT);
 176         }
 177         else{
 178                 read_block(chip,MCP2515_RXB1SIDH,sizeof(MCP2515_FRAME),&frame);
 179                 bitmod_reg(chip,MCP2515_CANINTF, mcpRX1INT, ~mcpRX1INT);
 180         }
 181
 182         if(frame.sidl & mcpIDE) {
 183                 DEBUGMSG("extended frame\n");
 184                 obj->rx_msg.id =
 185                         ((uint32_t)frame.eid0)              |
 186                         ((uint32_t)frame.eid8)        <<  8 |
 187                         ((uint32_t)frame.sidl & 0x03) << 16 |
 188                         ((uint32_t)frame.sidl & 0xe0) << 13 |
 189                         ((uint32_t)frame.sidh)        << 21;
 190                 obj->rx_msg.flags = MSG_EXT | ((frame.dlc & mcpRTR) ? MSG_RTR : 0);
 191         }
 192         else {
 193                 DEBUGMSG("standard frame\n");
 194                 obj->rx_msg.id =
 195                         ((uint32_t)frame.sidl) >> 5 |
 196                         ((uint32_t)frame.sidh) << 3;
 197                 obj->rx_msg.flags = ((frame.sidl & mcpSRR) ? MSG_RTR : 0);
 198         }
 199
 200         len = frame.dlc & mcpDLC_MASK;
 201         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 202         obj->rx_msg.length = len;
 203
 204         memcpy(obj->rx_msg.data,frame.data,len);
 205
 206         /* fill CAN message timestamp */
 207         can_filltimestamp(&obj->rx_msg.timestamp);
 208         canque_filter_msg2edges(obj->qends, &obj->rx_msg);
 209 }
 210
 211 /*****************************************************************************/
 212 static void tx_handler(struct canchip_t *chip,  struct msgobj_t *obj)
 213 {
 214         int cmd;
 215
 216         if(chip == NULL) panic("tx_handler: chip==NULL");
 217         if(obj == NULL) panic("tx_handler: obj==NULL");
 218
 219         bitmod_reg(chip,MCP2515_CANINTF, mcpTX0INT, ~mcpTX0INT);
 220
 221
 222         if(obj->tx_slot) {
 223                 /* Do local transmitted message distribution if enabled */
 224                 if (processlocal){
 225                         /* fill CAN message timestamp */
 226                         can_filltimestamp(&obj->tx_slot->msg.timestamp);
 227
 228                         obj->tx_slot->msg.flags |= MSG_LOCAL;
 229                         canque_filter_msg2edges(obj->qends, &obj->tx_slot->msg);
 230                 }
 231                 /* Free transmitted slot */
 232                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 233                 obj->tx_slot=NULL;
 234         }
 235
 236         can_msgobj_clear_fl(obj,TX_PENDING);
 237         cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
 238         if(cmd<0)
 239                 return;
 240         can_msgobj_set_fl(obj,TX_PENDING);
 241
 242         if (chip->chipspecops->pre_write_config(chip, obj, &obj->tx_slot->msg)) {
 243                 obj->ret = -1;
 244                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_PREP);
 245                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 246                 obj->tx_slot=NULL;
 247                 return;
 248         }
 249         if (chip->chipspecops->send_msg(chip, obj, &obj->tx_slot->msg)) {
 250                 obj->ret = -1;
 251                 canque_notify_inends(obj->tx_qedge, CANQUEUE_NOTIFY_ERRTX_SEND);
 252                 canque_free_outslot(obj->qends, obj->tx_qedge, obj->tx_slot);
 253                 obj->tx_slot=NULL;
 254                 return;
 255         }
 256
 257 }
 258
 259 /*****************************************************************************/
 260 static void errint_handler(struct canchip_t *chip)
 261 {
 262         uint8_t error;
 263         MCP2515_PRIV *priv=(MCP2515_PRIV *)(chip->chip_data);
 264
 265         error = read_reg(chip, MCP2515_EFLG);
 266         bitmod_reg(chip,MCP2515_CANINTF, mcpERRINT, ~mcpERRINT);
 267
 268
 269         if(error & mcpRX0OVR) {
 270                 (priv->errcnt.rx0ovr)++;
 271                 CANMSG("can: RX0OVR\n");
 272         }
 273         if(error & mcpRX1OVR) (priv->errcnt.rx1ovr)++;
 274         if(error & mcpTXBO)   (priv->errcnt.txbo)++;
 275         if(error & mcpTXEP)   (priv->errcnt.txep)++;
 276         if(error & mcpRXEP)   (priv->errcnt.rxep)++;
 277         if(error & mcpTXWAR)  (priv->errcnt.txwar)++;
 278         if(error & mcpRXWAR)  (priv->errcnt.rxwar)++;
 279         if(error & mcpEWARN)  (priv->errcnt.ewarn)++;
 280 }
 281
 282 /*****************************************************************************/
 283 static void irq_work(void *data)
 284 {
 285         struct canchip_t *chip=(struct canchip_t *)data;
 286         MCP2515_PRIV *priv;
 287         uint8_t flags;
 288
 289         if (chip == NULL)
 290                 return;
 291         priv=(MCP2515_PRIV *)(chip->chip_data);
 292         if (priv == NULL)
 293                 return;
 294         while(1) {
 295
 296                 flags = read_reg(chip, MCP2515_CANINTF);
 297                 if(flags == 0) break;
 298                 DEBUGMSG("mcp251x_irq_work_handler:%s%s%s%s%s%s%s%s\n",
 299                        (flags & mcpRX0INT) ? " RX0":"",
 300                        (flags & mcpRX1INT) ? " RX1":"",
 301                        (flags & mcpTX0INT) ? " TX0":"",
 302                        (flags & mcpTX1INT) ? " TX1":"",
 303                        (flags & mcpTX2INT) ? " TX2":"",
 304                        (flags & mcpERRINT) ? " ERR":"",
 305                        (flags & mcpWAKINT) ? " WAK":"",
 306                        (flags & mcpMERREINT) ? " MERRE":"");
 307
 308                 if(flags & mcpRX0INT) rx_handler(chip,0,chip->msgobj[0]);
 309                 if(flags & mcpRX1INT) rx_handler(chip,1,chip->msgobj[0]);
 310                 if(flags & mcpTX0INT) tx_handler(chip,chip->msgobj[0]);
 311                 if(flags & mcpTX1INT) tx_handler(chip,chip->msgobj[1]);
 312                 if(flags & mcpTX2INT) tx_handler(chip,chip->msgobj[2]);
 313                 if(flags & mcpERRINT) errint_handler(chip);
 314
 315                 if(flags & mcpMERREINT){
 316                         bitmod_reg(chip,MCP2515_CANINTF, mcpMERREINT, ~mcpMERREINT);
 317                         (priv->errcnt.merre)++;
 318                 }
 319                 if(flags & mcpWAKINT)   (priv->wakeint_cnt)++;
 320
 321 //              bitmod_reg(chip, MCP2515_CANINTF, flags, 0);
 322         }
 323
 324         enable_irq(chip->chip_irq);
 325 }
 326
 327 /*****************************************************************************/
 328
 329 static void tasklet_handler(unsigned long data)
 330 {
 331         struct canchip_t *chip=(struct canchip_t *)data;
 332         if (chip == NULL)
 333                 return;
 334
 335         /* Already acquired bus, go do work */
 336         irq_work(chip);
 337         can_spi_release_bus(chip);
 338 }
 339
 340 /*****************************************************************************/
 341 static void workqueue_handler(struct work_struct *work)
 342 {
 343         MCP2515_PRIV *priv = container_of(work,MCP2515_PRIV,workqueue_handler);
 344         struct canchip_t *chip = priv->chip;
 345         if (chip == NULL)
 346                 return;
 347         can_spi_acquire_bus(chip, 1);
 348         irq_work(chip);
 349         can_spi_release_bus(chip);
 350 }
 351
 352 /*****************************************************************************/
 353 /*                          EXPORT FUNCTIONS                                 */
 354 /*****************************************************************************/
 355 int mcp2515_reset_chip(struct canchip_t *chip)
 356 {
 357         unsigned char *command;
 358
 359         DEBUGMSG("reset chip\n");
 360
 361         command = ((MCP2515_PRIV*)(chip->chip_data))->spi_buf;
 362         command[0] = RESET_CMD;
 363         can_spi_acquire_bus(chip,1);
 364         can_spi_transfer(chip,command,command,1);
 365         can_spi_release_bus(chip);
 366
 367 #if DEBUG
 368         DEBUGMSG("reset mcp2515:%d\n",chip->chip_idx);
 369 #endif
 370         return 0;
 371 }
 372
 373 /**
 374  * mcp2515_enable_configuration - enable chip configuration mode
 375  * @chip: pointer to chip state structure
 376  */
 377 int mcp2515_enable_configuration(struct canchip_t *chip)
 378 {
 379         int i;
 380         enum mcp2515_MOD stat;
 381
 382         DEBUGMSG("mcp2515_enable_configuration\n");
 383
 384         can_disable_irq(chip->chip_irq);
 385
 386         can_spi_acquire_bus(chip,1);
 387         for(i=0;i<10;i++) {
 388                 bitmod_reg(chip, MCP2515_CANCTRL, mcpMOD_MASK, mcpMOD_CONFIG);
 389                 stat = read_reg(chip,MCP2515_CANSTAT);
 390                 if((stat & mcpMOD_MASK) == mcpMOD_CONFIG) {
 391                         can_spi_release_bus(chip);
 392                         return 0;
 393                 }
 394                 udelay(100);
 395         }
 396         can_spi_release_bus(chip);
 397
 398         CANMSG("Failed to set cfg mode\n");
 399         can_enable_irq(chip->chip_irq);
 400         return -ENODEV;
 401 }
 402
 403 /**
 404  * mcp2515_disable_configuration - disable chip configuration mode
 405  * @chip: pointer to chip state structure
 406  */
 407 int mcp2515_disable_configuration(struct canchip_t *chip)
 408 {
 409         int i;
 410         enum mcp2515_MOD stat;
 411
 412         DEBUGMSG("mcp2515_disable_configuration\n");
 413
 414         can_spi_acquire_bus(chip,1);
 415         for(i=0;i<10;i++) {
 416                 bitmod_reg(chip, MCP2515_CANCTRL, mcpMOD_MASK, mcpMOD_NORM);
 417                 stat = read_reg(chip,MCP2515_CANSTAT);
 418                 if((stat & mcpMOD_MASK) == mcpMOD_NORM) {
 419                         can_enable_irq(chip->chip_irq);
 420                         can_spi_release_bus(chip);
 421                         return 0;
 422                 }
 423                 udelay(100);
 424         }
 425         can_spi_release_bus(chip);
 426
 427         CANMSG("Failed to set normal mode\n");
 428         return -ENODEV;
 429 }
 430
 431
 432 /**
 433  * mcp2515_chip_config: - can chip configuration
 434  * @chip: pointer to chip state structure
 435  *
 436  * This function configures chip and prepares it for message
 437  * transmission and reception. The function resets chip,
 438  * resets mask for acceptance of all messages by call to
 439  * mcp2515_extended_mask() function and then
 440  * computes and sets baudrate with use of function mcp2515_baud_rate().
 441  * Return Value: negative value reports error.
 442  * File: src/mcp2515.c
 443  */
 444 int mcp2515_chip_config(struct canchip_t *chip)
 445 {
 446         uint8_t pat0[8]={0x00,0xff,0xaa,0x55,0x0f,0xf0,0x3c,0xc3};
 447         uint8_t pat1[8];
 448         int i;
 449
 450         DEBUGMSG("mcp2515_chip_config\n");
 451
 452         ((MCP2515_PRIV *)(chip->chip_data))->chip = chip;
 453
 454         if (mcp2515_enable_configuration(chip))
 455                 return -ENODEV;
 456
 457         /* Acquire SPI bus */
 458         can_spi_acquire_bus(chip,1);
 459
 460         /* Set TXnRTS pins as digital inputs */
 461         write_reg(chip,MCP2515_TXRTSCTRL,0);
 462
 463         /* Set RXnBF pins as digital outputs, b0=low, b1=high */
 464         write_reg(chip, MCP2515_BFPCTRL,
 465                   mcpB0BFE | mcpB1BFE | /* mcpB0BFS | */ mcpB1BFS);
 466
 467         /* Ensure, that interrupts are disabled even on the chip level now */
 468         write_reg(chip, MCP2515_CANINTE, 0);
 469
 470         /* Configure second receive buffer for rollover */
 471         bitmod_reg(chip, MCP2515_RXB0CTRL, mcpBUKT, mcpBUKT);
 472
 473
 474         /* Simple check for chip presence */
 475         memset(pat1,0,8);
 476         write_block(chip,MCP2515_TXB0DATA,8,pat0);
 477         for (i=0;i<10;i++){
 478                 read_block(chip,MCP2515_TXB0DATA,8,pat1);
 479 //              *(pat1) = read_reg(chip,MCP2515_TXB0DATA);
 480 //              *(pat1+1) = read_reg(chip,MCP2515_TXB0DATA+1);
 481 //              *(pat1+2) = read_reg(chip,MCP2515_TXB0DATA+2);
 482 //              *(pat1+3) = read_reg(chip,MCP2515_TXB0DATA+3);
 483 //              *(pat1+4) = read_reg(chip,MCP2515_TXB0DATA+4);
 484 //              *(pat1+5) = read_reg(chip,MCP2515_TXB0DATA+5);
 485 //              *(pat1+6) = read_reg(chip,MCP2515_TXB0DATA+6);
 486 //              *(pat1+7) = read_reg(chip,MCP2515_TXB0DATA+7);
 487
 488                 if(memcmp(pat0,pat1,8)) {
 489                         CANMSG("mcp2515_chip_config: chip #%d not found\n",
 490                                chip->chip_idx);
 491                         CANMSG("Requested: Ox%X Ox%X Ox%X Ox%X Ox%X Ox%X Ox%X Ox%X\n",pat0[0],pat0[1],pat0[2],pat0[3],pat0[4],pat0[5],pat0[6],pat0[7]);
 492                         CANMSG("Obtained : Ox%X Ox%X Ox%X Ox%X Ox%X Ox%X Ox%X Ox%X\n",pat1[0],pat1[1],pat1[2],pat1[3],pat1[4],pat1[5],pat1[6],pat1[7]);
 493 //                      return -ENODEV;
 494                 }
 495                 else
 496                         break;
 497         }
 498         if (i==10)
 499                 return -ENODEV;
 500
 501         can_spi_release_bus(chip);
 502
 503         CANMSG("Found mcp2515:%d\n",chip->chip_idx);
 504
 505
 506         if (mcp2515_extended_mask(chip,0x00000000, 0xffffffff))
 507                 return -ENODEV;
 508
 509         if (!chip->baudrate) chip->baudrate=1000000;
 510         if (mcp2515_baud_rate(chip,chip->baudrate,chip->clock,0,75,0))
 511                 return -ENODEV;
 512
 513         /* Enable hardware interrupts */
 514         can_spi_acquire_bus(chip,1);
 515         write_reg(chip, MCP2515_CANINTE, 0xff);
 516         can_spi_release_bus(chip);
 517
 518         mcp2515_disable_configuration(chip);
 519         return 0;
 520 }
 521
 522 /**
 523  * mcp2515_extended_mask: - setup of extended mask for message filtering
 524  * @chip: pointer to chip state structure
 525  * @code: can message acceptance code
 526  * @mask: can message acceptance mask
 527  *
 528  * Return Value: negative value reports error.
 529  * File: src/mcp2515.c
 530  */
 531 int mcp2515_extended_mask(struct canchip_t *chip, unsigned long code, unsigned  long mask)
 532 {
 533         DEBUGMSG("mcp2515_extended_mask\n");
 534
 535 #if 0
 536         if (mcp2515_enable_configuration(chip))
 537                 return -ENODEV;
 538
 539 // LSB to +3, MSB to +0
 540         for(i=SJA_PeliCAN_AC_LEN; --i>=0;) {
 541                 can_write_reg(chip,code&0xff,SJAACR0+i);
 542                 can_write_reg(chip,mask&0xff,SJAAMR0+i);
 543                 code >>= 8;
 544                 mask >>= 8;
 545         }
 546
 547         DEBUGMSG("Setting acceptance code to 0x%lx\n",(unsigned long)code);
 548         DEBUGMSG("Setting acceptance mask to 0x%lx\n",(unsigned long)mask);
 549
 550         mcp2515_disable_configuration(chip);
 551 #endif
 552         return 0;
 553 }
 554
 555 /**
 556  * mcp2515_baud_rate: - set communication parameters.
 557  * @chip: pointer to chip state structure
 558  * @rate: baud rate in Hz
 559  * @clock: frequency of mcp2515 clock in Hz (ISA osc is 14318000)
 560  * @sjw: synchronization jump width (0-3) prescaled clock cycles
 561  * @sampl_pt: sample point in % (0-100) sets (TSEG1+1)/(TSEG1+TSEG2+2) ratio
 562  * @flags: fields %BTR1_SAM, %OCMODE, %OCPOL, %OCTP, %OCTN, %CLK_OFF, %CBP
 563  *
 564  * Return Value: negative value reports error.
 565  * File: src/mcp2515.c
 566  */
 567 int mcp2515_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw_in,
 568                                                         int sampl_pt, int flags)
 569 {
 570        int tqs; /* tbit/TQ */
 571        int brp;
 572        int ps1, ps2, propseg, sjw;
 573                          int i;
 574                          u8 readreg;
 575
 576        DEBUGMSG("mcp2515_baud_rate\n");
 577                          DEBUGMSG("Clock = %d, rate = %d\n",clock,rate);
 578
 579        /* Determine the BRP value that gives the requested bit rate. */
 580        for(brp = 0; brp < 8; brp++) {
 581                tqs = clock / (2 * (brp + 1)) / rate;
 582                if (tqs >= 5 && tqs <= 25
 583                    && (clock / (2 * (brp + 1)) / tqs) == rate)
 584                        break;
 585        }
 586        if (brp >= 8)
 587                return -EINVAL;
 588
 589        /* The CAN bus bit time (tbit) is determined by:
 590         *   tbit = (SyncSeg + PropSeg + PS1 + PS2) * TQ
 591         * with:
 592         *     SyncSeg = 1
 593         *     sample point (between PS1 and PS2) must be at 60%-70% of the bit time
 594         *     PropSeg + PS1 >= PS2
 595         *     PropSeg + PS1 >= Tdelay
 596         *     PS2 > SJW
 597         *     1 <= PropSeg <= 8, 1 <= PS1 <=8, 2 <= PS2 <= 8
 598         * SJW = 1 is sufficient in most cases.
 599         * Tdelay is usually 1 or 2 TQ.
 600         */
 601
 602        propseg = ps1 = ps2 = (tqs - 1) / 3;
 603        if (tqs - (1 + propseg + ps1 + ps2) == 2)
 604                ps1++;
 605        if (tqs - (1 + propseg + ps1 + ps2) == 1)
 606                ps2++;
 607        sjw = 1;
 608
 609        DEBUGMSG("bit rate: BRP = %d, Tbit = %d TQ, PropSeg = %d, PS1 = %d, PS2 = %d, SJW = %d\n",
 610                brp, tqs, propseg, ps1, ps2, sjw);
 611
 612         if (mcp2515_enable_configuration(chip))
 613                 return -ENODEV;
 614
 615 #define CNF2_BTLMODE      0x80
 616 #define CNF3_PHSEG2_MASK  0x07
 617
 618         can_spi_acquire_bus(chip,1);
 619         for (i=0;i<10;i++) {
 620                 write_reg(chip, MCP2515_CNF1, ((sjw-1) << 6) | brp);
 621                 write_reg(chip, MCP2515_CNF2, CNF2_BTLMODE | ((ps1-1) << 3) | (propseg-1));
 622                 bitmod_reg(chip, MCP2515_CNF3, CNF3_PHSEG2_MASK,(ps2-1));
 623
 624                 readreg = read_reg(chip, MCP2515_CNF1);
 625                 if (readreg != (u8)(((sjw-1) << 6) | brp)){
 626                         CANMSG("Wrong value in CNF1 - sent: 0x%X, received: 0x%X\n",((sjw-1) << 6) | brp,readreg);
 627                         continue;
 628                 }
 629                 readreg = read_reg(chip, MCP2515_CNF2);
 630                 if (readreg != (u8)(CNF2_BTLMODE | ((ps1-1) << 3) | (propseg-1))){
 631                         CANMSG("Wrong value in CNF2 - sent: 0x%X, received: 0x%X\n",CNF2_BTLMODE | ((ps1-1) << 3) | (propseg-1),readreg);
 632                         continue;
 633                 }
 634                 readreg = read_reg(chip, MCP2515_CNF3);
 635                 if (readreg & CNF3_PHSEG2_MASK != (u8)((ps2-1))){
 636                         CANMSG("Wrong value in CNF3 - sent: 0x%X, received: 0x%X\n",(ps2-1) | brp,readreg & CNF3_PHSEG2_MASK);
 637                         continue;
 638                 }
 639                 break;
 640         }
 641         can_spi_release_bus(chip);
 642         if (i==10){
 643                 CANMSG("Failed to set bit rate for %d times\n",i);
 644                 mcp2515_disable_configuration(chip);
 645                 return -1;
 646         }
 647
 648         /* Calculate actual bit rate. */
 649         DEBUGMSG("actual bit rate=%u\n",clock / (2 * (brp + 1)) / tqs);
 650
 651         mcp2515_disable_configuration(chip);
 652
 653         return 0;
 654 }
 655
 656 /**
 657  * mcp2515_pre_read_config: - prepares message object for message reception
 658  * @chip: pointer to chip state structure
 659  * @obj: pointer to message object state structure
 660  *
 661  * Return Value: negative value reports error.
 662  *      Positive value indicates immediate reception of message.
 663  * File: src/mcp2515.c
 664  */
 665 int mcp2515_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj)
 666 {
 667         DEBUGMSG("mcp2515_pre_read_config\n");
 668
 669         /* FIXME - error recovery here */
 670
 671         return 0;
 672 }
 673
 674 #define MAX_TRANSMIT_WAIT_LOOPS 10
 675 /**
 676  * mcp2515_pre_write_config: - prepares message object for message transmission
 677  * @chip: pointer to chip state structure
 678  * @obj: pointer to message object state structure
 679  * @msg: pointer to CAN message
 680  *
 681  * This function prepares selected message object for future initiation
 682  * of message transmission by mcp2515_send_msg() function.
 683  * The CAN message data and message ID are transfered from @msg slot
 684  * into chip buffer in this function.
 685  * Return Value: negative value reports error.
 686  * File: src/mcp2515.c
 687  */
 688 int mcp2515_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
 689                              struct canmsg_t *msg)
 690 {
 691         int i=0;
 692         unsigned len;
 693         uint8_t busy;
 694         MCP2515_FRAME frame;
 695
 696         DEBUGMSG("mcp2515_pre_write_config: id=%u len=%u\n",
 697                (unsigned)msg->id,
 698                (unsigned)msg->length);
 699
 700         can_spi_acquire_bus(chip,1);
 701
 702         /* Wait until Transmit Buffer Status is released */
 703         do {
 704                 busy  = read_reg(chip, MCP2515_TXB0CTRL) & mcpTXREQ;
 705                 if(!busy) break;
 706                 udelay(i++);
 707         } while (i < MAX_TRANSMIT_WAIT_LOOPS);
 708
 709
 710         /* FIXME - error recovery here */
 711
 712         if (busy) {
 713                 CANMSG("Transmit timed out, cancelling\n");
 714                 bitmod_reg(chip, MCP2515_TXB0CTRL, mcpTXREQ, 0);
 715                 can_spi_release_bus(chip);
 716                 return -EIO;
 717         }
 718
 719
 720         frame.sidl = (msg->id << 5) ||
 721                 ((msg->flags & MSG_EXT) ? mcpEXIDE : 0) ||
 722                 ((msg->id >> 16) & mcpEID_MASK);
 723
 724         len = msg->length;
 725         if(len > CAN_MSG_LENGTH) len = CAN_MSG_LENGTH;
 726
 727         if(msg->flags & MSG_EXT) {
 728                 frame.sidh = msg->id >> 21;
 729                 frame.sidl = (msg->id << 5) | ((msg->id >> 27) & 0x3) | mcpEXIDE;
 730                 frame.eid8 = msg->id >> 19;
 731                 frame.eid0 = 13;
 732                 frame.dlc = len | ((msg->flags & MSG_RTR) ? mcpRTR : 0);
 733                 memcpy(frame.data, msg->data, len);
 734         }
 735         else {
 736                 frame.sidh = msg->id >> 21;
 737                 frame.sidl = (msg->id << 5) | ((msg->id >> 27) & 0x3);
 738                 frame.eid8 = msg->id >> 19;
 739                 frame.eid0 = 13;
 740                 frame.dlc = len | ((msg->flags & MSG_RTR) ? mcpRTR : 0);
 741                 memcpy(frame.data, msg->data, len);
 742         }
 743
 744         write_block(chip, MCP2515_TXB0SIDH, len+5, &frame);
 745
 746         can_spi_release_bus(chip);
 747
 748         return 0;
 749 }
 750
 751 /**
 752  * mcp2515_send_msg: - initiate message transmission
 753  * @chip: pointer to chip state structure
 754  * @obj: pointer to message object state structure
 755  * @msg: pointer to CAN message
 756  *
 757  * This function is called after mcp2515_pre_write_config() function,
 758  * which prepares data in chip buffer.
 759  * Return Value: negative value reports error.
 760  * File: src/mcp2515.c
 761  */
 762 int mcp2515_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
 763                                                         struct canmsg_t *msg)
 764 {
 765         DEBUGMSG("mcp2515_send_msg\n");
 766
 767         can_spi_acquire_bus(chip,1);
 768         bitmod_reg(chip, MCP2515_TXB0CTRL, mcpTXREQ, mcpTXREQ);
 769         can_spi_release_bus(chip);
 770
 771         return 0;
 772 }
 773
 774 /**
 775  * mcp2515_check_tx_stat: - checks state of transmission engine
 776  * @chip: pointer to chip state structure
 777  *
 778  * Return Value: negative value reports error.
 779  *      Positive return value indicates transmission under way status.
 780  *      Zero value indicates finishing of all issued transmission requests.
 781  * File: src/mcp2515.c
 782  */
 783 int mcp2515_check_tx_stat(struct canchip_t *chip)
 784 {
 785         int status;
 786         DEBUGMSG("mcp2515_check_tx_stat\n");
 787
 788         can_spi_acquire_bus(chip,1);
 789         status = read_reg(chip,MCP2515_TXB0CTRL) & mcpTXREQ;
 790         can_spi_release_bus(chip);
 791
 792         if (status) return 1;
 793         else        return 0;
 794 }
 795
 796 /**
 797  * mcp2515_set_btregs: -  configures bitrate registers
 798  * @chip: pointer to chip state structure
 799  * @btr0: bitrate register 0
 800  * @btr1: bitrate register 1
 801  *
 802  * Return Value: negative value reports error.
 803  * File: src/mcp2515.c
 804  */
 805 int mcp2515_set_btregs(struct canchip_t *chip, unsigned short btr0,
 806                                                         unsigned short btr1)
 807 {
 808         DEBUGMSG("mcp2515_set_btregs\n");
 809 #if 0
 810         if (mcp2515_enable_configuration(chip))
 811                 return -ENODEV;
 812
 813         can_write_reg(chip, btr0, SJABTR0);
 814         can_write_reg(chip, btr1, SJABTR1);
 815
 816         mcp2515_disable_configuration(chip);
 817 #endif
 818         return 0;
 819 }
 820
 821 /**
 822  * mcp2515_start_chip: -  starts chip message processing
 823  * @chip: pointer to chip state structure
 824  *
 825  * Return Value: negative value reports error.
 826  * File: src/mcp2515.c
 827  */
 828 int mcp2515_start_chip(struct canchip_t *chip)
 829 {
 830         MCP2515_PRIV *priv=(MCP2515_PRIV *)(chip->chip_data);
 831         DEBUGMSG("mcp2515_start_chip\n");
 832
 833         can_spi_acquire_bus(chip,1);
 834         bitmod_reg(chip, MCP2515_CANCTRL, mcpMOD_MASK, mcpMOD_NORM);
 835         can_spi_release_bus(chip);
 836
 837         /* reset error counters */
 838         memset(&(priv->errcnt),0,sizeof(MCP2515_ERRCNT));
 839
 840         return 0;
 841 }
 842
 843 /**
 844  * mcp2515_stop_chip: -  stops chip message processing
 845  * @chip: pointer to chip state structure
 846  *
 847  * Return Value: negative value reports error.
 848  * File: src/mcp2515.c
 849  */
 850 int mcp2515_stop_chip(struct canchip_t *chip)
 851 {
 852         DEBUGMSG("mcp2515_stop_chip\n");
 853
 854         can_spi_acquire_bus(chip,1);
 855         bitmod_reg(chip, MCP2515_CANCTRL, mcpMOD_MASK, mcpMOD_SLEEP);
 856         can_spi_release_bus(chip);
 857
 858         return 0;
 859 }
 860
 861 /**
 862  * mcp2515_attach_to_chip: - attaches to the chip, setups registers and state
 863  * @chip: pointer to chip state structure
 864  *
 865  * Return Value: negative value reports error.
 866  * File: src/mcp2515.c
 867  */
 868 int mcp2515_attach_to_chip(struct canchip_t *chip)
 869 {
 870         DEBUGMSG("mcp2515_attach_to_chip\n");
 871         /* Initialize delayed interrupt processing */
 872  #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
 873         INIT_WORK(&(((MCP2515_PRIV *)(chip->chip_data))->workqueue_handler),
 874                   workqueue_handler,
 875                   NULL);
 876  #else
 877         INIT_WORK(&(((MCP2515_PRIV *)(chip->chip_data))->workqueue_handler),
 878                   workqueue_handler);
 879  #endif
 880
 881         tasklet_init(&(((MCP2515_PRIV *)(chip->chip_data))->tasklet_handler),
 882                      tasklet_handler,
 883                      (unsigned long)chip);
 884
 885         return 0;
 886 }
 887
 888 /**
 889  * mcp2515_release_chip: - called before chip structure removal if %CHIP_ATTACHED is set
 890  * @chip: pointer to chip state structure
 891  *
 892  * Return Value: negative value reports error.
 893  * File: src/mcp2515.c
 894  */
 895 int mcp2515_release_chip(struct canchip_t *chip)
 896 {
 897         DEBUGMSG("mcp2515_release_chip\n");
 898         if (chip==NULL)
 899                 panic("release: chip == NULL");
 900         if (chip->chip_data==NULL)
 901                 panic("release: chip_data == NULL");
 902
 903         chip->flags &= ~CHIP_ATTACHED;
 904         DEBUGMSG("Flush workqueue.\n");
 905         cancel_delayed_work(&((MCP2515_PRIV *)(chip->chip_data))->workqueue_handler);
 906         flush_scheduled_work();
 907
 908         DEBUGMSG("Kill tasklets.\n");
 909         tasklet_kill(&((MCP2515_PRIV *)(chip->chip_data))->tasklet_handler);
 910 #if 0
 911         mcp2515_stop_chip(chip);
 912         can_write_reg(chip, sjaDISABLE_INTERRUPTS, SJAIER);
 913 #endif
 914         return 0;
 915 }
 916
 917 /**
 918  * mcp2515_remote_request: - configures message object and asks for RTR message
 919  * @chip: pointer to chip state structure
 920  * @obj: pointer to message object structure
 921  *
 922  * Return Value: negative value reports error.
 923  * File: src/mcp2515.c
 924  */
 925 int mcp2515_remote_request(struct canchip_t *chip, struct msgobj_t *obj)
 926 {
 927         CANMSG("mcp2515_remote_request not implemented\n");
 928         return -ENOSYS;
 929 }
 930
 931 /**
 932  * mcp2515_standard_mask: - setup of mask for message filtering
 933  * @chip: pointer to chip state structure
 934  * @code: can message acceptance code
 935  * @mask: can message acceptance mask
 936  *
 937  * Return Value: negative value reports error.
 938  * File: src/mcp2515.c
 939  */
 940 int mcp2515_standard_mask(struct canchip_t *chip, unsigned short code,
 941                 unsigned short mask)
 942 {
 943         CANMSG("mcp2515_standard_mask not implemented\n");
 944         return -ENOSYS;
 945 }
 946
 947 /**
 948  * mcp2515_clear_objects: - clears state of all message object residing in chip
 949  * @chip: pointer to chip state structure
 950  *
 951  * Return Value: negative value reports error.
 952  * File: src/mcp2515.c
 953  */
 954 int mcp2515_clear_objects(struct canchip_t *chip)
 955 {
 956         CANMSG("mcp2515_clear_objects not implemented\n");
 957         return -ENOSYS;
 958 }
 959
 960 /**
 961  * mcp2515_config_irqs: - tunes chip hardware interrupt delivery
 962  * @chip: pointer to chip state structure
 963  * @irqs: requested chip IRQ configuration
 964  *
 965  * Return Value: negative value reports error.
 966  * File: src/mcp2515.c
 967  */
 968 int mcp2515_config_irqs(struct canchip_t *chip, short irqs)
 969 {
 970         CANMSG("mcp2515_config_irqs not implemented\n");
 971         return -ENOSYS;
 972 }
 973
 974 #define MAX_RETR 10
 975
 976
 977 /**
 978  * mcp2515_irq_handler: - interrupt service routine
 979  * @irq: interrupt vector number, this value is system specific
 980  * @chip: pointer to chip state structure
 981  *
 982  * Interrupt handler is activated when state of CAN controller chip changes,
 983  * there is message to be read or there is more space for new messages or
 984  * error occurs. The receive events results in reading of the message from
 985  * CAN controller chip and distribution of message through attached
 986  * message queues.
 987  * File: src/mcp2515.c
 988  */
 989 int mcp2515_irq_handler(int irq, struct canchip_t *chip)
 990 {
 991         //DEBUGMSG("mcp2515_irq_handler\n");
 992         if (chip == NULL)
 993                 return CANCHIP_IRQ_ACCEPTED;
 994         if (~chip->flags & CHIP_ATTACHED)
 995                 return CANCHIP_IRQ_ACCEPTED;
 996
 997         /* do work in tasklet if bus is immediately available */
 998         if(can_spi_acquire_bus(chip, 0))
 999                 tasklet_schedule(&((MCP2515_PRIV *)(chip->chip_data))->tasklet_handler);
1000         else /* do work in workqueue */
1001                 schedule_work(&((MCP2515_PRIV *)(chip->chip_data))->workqueue_handler);
1002
1003         disable_irq(chip->chip_irq);
1004         return CANCHIP_IRQ_HANDLED;
1005 }
1006
1007 /**
1008  * mcp2515_wakeup_tx: - wakeups TX processing
1009  * @chip: pointer to chip state structure
1010  * @obj: pointer to message object structure
1011  *
1012  * Function is responsible for initiating message transmition.
1013  * It is responsible for clearing of object TX_REQUEST flag
1014  *
1015  * Return Value: negative value reports error.
1016  * File: src/mcp2515.c
1017  */
1018 int mcp2515_wakeup_tx(struct canchip_t *chip, struct msgobj_t *obj)
1019 {
1020         DEBUGMSG("mcp2515_wakeup_tx\n");
1021
1022         //can_preempt_disable();
1023
1024         can_msgobj_set_fl(obj,TX_PENDING);
1025         can_msgobj_set_fl(obj,TX_REQUEST);
1026
1027         while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)){
1028                 int rq;
1029
1030                 can_msgobj_clear_fl(obj,TX_REQUEST);
1031
1032                 can_spi_acquire_bus(chip,1);
1033                 rq = read_reg(chip, MCP2515_TXB0CTRL) & mcpTXREQ;
1034                 if (!rq) {
1035                         obj->tx_retry_cnt=0;
1036                         tx_handler(chip, obj);
1037                 }
1038                 can_spi_release_bus(chip);
1039
1040                 can_msgobj_clear_fl(obj,TX_LOCK);
1041                 if(!can_msgobj_test_fl(obj,TX_REQUEST)) break;
1042                 DEBUGMSG("TX looping in mcp2515_wakeup_tx\n");
1043         }
1044         //can_preempt_enable();
1045
1046         return 0;
1047 }
1048
1049 int mcp2515_register(struct chipspecops_t *chipspecops)
1050 {
1051         DEBUGMSG("mcp2515_register\n");
1052         chipspecops->chip_config=mcp2515_chip_config;
1053         chipspecops->baud_rate=mcp2515_baud_rate;
1054         chipspecops->standard_mask=mcp2515_standard_mask;
1055         chipspecops->extended_mask=mcp2515_extended_mask;
1056         chipspecops->message15_mask=mcp2515_extended_mask;
1057         chipspecops->clear_objects=mcp2515_clear_objects;
1058         chipspecops->config_irqs=mcp2515_config_irqs;
1059         chipspecops->pre_read_config=mcp2515_pre_read_config;
1060         chipspecops->pre_write_config=mcp2515_pre_write_config;
1061         chipspecops->send_msg=mcp2515_send_msg;
1062         chipspecops->check_tx_stat=mcp2515_check_tx_stat;
1063         chipspecops->wakeup_tx=mcp2515_wakeup_tx;
1064         chipspecops->remote_request=mcp2515_remote_request;
1065         chipspecops->enable_configuration=mcp2515_enable_configuration;
1066         chipspecops->disable_configuration=mcp2515_disable_configuration;
1067         chipspecops->attach_to_chip=mcp2515_attach_to_chip;
1068         chipspecops->release_chip=mcp2515_release_chip;
1069         chipspecops->set_btregs=mcp2515_set_btregs;
1070         chipspecops->start_chip=mcp2515_start_chip;
1071         chipspecops->stop_chip=mcp2515_stop_chip;
1072         chipspecops->irq_handler=mcp2515_irq_handler;
1073         chipspecops->irq_accept=NULL;
1074         chipspecops->reset_chip=mcp2515_reset_chip;
1075         chipspecops->get_info=mcp2515_get_info;
1076         return 0;
1077 }
1078
1079 /**
1080  * mcp2515_fill_chipspecops - fills chip specific operations
1081  * @chip: pointer to chip representation structure
1082  *
1083  * The function fills chip specific operations for mcp2515 (PeliCAN) chip.
1084  *
1085  * Return Value: returns negative number in the case of fail
1086  */
1087 int mcp2515_fill_chipspecops(struct canchip_t *chip)
1088 {
1089         DEBUGMSG("mcp2515_fill_chipspecops\n");
1090         chip->chip_type="mcp2515";
1091         chip->max_objects=2;
1092         mcp2515_register(chip->chipspecops);
1093         return 0;
1094 }