1 /**************************************************************************/
2 /* File: main.h - the CAN driver basic data structures and functions */
4 /* LinCAN - (Not only) Linux CAN bus driver */
5 /* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
6 /* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
7 /* Funded by OCERA and FRESCOR IST projects */
8 /* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
10 /* LinCAN is free software; you can redistribute it and/or modify it */
11 /* under terms of the GNU General Public License as published by the */
12 /* Free Software Foundation; either version 2, or (at your option) any */
13 /* later version. LinCAN is distributed in the hope that it will be */
14 /* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
15 /* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
16 /* General Public License for more details. You should have received a */
17 /* copy of the GNU General Public License along with LinCAN; see file */
18 /* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
19 /* Cambridge, MA 02139, USA. */
21 /* To allow use of LinCAN in the compact embedded systems firmware */
22 /* and RT-executives (RTEMS for example), main authors agree with next */
23 /* special exception: */
25 /* Including LinCAN header files in a file, instantiating LinCAN generics */
26 /* or templates, or linking other files with LinCAN objects to produce */
27 /* an application image/executable, does not by itself cause the */
28 /* resulting application image/executable to be covered by */
29 /* the GNU General Public License. */
30 /* This exception does not however invalidate any other reasons */
31 /* why the executable file might be covered by the GNU Public License. */
32 /* Publication of enhanced or derived LinCAN files is required although. */
33 /**************************************************************************/
36 #include "./constants.h"
37 #include "./can_sysdep.h"
38 #include "./can_queue.h"
41 #define DEBUGMSG(fmt,args...) can_printk(KERN_ERR "lincan (debug): " fmt,\
44 #define DEBUGMSG(fmt,args...)
47 #define CANMSG(fmt,args...) can_printk(KERN_ERR "lincan: " fmt,##args)
50 extern can_spinlock_t canuser_manipulation_lock;
53 * struct canhardware_t - structure representing pointers to all CAN boards
54 * @nr_boards: number of present boards
55 * @rtr_queue: RTR - remote transmission request queue (expect some changes there)
56 * @rtr_lock: locking for RTR queue
57 * @candevice: array of pointers to CAN devices/boards
59 struct canhardware_t {
61 struct rtr_id *rtr_queue;
62 can_spinlock_t rtr_lock;
63 struct candevice_t *candevice[MAX_HW_CARDS];
67 * struct candevice_t - CAN device/board structure
68 * @hwname: text string with board type
69 * @candev_idx: board index in canhardware_t.candevice[]
70 * @io_addr: IO/physical MEM address
71 * @res_addr: optional reset register port
72 * @dev_base_addr: CPU translated IO/virtual MEM address
73 * @flags: board flags: %PROGRAMMABLE_IRQ .. interrupt number
74 * can be programmed into board
75 * @nr_all_chips: number of chips present on the board
76 * @nr_82527_chips: number of Intel 8257 chips
77 * @nr_sja1000_chips: number of Philips SJA100 chips
78 * @chip: array of pointers to the chip structures
79 * @hwspecops: pointer to board specific operations
80 * @hosthardware_p: pointer to the root hardware structure
81 * @sysdevptr: union reserved for pointer to bus specific
82 * device structure (case @pcidev is used for PCI devices)
84 * The structure represent configuration and state of associated board.
85 * The driver infrastructure prepares this structure and calls
86 * board type specific board_register() function. The board support provided
87 * register function fills right function pointers in @hwspecops structure.
88 * Then driver setup calls functions init_hw_data(), init_chip_data(),
89 * init_chip_data(), init_obj_data() and program_irq(). Function init_hw_data()
90 * and init_chip_data() have to specify number and types of connected chips
91 * or objects respectively.
92 * The use of @nr_all_chips is preferred over use of fields @nr_82527_chips
93 * and @nr_sja1000_chips in the board non-specific functions.
94 * The @io_addr and @dev_base_addr is filled from module parameters
95 * to the same value. The request_io function can fix-up @dev_base_addr
96 * field if virtual address is different than bus address.
99 char *hwname; /* text board type */
100 int candev_idx; /* board index in canhardware_t.candevice[] */
101 unsigned long io_addr; /* IO/physical MEM address */
102 unsigned long res_addr; /* optional reset register port */
103 can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */
104 can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */
108 int nr_sja1000_chips;
109 int nr_mcp2515_chips;
110 can_spinlock_t device_lock;
111 struct canchip_t *chip[MAX_HW_CHIPS];
113 struct hwspecops_t *hwspecops;
115 struct canhardware_t *hosthardware_p;
117 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
118 struct kref refcount;
123 #ifdef CAN_ENABLE_PCI_SUPPORT
124 struct pci_dev *pcidev;
125 #endif /*CAN_ENABLE_PCI_SUPPORT*/
131 * struct canchip_t - CAN chip state and type information
132 * @chip_type: text string describing chip type
133 * @chip_idx: index of the chip in candevice_t.chip[] array
134 * @chip_irq: chip interrupt number if any
135 * @chip_base_addr: chip base address in the CPU IO or virtual memory space
136 * @flags: chip flags: %CHIP_CONFIGURED .. chip is configured,
137 * %CHIP_SEGMENTED .. access to the chip is segmented (mainly for i82527 chips)
138 * @clock: chip base clock frequency in Hz
139 * @baudrate: selected chip baudrate in Hz
140 * @write_register: write chip register function copy
141 * @read_register: read chip register function copy
142 * @chip_data: pointer for optional chip specific data extension
143 * @sja_cdr_reg: SJA specific register -
144 * holds hardware specific options for the Clock Divider
145 * register. Options defined in the sja1000.h file:
146 * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
147 * @sja_ocr_reg: SJA specific register -
148 * hold hardware specific options for the Output Control
149 * register. Options defined in the sja1000.h file:
150 * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
151 * %OCR_TX0_LH, %OCR_TX1_ZZ.
152 * @int_cpu_reg: Intel specific register -
153 * holds hardware specific options for the CPU Interface
154 * register. Options defined in the i82527.h file:
155 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
156 * @int_clk_reg: Intel specific register -
157 * holds hardware specific options for the Clock Out
158 * register. Options defined in the i82527.h file:
159 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
160 * @int_bus_reg: Intel specific register -
161 * holds hardware specific options for the Bus Configuration
162 * register. Options defined in the i82527.h file:
163 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
164 * @msgobj: array of pointers to individual communication objects
165 * @chipspecops: pointer to the set of chip specific object filled by init_chip_data() function
166 * @hostdevice: pointer to chip hosting board
167 * @max_objects: maximal number of communication objects connected to this chip
168 * @chip_lock: reserved for synchronization of the chip supporting routines
169 * (not used in the current driver version)
170 * @worker_thread: chip worker thread ID (RT-Linux specific field)
171 * @pend_flags: holds information about pending interrupt and tx_wake() operations
172 * (RT-Linux specific field). Masks values:
173 * %MSGOBJ_TX_REQUEST .. some of the message objects requires tx_wake() call,
174 * %MSGOBJ_IRQ_REQUEST .. chip interrupt processing required
175 * %MSGOBJ_WORKER_WAKE .. marks, that worker thread should be waked
176 * for some of above reasons
178 * The fields @write_register and @read_register are copied from
179 * corresponding fields from @hwspecops structure
180 * (chip->hostdevice->hwspecops->write_register and
181 * chip->hostdevice->hwspecops->read_register)
182 * to speedup can_write_reg() and can_read_reg() functions.
186 int chip_idx; /* chip index in candevice_t.chip[] */
188 can_ioptr_t chip_base_addr;
190 long clock; /* Chip clock in Hz */
193 void (*write_register)(unsigned data, can_ioptr_t address);
194 unsigned (*read_register)(can_ioptr_t address);
196 /* SPI / mcp2515 specific */
197 int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
198 void (*spi_release_bus)(struct candevice_t *candev, short channel);
199 int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
205 unsigned short sja_cdr_reg; /* sja1000 only! */
206 unsigned short sja_ocr_reg; /* sja1000 only! */
207 unsigned short int_cpu_reg; /* intel 82527 only! */
208 unsigned short int_clk_reg; /* intel 82527 only! */
209 unsigned short int_bus_reg; /* intel 82527 only! */
211 struct msgobj_t *msgobj[MAX_MSGOBJS];
213 struct chipspecops_t *chipspecops;
215 struct candevice_t *hostdevice;
217 int max_objects; /* 1 for sja1000, 15 for i82527 */
219 can_spinlock_t chip_lock;
222 pthread_t worker_thread;
223 unsigned long pend_flags;
224 #endif /*CAN_WITH_RTL*/
228 * struct msgobj_t - structure holding communication object state
230 * @minor: associated device minor number
231 * @object: object number in canchip_t structure +1
232 * @flags: message object flags
233 * @ret: field holding status of the last Tx operation
234 * @qends: pointer to message object corresponding ends structure
235 * @tx_qedge: edge corresponding to transmitted message
236 * @tx_slot: slot holding transmitted message, slot is taken from
237 * canque_test_outslot() call and is freed by canque_free_outslot()
238 * or rescheduled canque_again_outslot()
239 * @tx_retry_cnt: transmission attempt counter
240 * @tx_timeout: can be used by chip driver to check for the transmission timeout
241 * @rx_msg: temporary storage to hold received messages before
242 * calling to canque_filter_msg2edges()
243 * @hostchip: pointer to the &canchip_t structure this object belongs to
244 * @obj_used: counter of users (associated file structures for Linux
245 * userspace clients) of this object
246 * @obj_users: list of user structures of type &canuser_t.
247 * @obj_flags: message object specific flags. Masks values:
248 * %MSGOBJ_TX_REQUEST .. the message object requests TX activation
249 * %MSGOBJ_TX_LOCK .. some IRQ routine or callback on some CPU
250 * is running inside TX activation processing code
251 * @rx_preconfig_id: place to store RX message identifier for some chip types
252 * that reuse same object for TX
255 can_ioptr_t obj_base_addr;
256 unsigned int minor; /* associated device minor number */
257 unsigned int object; /* object number in canchip_t +1 for debug printk */
258 unsigned long obj_flags;
261 struct canque_ends_t *qends;
263 struct canque_edge_t *tx_qedge;
264 struct canque_slot_t *tx_slot;
266 struct timer_list tx_timeout;
268 struct canmsg_t rx_msg;
270 struct canchip_t *hostchip;
272 unsigned long rx_preconfig_id;
275 struct list_head obj_users;
278 #define CAN_USER_MAGIC 0x05402033
281 * struct canuser_t - structure holding CAN user/client state
282 * @flags: used to distinguish Linux/RT-Linux type
283 * @peers: for connection into list of object users
284 * @qends: pointer to the ends structure corresponding for this user
285 * @msgobj: communication object the user is connected to
286 * @rx_edge0: default receive queue for filter IOCTL
287 * @userinfo: stores user context specific information.
288 * The field @fileinfo.file holds pointer to open device file state structure
289 * for the Linux user-space client applications
290 * @magic: magic number to check consistency when pointer is retrieved
291 * from file private field
295 struct list_head peers;
296 struct canque_ends_t *qends;
297 struct msgobj_t *msgobj;
298 struct canque_edge_t *rx_edge0; /* simplifies IOCTL */
301 struct file *file; /* back ptr to file */
305 struct rtl_file *file;
307 #endif /*CAN_WITH_RTL*/
313 * struct hwspecops_t - hardware/board specific operations
314 * @request_io: reserve io or memory range for can board
315 * @release_io: free reserved io memory range
316 * @reset: hardware reset routine
317 * @init_hw_data: called to initialize &candevice_t structure, mainly
318 * @res_add, @nr_all_chips, @nr_82527_chips, @nr_sja1000_chips
320 * @init_chip_data: called initialize each &canchip_t structure, mainly
321 * @chip_type, @chip_base_addr, @clock and chip specific registers.
322 * It is responsible to setup &canchip_t->@chipspecops functions
323 * for non-standard chip types (type other than "i82527", "sja1000" or "sja1000p")
324 * @init_obj_data: called initialize each &msgobj_t structure,
325 * mainly @obj_base_addr field.
326 * @program_irq: program interrupt generation hardware of the board
327 * if flag %PROGRAMMABLE_IRQ is present for specified device/board
328 * @write_register: low level write register routine
329 * @read_register: low level read register routine
332 int (*request_io)(struct candevice_t *candev);
333 int (*release_io)(struct candevice_t *candev);
334 int (*reset)(struct candevice_t *candev);
335 int (*init_hw_data)(struct candevice_t *candev);
336 int (*init_chip_data)(struct candevice_t *candev, int chipnr);
337 int (*init_obj_data)(struct canchip_t *chip, int objnr);
338 int (*program_irq)(struct candevice_t *candev);
339 void (*write_register)(unsigned data, can_ioptr_t address);
340 unsigned (*read_register)(can_ioptr_t address);
341 int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
342 void (*spi_release_bus)(struct candevice_t *candev, short channel);
343 int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
345 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
346 void (*release_device)(struct kref *refcount);
352 * struct chipspecops_t - can controller chip specific operations
353 * @chip_config: CAN chip configuration
354 * @baud_rate: set communication parameters
355 * @standard_mask: setup of mask for message filtering
356 * @extended_mask: setup of extended mask for message filtering
357 * @message15_mask: set mask of i82527 message object 15
358 * @clear_objects: clears state of all message object residing in chip
359 * @config_irqs: tunes chip hardware interrupt delivery
360 * @pre_read_config: prepares message object for message reception
361 * @pre_write_config: prepares message object for message transmission
362 * @send_msg: initiate message transmission
363 * @remote_request: configures message object and asks for RTR message
364 * @check_tx_stat: checks state of transmission engine
365 * @wakeup_tx: wakeup TX processing
366 * @filtch_rq: optional routine for propagation of outgoing edges filters to HW
367 * @enable_configuration: enable chip configuration mode
368 * @disable_configuration: disable chip configuration mode
369 * @set_btregs: configures bitrate registers
370 * @attach_to_chip: attaches to the chip, setups registers and possibly state informations
371 * @release_chip: called before chip structure removal if %CHIP_ATTACHED is set
372 * @start_chip: starts chip message processing
373 * @stop_chip: stops chip message processing
374 * @irq_handler: interrupt service routine
375 * @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
376 * @get_info: retrieve chp-specifc info for display in proc fs
378 struct chipspecops_t {
379 int (*chip_config)(struct canchip_t *chip);
380 int (*baud_rate)(struct canchip_t *chip, int rate, int clock, int sjw,
381 int sampl_pt, int flags);
382 int (*standard_mask)(struct canchip_t *chip, unsigned short code,
383 unsigned short mask);
384 int (*extended_mask)(struct canchip_t *chip, unsigned long code,
386 int (*message15_mask)(struct canchip_t *chip, unsigned long code,
388 int (*clear_objects)(struct canchip_t *chip);
389 int (*config_irqs)(struct canchip_t *chip, short irqs);
390 int (*pre_read_config)(struct canchip_t *chip, struct msgobj_t *obj);
391 int (*pre_write_config)(struct canchip_t *chip, struct msgobj_t *obj,
392 struct canmsg_t *msg);
393 int (*send_msg)(struct canchip_t *chip, struct msgobj_t *obj,
394 struct canmsg_t *msg);
395 int (*remote_request)(struct canchip_t *chip, struct msgobj_t *obj);
396 int (*check_tx_stat)(struct canchip_t *chip);
397 int (*wakeup_tx)(struct canchip_t *chip, struct msgobj_t *obj);
398 int (*filtch_rq)(struct canchip_t *chip, struct msgobj_t *obj);
399 int (*enable_configuration)(struct canchip_t *chip);
400 int (*disable_configuration)(struct canchip_t *chip);
401 int (*set_btregs)(struct canchip_t *chip, unsigned short btr0,
402 unsigned short btr1);
403 int (*attach_to_chip)(struct canchip_t *chip);
404 int (*release_chip)(struct canchip_t *chip);
405 int (*start_chip)(struct canchip_t *chip);
406 int (*stop_chip)(struct canchip_t *chip);
407 int (*irq_handler)(int irq, struct canchip_t *chip);
408 int (*irq_accept)(int irq, struct canchip_t *chip);
409 int (*reset_chip)(struct canchip_t *chip);
410 int (*get_info)(struct canchip_t *chip, char *buf);
415 struct mem_addr *next;
419 /* Structure for the RTR queue */
422 struct canmsg_t *rtr_message;
423 wait_queue_head_t rtr_wq;
428 extern int minor[MAX_TOT_CHIPS];
430 extern int baudrate[MAX_TOT_CHIPS];
431 extern int irq[MAX_IRQ];
432 extern char *hw[MAX_HW_CARDS];
433 extern unsigned long io[MAX_HW_CARDS];
434 extern long clockfreq[MAX_HW_CARDS];
435 extern int processlocal;
437 extern struct canhardware_t *hardware_p;
438 extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
439 extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
441 extern struct mem_addr *mem_head;
444 #if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
445 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
447 can_outb(data, chip->chip_base_addr+reg_offs);
449 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
451 return can_inb(chip->chip_base_addr+reg_offs);
453 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
454 unsigned char data, unsigned reg_offs)
456 can_outb(data, obj->obj_base_addr+reg_offs);
458 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
461 return can_inb(obj->obj_base_addr+reg_offs);
464 #elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
465 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
467 can_writeb(data, chip->chip_base_addr+reg_offs);
469 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
471 return can_readb(chip->chip_base_addr+reg_offs);
473 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
474 unsigned char data, unsigned reg_offs)
476 can_writeb(data, obj->obj_base_addr+reg_offs);
478 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
481 return can_readb(obj->obj_base_addr+reg_offs);
484 #else /*CONFIG_OC_LINCAN_DYNAMICIO*/
485 #ifndef CONFIG_OC_LINCAN_DYNAMICIO
486 #define CONFIG_OC_LINCAN_DYNAMICIO
489 /* Inline function to write to the hardware registers. The argument reg_offs is
490 * relative to the memory map of the chip and not the absolute memory reg_offs.
492 extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned reg_offs)
494 can_ioptr_t address_to_write;
495 address_to_write = chip->chip_base_addr+reg_offs;
496 chip->write_register(data, address_to_write);
499 extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
501 can_ioptr_t address_to_read;
502 address_to_read = chip->chip_base_addr+reg_offs;
503 return chip->read_register(address_to_read);
506 extern inline int can_spi_transfer(struct canchip_t *chip, void *tx, void *rx, uint16_t len)
508 return chip->spi_transfer(chip->hostdevice, tx, rx, len);
511 extern inline int can_spi_acquire_bus(struct canchip_t *chip, int block)
513 return chip->spi_acquire_bus(chip->hostdevice, chip->spi_channel, block);
516 extern inline void can_spi_release_bus(struct canchip_t *chip)
518 chip->spi_release_bus(chip->hostdevice, chip->spi_channel);
523 extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
524 unsigned char data, unsigned reg_offs)
526 can_ioptr_t address_to_write;
527 address_to_write = obj->obj_base_addr+reg_offs;
528 chip->write_register(data, address_to_write);
531 extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
534 can_ioptr_t address_to_read;
535 address_to_read = obj->obj_base_addr+reg_offs;
536 return chip->read_register(address_to_read);
539 #endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
541 int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base);
542 int can_request_io_region(unsigned long start, unsigned long n, const char *name);
543 void can_release_io_region(unsigned long start, unsigned long n);
544 int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
545 void can_release_mem_region(unsigned long start, unsigned long n);
548 const char *boardtype;
549 int (*board_register)(struct hwspecops_t *hwspecops);
553 const struct boardtype_t* boardtype_find(const char *str);
555 int can_check_dev_taken(void *anydev);
557 #if defined(can_gettimeofday) && defined(CAN_MSG_VERSION_2) && 1
559 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
561 can_gettimeofday(ptimestamp);
563 #else /* No timestamp support, set field to zero */
565 void can_filltimestamp(canmsg_tstamp_t *ptimestamp)
567 #ifdef CAN_MSG_VERSION_2
568 ptimestamp->tv_sec = 0;
569 ptimestamp->tv_usec = 0;
570 #else /* CAN_MSG_VERSION_2 */
572 #endif /* CAN_MSG_VERSION_2 */
575 #endif /* End of timestamp source selection */
578 extern int can_rtl_priority;
579 #endif /*CAN_WITH_RTL*/
581 extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
582 extern void deregister_hotplug_dev(struct candevice_t *dev);
583 extern void cleanup_hotplug_dev(struct candevice_t *dev);