2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wnadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.3 17 Jun 2004
10 #include "../include/can.h"
11 #include "../include/can_sysdep.h"
12 #include "../include/main.h"
13 #include "../include/pc-i03.h"
14 #include "../include/sja1000.h"
16 /* Basic hardware io address. This is also stored in the hardware structure but
17 * we need it global, else we have to change many internal functions.
18 * pc-i03_base_addr is initialized in pc-i03_init_chip_data().
20 unsigned int pci03_base_addr;
23 * IO_RANGE is the io-memory range that gets reserved, please adjust according
24 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
25 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
27 #define IO_RANGE 0x200 // The pc-i03 uses an additional 0x100 bytes reset space
30 * pci03_request_io: - reserve io or memory range for can board
31 * @candev: pointer to candevice/board which asks for io. Field @io_addr
32 * of @candev is used in most cases to define start of the range
34 * The function pci03_request_io() is used to reserve the io-memory. If your
35 * hardware uses a dedicated memory range as hardware control registers you
36 * will have to add the code to reserve this memory as well.
37 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
38 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
39 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
40 * Return Value: The function returns zero on success or %-ENODEV on failure
43 int pci03_request_io(struct candevice_t *candev)
45 if (!can_request_io_region(candev->io_addr,IO_RANGE,DEVICE_NAME)) {
46 CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
49 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
55 * pci03_elease_io - free reserved io memory range
56 * @candev: pointer to candevice/board which releases io
58 * The function pci03_release_io() is used to free reserved io-memory.
59 * In case you have reserved more io memory, don't forget to free it here.
60 * IO_RANGE is the io-memory range that gets released, please adjust according
61 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
62 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
63 * Return Value: The function always returns zero
66 int pci03_release_io(struct candevice_t *candev)
68 can_release_io_region(candev->io_addr,IO_RANGE);
74 * pci03_reset - hardware reset routine
75 * @candev: Pointer to candevice/board structure
77 * The function pci03_reset() is used to give a hardware reset. This is
78 * rather hardware specific so I haven't included example code. Don't forget to
79 * check the reset status of the chip before returning.
80 * Return Value: The function returns zero on success or %-ENODEV on failure
83 int pci03_reset(struct candevice_t *candev)
87 DEBUGMSG("Resetting pc-i03 hardware ...\n");
88 pci03_write_register(0x01,pci03_base_addr +
89 0x100); // Write arbitrary data to reset mem
92 pci03_write_register(0x00, pci03_base_addr + SJACR);
94 /* Check hardware reset status */
96 while ( (pci03_read_register(pci03_base_addr + SJACR) & sjaCR_RR)
102 CANMSG("Reset status timeout!\n");
103 CANMSG("Please check your hardware.\n");
107 DEBUGMSG("Chip[0] reset status ok.\n");
112 #define RESET_ADDR 0x100
117 * pci03_init_hw_data - Initialize hardware cards
118 * @candev: Pointer to candevice/board structure
120 * The function pci03_init_hw_data() is used to initialize the hardware
121 * structure containing information about the installed CAN-board.
122 * %RESET_ADDR represents the io-address of the hardware reset register.
123 * %NR_82527 represents the number of intel 82527 chips on the board.
124 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
125 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
126 * the hardware uses programmable interrupts.
127 * Return Value: The function always returns zero
130 int pci03_init_hw_data(struct candevice_t *candev)
132 candev->res_addr=RESET_ADDR;
133 candev->nr_82527_chips=NR_82527;
134 candev->nr_sja1000_chips=NR_SJA1000;
135 candev->nr_all_chips=NR_82527+NR_SJA1000;
140 * pci03_init_chip_data - Initialize chips
141 * @candev: Pointer to candevice/board structure
142 * @chipnr: Number of the CAN chip on the hardware card
144 * The function pci03_init_chip_data() is used to initialize the hardware
145 * structure containing information about the CAN chips.
146 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
148 * The @chip_base_addr entry represents the start of the 'official' memory map
149 * of the installed chip. It's likely that this is the same as the @io_addr
150 * argument supplied at module loading time.
151 * The @clock entry holds the chip clock value in Hz.
152 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
153 * register. Options defined in the %sja1000.h file:
154 * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
155 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
156 * register. Options defined in the %sja1000.h file:
157 * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
158 * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
159 * The entry @int_clk_reg holds hardware specific options for the Clock Out
160 * register. Options defined in the %i82527.h file:
161 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
162 * The entry @int_bus_reg holds hardware specific options for the Bus
163 * Configuration register. Options defined in the %i82527.h file:
164 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
165 * Return Value: The function always returns zero
168 int pci03_init_chip_data(struct candevice_t *candev, int chipnr)
170 sja1000_fill_chipspecops(candev->chip[chipnr]);
171 pci03_base_addr = candev->io_addr;
172 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
173 candev->chip[chipnr]->clock = 16000000;
174 candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
175 candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL |
176 sjaOCR_TX0_HL | sjaOCR_TX1_LZ;
182 * pci03_init_obj_data - Initialize message buffers
183 * @chip: Pointer to chip specific structure
184 * @objnr: Number of the message buffer
186 * The function pci03_init_obj_data() is used to initialize the hardware
187 * structure containing information about the different message objects on the
188 * CAN chip. In case of the sja1000 there's only one message object but on the
189 * i82527 chip there are 15.
190 * The code below is for a i82527 chip and initializes the object base addresses
191 * The entry @obj_base_addr represents the first memory address of the message
192 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
194 * Unless the hardware uses a segmented memory map, flags can be set zero.
195 * Return Value: The function always returns zero
198 int pci03_init_obj_data(struct canchip_t *chip, int objnr)
200 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
206 * pci03_program_irq - program interrupts
207 * @candev: Pointer to candevice/board structure
209 * The function pci03_program_irq() is used for hardware that uses
210 * programmable interrupts. If your hardware doesn't use programmable interrupts
211 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
212 * leave this function unedited. Again this function is hardware specific so
213 * there's no example code.
214 * Return value: The function returns zero on success or %-ENODEV on failure
217 int pci03_program_irq(struct candevice_t *candev)
223 * pci03_write_register - Low level write register routine
224 * @data: data to be written
225 * @address: memory address to write to
227 * The function pci03_write_register() is used to write to hardware registers
228 * on the CAN chip. You should only have to edit this function if your hardware
229 * uses some specific write process.
230 * Return Value: The function does not return a value
233 void pci03_write_register(unsigned data, unsigned long address)
235 unsigned int *pci03_base_ptr;
236 unsigned short address_to_write;
238 /* The read/write functions are called by an extra abstract function.
239 * This extra function adds the basic io address of the card to the
240 * memory address we want to write to, so we substract the basic io
241 * address again to obtain the offset into the hardware's memory map.
243 address_to_write = address - pci03_base_addr; // Offset
244 pci03_base_ptr = (unsigned int *)(pci03_base_addr * 0x100001);
245 (*(pci03_base_ptr+address_to_write)) = data;
249 * pci03_read_register - Low level read register routine
250 * @address: memory address to read from
252 * The function pci03_read_register() is used to read from hardware registers
253 * on the CAN chip. You should only have to edit this function if your hardware
254 * uses some specific read process.
255 * Return Value: The function returns the value stored in @address
258 unsigned pci03_read_register(unsigned long address)
260 unsigned int *pci03_base_ptr;
261 unsigned short address_to_read;
263 /* The read/write functions are called by an extra abstract function.
264 * This extra function adds the basic io address of the card to the
265 * memory address we want to write to, so we substract the basic io
266 * address again to obtain the offset into the hardware's memory map.
268 address_to_read = address - pci03_base_addr;
269 pci03_base_ptr = (unsigned int *)(pci03_base_addr * 0x100001);
270 return (*(pci03_base_ptr+address_to_read));
273 int pci03_register(struct hwspecops_t *hwspecops)
275 hwspecops->request_io = pci03_request_io;
276 hwspecops->release_io = pci03_release_io;
277 hwspecops->reset = pci03_reset;
278 hwspecops->init_hw_data = pci03_init_hw_data;
279 hwspecops->init_chip_data = pci03_init_chip_data;
280 hwspecops->init_obj_data = pci03_init_obj_data;
281 hwspecops->write_register = pci03_write_register;
282 hwspecops->read_register = pci03_read_register;
283 hwspecops->program_irq = pci03_program_irq;