2 * Linux CAN-bus device driver.
3 * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
4 * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
5 * email:pisa@cmp.felk.cvut.cz
6 * This software is released under the GPL-License.
7 * Version lincan-0.3 17 Jun 2004
10 #include "../include/can.h"
11 #include "../include/can_sysdep.h"
12 #include "../include/main.h"
13 #include "../include/pikronisa.h"
14 #include "../include/i82527.h"
15 #include "../include/sja1000p.h"
18 * IO_RANGE is the io-memory range that gets reserved, please adjust according
19 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
20 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
22 #define IO_RANGE 0x100
25 * pikronisa_request_io: - reserve io or memory range for can board
26 * @candev: pointer to candevice/board which asks for io. Field @io_addr
27 * of @candev is used in most cases to define start of the range
29 * The function pikronisa_request_io() is used to reserve the io-memory. If your
30 * hardware uses a dedicated memory range as hardware control registers you
31 * will have to add the code to reserve this memory as well.
32 * %IO_RANGE is the io-memory range that gets reserved, please adjust according
33 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
34 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
35 * Return Value: The function returns zero on success or %-ENODEV on failure
36 * File: src/pikronisa.c
38 int pikronisa_request_io(struct candevice_t *candev)
42 if (!can_request_mem_region(candev->io_addr,IO_RANGE,DEVICE_NAME " - pikronisa")) {
43 CANMSG("Unable to request IO-memory: 0x%lx\n",candev->io_addr);
46 if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
47 CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
48 can_release_mem_region(candev->io_addr,IO_RANGE);
52 can_base_addr_fixup(candev, remap_addr);
53 DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
58 * pikronisa_elease_io - free reserved io memory range
59 * @candev: pointer to candevice/board which releases io
61 * The function pikronisa_release_io() is used to free reserved io-memory.
62 * In case you have reserved more io memory, don't forget to free it here.
63 * IO_RANGE is the io-memory range that gets released, please adjust according
64 * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
65 * #define IO_RANGE 0x20 for sja1000 chips in basic CAN mode.
66 * Return Value: The function always returns zero
67 * File: src/pikronisa.c
69 int pikronisa_release_io(struct candevice_t *candev)
71 /* release I/O memory mapping */
72 iounmap((void*)candev->dev_base_addr);
73 can_release_mem_region(candev->io_addr,IO_RANGE);
79 * pikronisa_reset - hardware reset routine
80 * @candev: Pointer to candevice/board structure
82 * The function pikronisa_reset() is used to give a hardware reset. This is
83 * rather hardware specific so I haven't included example code. Don't forget to
84 * check the reset status of the chip before returning.
85 * Return Value: The function returns zero on success or %-ENODEV on failure
86 * File: src/pikronisa.c
88 int pikronisa_reset(struct candevice_t *candev)
91 struct canchip_t *chip=candev->chip[0];
94 pikronisa_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
97 cdr=pikronisa_read_register(chip->chip_base_addr+SJACDR);
98 pikronisa_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
100 pikronisa_write_register(0, chip->chip_base_addr+SJAIER);
103 pikronisa_write_register(0, chip->chip_base_addr+SJAMOD);
104 while (pikronisa_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
105 if(!i--) return -ENODEV;
107 pikronisa_write_register(0, chip->chip_base_addr+SJAMOD);
110 cdr=pikronisa_read_register(chip->chip_base_addr+SJACDR);
111 pikronisa_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
113 pikronisa_write_register(0, chip->chip_base_addr+SJAIER);
118 #define RESET_ADDR 0x0
123 * pikronisa_init_hw_data - Initialize hardware cards
124 * @candev: Pointer to candevice/board structure
126 * The function pikronisa_init_hw_data() is used to initialize the hardware
127 * structure containing information about the installed CAN-board.
128 * %RESET_ADDR represents the io-address of the hardware reset register.
129 * %NR_82527 represents the number of intel 82527 chips on the board.
130 * %NR_SJA1000 represents the number of philips sja1000 chips on the board.
131 * The flags entry can currently only be %CANDEV_PROGRAMMABLE_IRQ to indicate that
132 * the hardware uses programmable interrupts.
133 * Return Value: The function always returns zero
134 * File: src/pikronisa.c
136 int pikronisa_init_hw_data(struct candevice_t *candev)
138 candev->res_addr=RESET_ADDR;
139 candev->nr_82527_chips=0;
140 candev->nr_sja1000_chips=1;
141 candev->nr_all_chips=1;
142 candev->flags |= CANDEV_PROGRAMMABLE_IRQ*0;
148 * pikronisa_init_chip_data - Initialize chips
149 * @candev: Pointer to candevice/board structure
150 * @chipnr: Number of the CAN chip on the hardware card
152 * The function pikronisa_init_chip_data() is used to initialize the hardware
153 * structure containing information about the CAN chips.
154 * %CHIP_TYPE represents the type of CAN chip. %CHIP_TYPE can be "i82527" or
156 * The @chip_base_addr entry represents the start of the 'official' memory map
157 * of the installed chip. It's likely that this is the same as the @io_addr
158 * argument supplied at module loading time.
159 * The @clock entry holds the chip clock value in Hz.
160 * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
161 * register. Options defined in the %sja1000.h file:
162 * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
163 * The entry @sja_ocr_reg holds hardware specific options for the Output Control
164 * register. Options defined in the %sja1000.h file:
165 * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
166 * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
167 * The entry @int_clk_reg holds hardware specific options for the Clock Out
168 * register. Options defined in the %i82527.h file:
169 * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
170 * The entry @int_bus_reg holds hardware specific options for the Bus
171 * Configuration register. Options defined in the %i82527.h file:
172 * %iBUS_DR0, %iBUS_DR1, %iBUS_DT1, %iBUS_POL, %iBUS_CBY.
173 * The entry @int_cpu_reg holds hardware specific options for the cpu interface
174 * register. Options defined in the %i82527.h file:
175 * %iCPU_CEN, %iCPU_MUX, %iCPU_SLP, %iCPU_PWD, %iCPU_DMC, %iCPU_DSC, %iCPU_RST.
176 * Return Value: The function always returns zero
177 * File: src/pikronisa.c
179 int pikronisa_init_chip_data(struct candevice_t *candev, int chipnr)
181 /*sja1000_fill_chipspecops(candev->chip[chipnr]);*/
182 sja1000p_fill_chipspecops(candev->chip[chipnr]);
184 candev->chip[chipnr]->chip_base_addr=candev->io_addr;
185 candev->chip[chipnr]->clock = 24000000;
186 candev->chip[chipnr]->int_clk_reg = 0x0;
187 candev->chip[chipnr]->int_bus_reg = 0x0;
188 candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
189 candev->chip[chipnr]->sja_ocr_reg = sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;
195 * pikronisa_init_obj_data - Initialize message buffers
196 * @chip: Pointer to chip specific structure
197 * @objnr: Number of the message buffer
199 * The function pikronisa_init_obj_data() is used to initialize the hardware
200 * structure containing information about the different message objects on the
201 * CAN chip. In case of the sja1000 there's only one message object but on the
202 * i82527 chip there are 15.
203 * The code below is for a i82527 chip and initializes the object base addresses
204 * The entry @obj_base_addr represents the first memory address of the message
205 * object. In case of the sja1000 @obj_base_addr is taken the same as the chips
207 * Unless the hardware uses a segmented memory map, flags can be set zero.
208 * Return Value: The function always returns zero
209 * File: src/pikronisa.c
211 int pikronisa_init_obj_data(struct canchip_t *chip, int objnr)
213 chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
218 * pikronisa_program_irq - program interrupts
219 * @candev: Pointer to candevice/board structure
221 * The function pikronisa_program_irq() is used for hardware that uses
222 * programmable interrupts. If your hardware doesn't use programmable interrupts
223 * you should not set the @candevices_t->flags entry to %CANDEV_PROGRAMMABLE_IRQ and
224 * leave this function unedited. Again this function is hardware specific so
225 * there's no example code.
226 * Return value: The function returns zero on success or %-ENODEV on failure
227 * File: src/pikronisa.c
229 int pikronisa_program_irq(struct candevice_t *candev)
235 * pikronisa_write_register - Low level write register routine
236 * @data: data to be written
237 * @address: memory address to write to
239 * The function pikronisa_write_register() is used to write to hardware registers
240 * on the CAN chip. You should only have to edit this function if your hardware
241 * uses some specific write process.
242 * Return Value: The function does not return a value
243 * File: src/pikronisa.c
245 void pikronisa_write_register(unsigned data, unsigned long address)
247 /*DEBUGMSG("pikronisa_write_register: addr=0x%lx data=0x%x",
249 writeb(data,address);
253 * pikronisa_read_register - Low level read register routine
254 * @address: memory address to read from
256 * The function pikronisa_read_register() is used to read from hardware registers
257 * on the CAN chip. You should only have to edit this function if your hardware
258 * uses some specific read process.
259 * Return Value: The function returns the value stored in @address
260 * File: src/pikronisa.c
262 unsigned pikronisa_read_register(unsigned long address)
264 return readb(address);
267 /* !!! Don't change this function !!! */
268 int pikronisa_register(struct hwspecops_t *hwspecops)
270 hwspecops->request_io = pikronisa_request_io;
271 hwspecops->release_io = pikronisa_release_io;
272 hwspecops->reset = pikronisa_reset;
273 hwspecops->init_hw_data = pikronisa_init_hw_data;
274 hwspecops->init_chip_data = pikronisa_init_chip_data;
275 hwspecops->init_obj_data = pikronisa_init_obj_data;
276 hwspecops->write_register = pikronisa_write_register;
277 hwspecops->read_register = pikronisa_read_register;
278 hwspecops->program_irq = pikronisa_program_irq;